JP2752771B2 - Programming training equipment - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a programming training device.

[Conventional technology]

Most of the programming learning of PLC (Programmable Logid Controller or sequencer, hereafter referred to as “PC”) is a learning that only stores the knowledge on the desk. There is no.

For example, Japanese Patent Laying-Open No. 59-7389 discloses an apparatus for learning computer science necessary for utilizing a computer such as a personal computer and an office computer.

However, the device proposed in the future is for learning computers in general, and is not devised for understanding and realizing the mechanism of a sequencer for actually operating a plant. No.

[Problems to be solved by the invention]

Therefore, an object of the present invention is to provide an apparatus that can easily understand the basic structure of a PC and can advance learning before a PC control system can be constructed.

[Means for solving the problem]

In order to achieve this object, the programming training apparatus of the present invention comprises a pulse oscillation block 1 for oscillating a variable frequency pulse, a memory block 2 for storing a program input from a program input key 6, and a CPU block 3 that processes input information in accordance with the output program instructions and information from external sensors
An input interface block 4 for converting the information result processed by the CPU block 3 into an electric level necessary for controlling a control target;
Each of the blocks 1 to 5 is provided with a diode lamp for indicating the on / off state of each electronic element. The CPU block 3 is provided with four AND gates 21 to 24 and directly takes in the outputs of the AND gates 21 to 24. Two AND gates 31 and 32 for selecting whether to invert and take in, and AND gates 41 to 43 for selecting whether to output the output of the AND gates 31 and 32 by LOAD, AND or OR logic, And gate
AND gates 51 and 52 for selecting whether to output the outputs of 41 to 43 to the output interface or to temporarily store the outputs, and to provide one of the input terminals of the AND gates 21 to 24 with three external signals from the input interface And the AND gates 51 and 52
The common output signals of
A signal line for determining which external signal from the memory block 2 is to be taken is connected to each other input terminal of 24, and the other input terminal of the AND gates 31, 32, 41 to 43 is connected to the other input terminal of the AND gate 31, 32, 41 to 43. Is connected to a command signal line for determining how to perform the calculation.

[Action]

This device has been devised so that the basic structure of the PC can be easily understood by visually confirming the operation of each of the teaching materials simulating each unit constituting the PC with a diode lamp.

In particular, the CPU simulator has been devised so that the process of decoding and judging instructions and data “1” and “0” (binary information) from the memory block can be seen visually. This makes it easy to understand whether the operation is performed as intended by the control.

Also, in the final process, by controlling a model plant that uses plenty of sensors and various control devices such as motors and air cylinders, the ability to widely understand the entire PC control system required at the actual site is developed. Can be trained.

〔Example〕

 Hereinafter, the present invention will be specifically described based on examples.

FIG. 1 shows a system that can realize control contents of a control target (cylinder) using a learning simulator group. First
The learning simulator group shown in the figure is divided into blocks for each element constituting the PC as shown. FIG. 2 shows the details.

The following lists the types of learning simulator groups used.

• Pulse oscillation block 1: Automatically oscillates "1" and "0" signals.

・ Memory block 2: Stores programs.

-CPU block 3: Processing input information by program instructions. Central processing unit.

-Input interface 4: Adjusts information from external sensors to the same electrical level as the processing center.

-Output interface 5: An interface that converts the information processed by the CPU to an electric level necessary for controlling the control target.

・ Keyboard block group: Each block constituting a keyboard for inputting programs and various commands. In this example, a program input key 6, a write key 7 for instructing writing to the memory block 2, a switching key 8 for switching between reading and writing, a clear key 9 for clearing the contents of the counter 12, and "1", A manual pulse generator 10 for alternately generating “0” signals and a two-input OR circuit 11 are provided.

Each of these blocks is provided with a diode lamp that is turned on or off in accordance with the state of the pulse “1” or “0” so that its function can be seen visually. How the "0" information is stored in memory block 2 and CPU block 3
Input interface block 4 according to the program of
It is designed so that it is easy to understand how to process the input information from each of them and output the processing result to the output interface block 5 easily.

An example of a learning system using these learning simulators will be described below.

1. Program Creation For example, to realize the circuit shown in FIG. 3, a commercially available programmable controller PC (for example, Mitsubishi Electric's F1 series) has the switch SW1 connected to the input terminal 400 and the switch SW
When 2 is connected to 401 and the output terminal is connected to 430, a ladder diagram (a kind of sequence circuit diagram) as shown in FIG. 4 is obtained, and the program is as shown in Table 1.

The program creation of this programming training device is the third
To realize the circuit shown in the figure, switch SW1, switch SW2
It is necessary to clarify the connection relationship between the input interface 4 and the CPU block 3.

For example, if the wiring is as shown in FIG.
Switch SW1 is in CPU block 3 as shown
When the fifth bit from the left of the I / O image register becomes 1, only the information of “1” and “0” of the switch SW1 can be taken into the CPU block 3. Similarly, the information of the switch SW2 can be taken into the CPU block 3 by setting the sixth bit from the left to “1”.

That is, “00” is stored in the I / O image register of the CPU block 3.
By transferring the binary number "001000", the information of the switch SW1 is taken into the CPU block 3. This "00001"
The binary number “000” is the input terminal number “400” of a commercially available PC (“400” is processed as a binary number of “10000000” inside the PC).

Next, when it is determined which input information is to be captured, it is necessary to determine how to process the input information. That is the command. It is the CPU that determines the processing method
Instruction register in block 3. Each bit of the instruction register is connected to each AND gate on the upper part of the CPU block 3 as shown in FIG. Note that pin jacks are attached to the terminal of each bit of the instruction register and the input terminal of each AND gate on the upper part of the CPU block 3, so that the promise of processing can be changed by the selection of the learner.

FIGS. 8A to 8C show the processing contents at the time of connection shown in FIG. FIG. 8 (a) shows the connection state of AND gates 31 and 32, (b) shows the connection state of AND gates 41 to 43,
(C) shows the connection state of the AND gates 51 and 52, respectively.

In FIG. 8 (a), A indicates AND gates 31 and 3 when the input signal is not inversed and B indicates the inversed input signal.
It shows how to give a command to 2.

In FIG. 8 (b), when A selects LD, B
When AND is selected, C indicates how to give a command to the AND gates 41 to 43 when OR is selected.

In FIG. 8 (c), when A outputs a signal, B
Indicates a method of giving a command to the AND gates 51 and 52 in the case where the output is temporarily stored without being output.

Considering the above, the program is as shown in Table 2. When this program is stored in the memory and executed, it turns out that it works exactly the same as a commercially available PC.

Next, the steps from program input to execution are performed in the following procedure.

Through these learnings, the learner can visually understand the function of each block in FIG. 1 and understand that programming is a list of promises.

In the final course, control equipment such as motors and air cylinders,
By controlling a mini-plant that uses various sensors abundantly, it is possible to construct a system that is very advanced and very similar to the on-site system.

When this system was used for learning, the on-site operator who had no knowledge became able to perform fairly advanced programming after learning, and was able to change and maintain PC programs on site.

〔The invention's effect〕

As described above, the present invention has the following effects.

The CPU simulator is designed so that the process of decoding and judging the instructions and data “1” and “0” (binary information) from the memory block can be seen visually, and how the promised programming language is controlled You can easily understand if you work as intended.

In the final process, control devices such as motors and air cylinders,
By controlling a model plant that uses various types of sensors, it is possible to develop the ability to broadly understand the entire PC control system required in actual sites.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of a programming training device according to the present invention, FIG. 2 is a detailed view thereof, and FIGS. 3 to 8 are explanatory diagrams showing an example of training using the training device according to the present invention. It is. 1: Pulse oscillation block 2: Memory block 3: CPU block 4: Input interface 5: Output interface 6: Program input key, 7: Write key 8: Switching key, 9: Clear key 10: Pulse generator, 11: OR circuit 12: Counter 21 ~ 23,31,32,41 ~ 43,51,52: And gate

Claims (1)

(57) [Claims] 1. A pulse oscillation block (1) for oscillating a pulse of variable frequency, a memory block (2) for storing a program input from a program input key (6),
A CPU block (3) for processing input information according to a program command output from the memory block (2), and an input interface block (4) for converting information from an external sensor into an electric level that can be handled by the CPU block (3). And an output interface block (5) for converting an information result processed by the CPU block (3) into an electric level necessary for controlling a control target. Each of the blocks (1) to (5) includes an electronic interface. The CPU block (3) includes a diode lamp for displaying an on / off state of the element, and the CPU block (3) includes four AND gates (21).
(24) and two AND gates (31) and (32) for selecting whether to directly take in the output of the AND gates (21) to (24) or invert and take in the outputs.
(32) AND gates (41) to (43) for selecting whether to output the output of LOAD, AND or OR, and outputs the outputs of the AND gates (41) to (43) to the output interface Or gate (5
1) and (52), and the AND gates (21) to (2)
4) 3 input from the input interface to each input terminal
The two external signals are connected to the common output signals of the AND gates (51) and (52), respectively.
A signal line for determining which external signal from the memory block (2) is to be taken is connected to each other input terminal of (24), and the AND gates (31), (32), (41) to (4) are connected.
A programming training device, characterized in that a command signal line for determining a calculation method from the memory block (2) is connected to the other input terminal of (3).