KR900010509A - With programmable control - Google Patents

With programmable control Download PDF

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Publication number
KR900010509A
KR900010509A KR1019880017640A KR880017640A KR900010509A KR 900010509 A KR900010509 A KR 900010509A KR 1019880017640 A KR1019880017640 A KR 1019880017640A KR 880017640 A KR880017640 A KR 880017640A KR 900010509 A KR900010509 A KR 900010509A
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South Korea
Prior art keywords
data
input
unit
control
program
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KR1019880017640A
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Korean (ko)
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KR910002021B1 (en
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권택준
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이경훈
대우중공업 주식회사
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Publication of KR900010509A publication Critical patent/KR900010509A/en
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Publication of KR910002021B1 publication Critical patent/KR910002021B1/en

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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Programmable Controllers (AREA)

Abstract

내용 없음No content

Description

프로그래머블 콘크롤로Programmable crawler

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 프로그래머블 콘트롤러의 개략블럭도, 제2도는 제1도에서의 연산장치의 상세회로도, 제3도는 제2도에서 연산로직부의 연산동작을 설명하기 위한 설명도, 제4도는 제2도에서의 연산로직부의 상세회로도.1 is a schematic block diagram of a programmable controller of the present invention, FIG. 2 is a detailed circuit diagram of the computing device in FIG. 1, FIG. 3 is an explanatory diagram for explaining the operation of the operation logic unit in FIG. Detailed circuit diagram of the operational logic portion in FIG.

Claims (3)

데이타의 입출력을 위한 입출력 인터페이스부, 사용자 프로그램을 입력하기 위한 프로그램 입력장치, 상기 입출력 인터페이스부와 상기 프로그램 입력장치로부터의 데이타와 사용자 프로그램에 의해 연산 및 제어를 행하는 중앙처리장치와 상기사용자 프로그램과 입출력데이타를 기억하는 RAM부를 구비하여 시퀸스제어를 행하는 프로그래머블 콘트롤러에 있어서, 상기 중앙처리장치로부터의 제어신호를 입력받아 상기 RAM부의 프로그램영역을 처음번지부터 주사하여 프로그램영역의 명령과 입력영역의 접점데이타를 페취하면서 실제 연산을 실행하고, 연산 결과를 RAM부의 출력영역에 기억시키도록 한 연산장치를 구비한 것을 특징으로 하는 프로그래머블 콘트롤러.An input / output interface unit for inputting / outputting data, a program input device for inputting a user program, a central processing unit for performing operations and control by the data input and output from the input / output interface unit and the program input device, and the user program and input / output A programmable controller having a RAM section for storing data and performing sequence control, wherein the control signal from the central processing unit is input to scan the program section of the RAM section from the first address, and the instruction data of the program section and the input data of the input section are scanned. And a computing device configured to execute the actual operation while fetching, and to store the calculation result in the output area of the RAM unit. 제1항에 있어서, 상기 연산장치가, 상기 중앙처리장치로부터 제어신호를 입출력하는 제어신호 인터페이스수단, 원하는 접점데이타 및 프로그램데이타를 읽어들이기 위한 어드레스 생성수단, 상기 어드레스 생성수단에 의해 RAM부로 부터 읽어온 프로그램 데이타 및 접점 데이타를 연산동작에 맞게 변환 및 저장하는 저장수단, 상기 제어신호 인터페이스수단과 상기 저장수단으로 부터 상기 중앙제어 장치부터의 제어 및프로그램 명령 데이타를 입력하여 상기 연산장치를 제어하는 제어수단과, 상기 제어수단과 상기 저장수단으로부터 데이타 및 제어신호를 입력받아 실제 연산을 행하고, 그결과를 출력하는연산로직부를 구비한 것을 특징으로 하는 프로그래머블 콘트롤러.2. The apparatus according to claim 1, wherein said computing device reads from a RAM section by control signal interface means for inputting and outputting a control signal from said CPU, address generation means for reading desired contact data and program data, and said address generation means. Storage means for converting and storing on-program data and contact data in accordance with arithmetic operation, control for controlling said arithmetic device by inputting control and program command data from said control signal interface means and said storage means from said central control device; And a calculation logic unit which receives data and control signals from said control means and said storage means, performs an actual operation, and outputs the result. 제2항에 있어서, 상기 연산로직부가 상기 제어수단으로부터 연산부호명령과 상기 저장수단으로부터 접점데이타를 직렬데이타로 입력받아 각각의 명령을 병렬데이타로 출력하는 다수개의 직렬입력-병렬출력부와, 상기 각각의 직렬입력-병렬출력부로부터의 신호를 동시에 입력하여 상기 연산부명령과 접점데이타를 결합하여 실제 연산을 행하고, 출력 및 쉬프트로직부로부터 귀환된 신호가 있는 경우 귀환신호를 접점데이타 및 연산부명령과 결합하여 연산하여 그 결과를 병렬로 출력하는 조합논리부와, 상기 조합논리부로부터의 신호를 병렬로 입력받아 일시 기억했다가, 병렬로 상기 조합논리부로 귀환시키고, 클럭 및 쉬프트신호에 따라 직렬로 결과 데이타를 출력하는 출력 및 쉬프트로직부를 구비한 것을 특징으로 하는 프로그래머블 콘트롤러.3. The apparatus of claim 2, wherein the operation logic unit receives a plurality of operation code commands from the control unit and contact data from the storage unit as serial data, and outputs each command as parallel data; Simultaneously input the signals from each serial input-parallel output unit to combine the operation unit command and the contact data to perform the actual operation, and if there is a signal returned from the output and shift logic unit, the feedback signal is converted into the contact data and operation unit command. The combined logic unit which combines and computes and outputs the result in parallel, and receives and temporarily stores the signals from the combined logic unit in parallel, returns them to the combined logic unit in parallel, and serially according to the clock and shift signal. And a shift logic section for outputting result data. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019880017640A 1988-12-28 1988-12-28 Programmable controller KR910002021B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019880017640A KR910002021B1 (en) 1988-12-28 1988-12-28 Programmable controller

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Application Number Priority Date Filing Date Title
KR1019880017640A KR910002021B1 (en) 1988-12-28 1988-12-28 Programmable controller

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KR900010509A true KR900010509A (en) 1990-07-07
KR910002021B1 KR910002021B1 (en) 1991-03-30

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100363463B1 (en) * 1999-02-01 2002-11-30 알프스 덴키 가부시키가이샤 switch and fitting structure thereof
KR100413674B1 (en) * 1996-12-05 2004-02-14 삼성전자주식회사 Device for generating hard wired sub routine

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100413674B1 (en) * 1996-12-05 2004-02-14 삼성전자주식회사 Device for generating hard wired sub routine
KR100363463B1 (en) * 1999-02-01 2002-11-30 알프스 덴키 가부시키가이샤 switch and fitting structure thereof

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Publication number Publication date
KR910002021B1 (en) 1991-03-30

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