JP2751864B2 - Oxygen diffusion barrier electrode and its manufacturing method - Google Patents
Oxygen diffusion barrier electrode and its manufacturing methodInfo
- Publication number
- JP2751864B2 JP2751864B2 JP7089184A JP8918495A JP2751864B2 JP 2751864 B2 JP2751864 B2 JP 2751864B2 JP 7089184 A JP7089184 A JP 7089184A JP 8918495 A JP8918495 A JP 8918495A JP 2751864 B2 JP2751864 B2 JP 2751864B2
- Authority
- JP
- Japan
- Prior art keywords
- diffusion barrier
- oxygen diffusion
- electrode
- oxygen
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Electrodes Of Semiconductors (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は半導体表面に形成した電
極構造及びその製造方法に関する。The present invention relates to an electrode structure formed on a semiconductor surface and a method of manufacturing the same.
【0002】[0002]
【従来の技術】従来より、強誘電体などの酸化物誘電体
をキャパシタとして半導体集積回路中に組み込もうとす
る場合、多くの酸化物誘電体の作製時に必要な500℃
以上の高温と酸化性雰囲気によってキャパシタ用下部電
極として用いられた多結晶シリコンが酸化されコンタク
ト不良が発生してしまうという問題があった。そこで多
くの場合図3の様に下部電極として耐熱性、耐酸化性の
高いPtなどの高融点貴金属が用いられる。つまり、高
融点貴金属層1の下にTiNなどのシリコンバリア層2
を配置することにより高融点貴金属のシリサイド化を防
ぎ酸化物誘電体作製に耐えうる電極として用いられてい
る。導電性酸化物電極も酸化雰囲気に対して安定である
ため、その下にシリコンバリア層を備えてシリサイド化
を防ぐことによって使用する事が検討されている。2. Description of the Related Art Conventionally, when an oxide dielectric such as a ferroelectric is to be incorporated as a capacitor into a semiconductor integrated circuit, a temperature of 500 ° C. which is required when many oxide dielectrics are manufactured.
There has been a problem that the polycrystalline silicon used as the lower electrode for the capacitor is oxidized due to the high temperature and the oxidizing atmosphere, and a contact failure occurs. Therefore, in many cases, a high melting point noble metal such as Pt having high heat resistance and oxidation resistance is used as the lower electrode as shown in FIG. That is, a silicon barrier layer 2 of TiN or the like under the high melting point noble metal layer 1
Is used as an electrode that prevents silicidation of the high melting point noble metal and can withstand oxide dielectric production. Since the conductive oxide electrode is also stable to an oxidizing atmosphere, it has been studied to use the conductive oxide electrode by providing a silicon barrier layer thereunder to prevent silicidation.
【0003】[0003]
【発明が解決しようとする課題】しかしながら従来の下
部電極構造には次のような問題点があった。Ptなどの
高融点貴金属を用いる場合は、高融点金属薄膜の結晶粒
界を酸素が透過することが可能で、酸化物誘電体作製時
に高融点貴金属の下のシリコンバリア層として使用され
ているTiNが酸化され絶縁性の酸化チタンが形成され
シリコン基板側との導通不良が発生してしまう。また導
電性酸化物を使用する場合もシリコンバリアのTiN上
に導電性酸化物を作製する時点でTiNが酸化されてし
まいやはり導通不良が発生し問題の解決にはならなかっ
た。However, the conventional lower electrode structure has the following problems. When a high melting point noble metal such as Pt is used, oxygen can pass through the crystal grain boundaries of the high melting point metal thin film, and TiN used as a silicon barrier layer under the high melting point noble metal during oxide dielectric fabrication. Is oxidized to form an insulative titanium oxide, resulting in poor conduction with the silicon substrate. Also, when a conductive oxide is used, TiN is oxidized at the time of forming the conductive oxide on the TiN of the silicon barrier, so that a conduction failure occurs and the problem is not solved.
【0004】本発明の目的は、上記問題点を解決できる
電極構造を提供することにある。[0004] It is an object of the present invention to provide an electrode structure that can solve the above problems.
【0005】[0005]
【課題を解決するための手段】本発明は半導体表面と電
気的接触を行う電極において、該半導体表面上に形成し
た半導体拡散バリア層上に積層した多結晶高融点貴金属
層の柱状結晶の結晶粒界に酸素拡散バリア部を設けたこ
とを特徴とする酸素拡散バリア性電極である。ここで上
記酸素拡散バリア部はTi、Zr、Ta、Ruのいずれ
か1種もしくは複数種類を組み合わせた金属の酸化物か
らなることが好ましい。又この酸化拡散バリア性電極の
製造方法は、半導体表面に半導体拡散バリア層を形成
し、該半導体拡散バリア層上にTi、Zr、Ta、Ru
のいずれか1種もしくは複数種類を組み合わせた金属層
を挟んで柱状の結晶からなる多結晶高融点貴金属層を形
成した後、非酸化雰囲気中で450〜650℃で熱処理
する工程を有することを特徴とする。ここで、さらに高
融点金属層上に析出した上記バリア性金属を除去する工
程を有していてもよい。According to the present invention, there is provided an electrode for making electrical contact with a semiconductor surface, wherein a columnar crystal grain of a polycrystalline high melting point noble metal layer laminated on a semiconductor diffusion barrier layer formed on the semiconductor surface is provided. An oxygen diffusion barrier electrode comprising an oxygen diffusion barrier portion provided in the field. Here, the oxygen diffusion barrier portion is preferably made of a metal oxide of one or a combination of Ti, Zr, Ta, and Ru. Further, in the method of manufacturing an oxidation diffusion barrier electrode, a semiconductor diffusion barrier layer is formed on a semiconductor surface, and Ti, Zr, Ta, and Ru are formed on the semiconductor diffusion barrier layer.
Forming a polycrystalline high-melting-point noble metal layer composed of columnar crystals with a metal layer of any one or a combination of a plurality of types interposed therebetween, and then performing a heat treatment at 450 to 650 ° C. in a non-oxidizing atmosphere. And Here, the method may further include a step of removing the barrier metal deposited on the refractory metal layer.
【0006】[0006]
【作用】本発明による電極構造を高融点金属としてPt
を用いた例を図1に示す。Ptはスパッタ法などで作製
される場合、特別な基板を選ばない限り多結晶膜となり
結晶粒は柱状構造となる。Pt上に酸化物誘電体を作製
する場合この柱状のPtの結晶粒界を通して酸素が拡散
してPtの下のTiNなどのシリコンバリアを酸化して
コンタクト不良が発生する。このように酸素の拡散は粒
界が主要なパスであるためこの粒界に酸化される前は酸
素に対してトラップとして機能し、酸化された後は酸素
の拡散に対して障壁として機能する酸素バリア性の金
属、例えばTiを配置すれば酸素の粒界拡散を抑えるこ
とができ、結果的にTiNの酸化を抑制できる。またP
tの結晶粒界は基板面に垂直に形成されているため、こ
の部分に酸素バリア性の金属の酸化物が存在しその酸化
物が絶縁性であってもコンタクト抵抗を増大させること
はないため、導電性酸化物となる金属、例えばRu、の
ほかに絶縁性の酸化物となる金属、たとえばZr、Ta
等を用いることが可能である。The electrode structure according to the present invention uses Pt as a refractory metal.
1 is shown in FIG. When Pt is produced by a sputtering method or the like, a polycrystalline film is formed and the crystal grains have a columnar structure unless a special substrate is selected. When an oxide dielectric is formed on Pt, oxygen diffuses through the columnar Pt crystal grain boundaries and oxidizes a silicon barrier such as TiN under Pt to cause a contact failure. In this way, oxygen diffusion acts as a trap for oxygen before being oxidized to the grain boundary because the grain boundary is the main path, and oxygen acts as a barrier to oxygen diffusion after being oxidized. If a metal having a barrier property, for example, Ti is arranged, diffusion of oxygen at the grain boundary can be suppressed, and as a result, oxidation of TiN can be suppressed. Also P
Since the crystal grain boundary of t is formed perpendicular to the substrate surface, an oxide of a metal having an oxygen barrier property exists in this portion, and the oxide does not increase the contact resistance even if the oxide is insulative. , A metal that becomes an electrically conductive oxide, for example, Ru, and a metal that becomes an insulating oxide, for example, Zr, Ta
Etc. can be used.
【0007】[0007]
(実施例1)図2は高融点貴金属としてPt、酸素バリ
ア性金属としてTiを用いた場合の下部電極及びキャパ
シタ作製時の各段階での深さ方向の組成分析結果を示し
たものである。図2(a)では基板側から多結晶シリコ
ン、TiN/Ti積層シリコンバリア層、厚さ20nmの
Ti酸素拡散バリア層、同じく200nmのPt層を示し
た。図2(a)の構造を500℃窒素中で30分熱処理
したところ図2(b)に示す様にPtの下のTi層はP
t層中とPt表面に拡散した。このとき試料の断面を高
分解能電子顕微鏡で観察すると、拡散したTiはPtの
表面と結晶粒界に析出していることが観察された。Pt
表面に析出したTiをエッチング除去した後に酸化物誘
電体としてジルコン酸チタン酸鉛(PZT)をゾルゲル
法で600℃で60分の熱処理で作製した。PZT作製
後の組成分析結果は図2(c)の様になり、Pt粒界に
存在するTiはPt表面近傍では酸化されていることが
分かったが、TiN側のPt粒界のTiは酸化されてお
らずTiN層も酸化されていないことが示された。この
電極構造をイオンミリング法により10μm ×10μm
に微細加工しコンタクト抵抗を測定したところ、30〜
50Ωとなり下部電極としての導通に問題がないことが
確認された。必要なPt膜厚は酸化雰囲気中の熱処理時
間と温度に依存したが、600℃以下でかつ60分以下
の熱処理ならば150nm以上が望ましく、150nm以下
ではコンタクト抵抗値が増大する傾向が見られた。(Example 1) FIG. 2 shows the results of composition analysis in the depth direction at each stage of the fabrication of a lower electrode and a capacitor when using Pt as a high melting point noble metal and Ti as an oxygen barrier metal. FIG. 2A shows, from the substrate side, polycrystalline silicon, a TiN / Ti laminated silicon barrier layer, a 20 nm thick Ti oxygen diffusion barrier layer, and a 200 nm Pt layer. When the structure of FIG. 2A was heat-treated for 30 minutes in nitrogen at 500 ° C., as shown in FIG.
It diffused in the t layer and on the Pt surface. At this time, when the cross section of the sample was observed with a high-resolution electron microscope, it was observed that the diffused Ti was precipitated on the surface of Pt and crystal grain boundaries. Pt
After the Ti deposited on the surface was removed by etching, lead zirconate titanate (PZT) was produced as an oxide dielectric by heat treatment at 600 ° C. for 60 minutes by a sol-gel method. FIG. 2 (c) shows the result of the composition analysis after PZT fabrication, and it was found that Ti present at the Pt grain boundary was oxidized near the Pt surface, but Ti at the Pt grain boundary on the TiN side was oxidized. And the TiN layer was not oxidized. This electrode structure is 10 μm × 10 μm by ion milling.
When the contact resistance was measured after microfabrication,
It was 50Ω, and it was confirmed that there was no problem in conduction as the lower electrode. The required Pt film thickness depends on the heat treatment time and temperature in an oxidizing atmosphere, but if the heat treatment is performed at a temperature of 600 ° C. or less and 60 minutes or less, 150 nm or more is desirable, and when it is 150 nm or less, the contact resistance tends to increase. .
【0008】(実施例2)高融点貴金属としてIr、酸
素バリア性金属としてTiを用いた場合を説明する。作
製方法は実施例1と同様で基板側から多結晶シリコン、
TiN/Ti積層シリコンバリア層、厚さ20nmのTi
酸素拡散バリア層、同じく200nmのIr層を成膜した
後、この構造を650℃窒素中で30分熱処理すること
によりIrの下のTi層はIrの粒界を拡散しIr粒界
とIr表面に析出した。Ir表面に析出したTiをエッ
チング除去した後に酸化物誘電体としてジルコン酸チタ
ン酸鉛(PZT)をゾルゲル法で600℃で作製し、P
ZTを除去した部分をイオンミリング法により10μm
×10μm に微細加工しコンタクト抵抗を測定したとこ
ろ、50〜100Ωとなり下部電極としての導通に問題
がないことが確認された。Ir電極の場合Ir表面が6
00℃酸素中で酸化されたが、IrO2 は導電性酸化物
であり電極の導電性を妨げることはなかった。Ir電極
の場合、酸素バリア性金属を粒界拡散させるのに必要な
温度がPt電極を用いた場合より100〜150℃程度
高かった。(Embodiment 2) A case where Ir is used as a high melting point noble metal and Ti is used as an oxygen barrier metal will be described. The manufacturing method is the same as that of the first embodiment.
TiN / Ti laminated silicon barrier layer, 20 nm thick Ti
After forming an oxygen diffusion barrier layer, also an Ir layer of 200 nm, this structure is heat-treated at 650 ° C. for 30 minutes in nitrogen, so that the Ti layer under Ir diffuses the Ir grain boundary, and the Ir grain boundary and the Ir surface. Was precipitated. After the Ti deposited on the Ir surface is removed by etching, lead zirconate titanate (PZT) is formed as an oxide dielectric by a sol-gel method at 600 ° C.
The part from which ZT was removed was 10 μm thick by ion milling.
When the contact resistance was measured after fine processing to a size of × 10 μm, it was 50 to 100Ω, and it was confirmed that there was no problem in conduction as the lower electrode. In case of Ir electrode, Ir surface is 6
Although oxidized in oxygen at 00 ° C., IrO 2 was a conductive oxide and did not hinder the conductivity of the electrode. In the case of the Ir electrode, the temperature required for the grain boundary diffusion of the oxygen barrier metal was higher by about 100 to 150 ° C. than in the case of using the Pt electrode.
【0009】表1はPtもしくはIr電極と、各種の酸
素バリア性金属を用いた各組み合わせによるコンタクト
抵抗を示している。Zr、Ta、Ruの各元素でコンタ
クト抵抗値は下部電極として使用する上で問題のない値
となった。Table 1 shows the contact resistance of each combination using a Pt or Ir electrode and various oxygen barrier metals. The contact resistance value of each element of Zr, Ta, and Ru was a value having no problem when used as a lower electrode.
【0010】[0010]
【表1】 [Table 1]
【0011】[0011]
【発明の効果】半導体表面上から電気的接触をとる多結
晶高融点貴金属において、多結晶高融点貴金属の柱状結
晶の粒界に酸素拡散バリア部を設けることにより、その
結晶粒界を介して半導体表面と高融点貴金属電極間に拡
散する酸素の侵入を防ぎ、電気的導通は結晶粒界以外の
結晶部分で確保することにより、半導体表面上に、導電
性の良好な多結晶高融点貴金属電極を実現できる。According to the present invention, in a polycrystalline high melting point noble metal which makes electrical contact from the surface of a semiconductor, an oxygen diffusion barrier portion is provided at a grain boundary of a columnar crystal of the polycrystalline high melting point noble metal, and the semiconductor is interposed through the crystal grain boundary. By preventing the diffusion of oxygen that diffuses between the surface and the high-melting noble metal electrode and ensuring electrical continuity in the crystal parts other than the crystal grain boundaries, a highly conductive polycrystalline high-melting noble metal electrode is formed on the semiconductor surface. realizable.
【図1】本発明による高融点貴金属粒界に酸素バリア性
金属を配置した下部電極構造を示す図である。FIG. 1 is a diagram showing a lower electrode structure in which an oxygen barrier metal is disposed at a high melting point noble metal grain boundary according to the present invention.
【図2】高融点貴金属としてPt、酸素バリア性金属と
してTiを用いた場合の下部電極及びキャパシタ作製時
の各段階での深さ方向の組成分析結果である。FIG. 2 is a result of a composition analysis in a depth direction at each stage when a lower electrode and a capacitor are manufactured when Pt is used as a high melting point noble metal and Ti is used as an oxygen barrier metal.
【図3】従来の酸素バリア性金属を用いない場合の下部
電極構造を示す図である。FIG. 3 is a diagram showing a lower electrode structure in the case where a conventional oxygen barrier metal is not used.
1 Pt下部電極(高融点貴金属層) 2 TiN/Ti積層シリコンバリア層 3 多結晶シリコン 4 Ti(酸素バリア性金属) Reference Signs List 1 Pt lower electrode (high melting point noble metal layer) 2 TiN / Ti laminated silicon barrier layer 3 Polycrystalline silicon 4 Ti (oxygen barrier metal)
Claims (4)
て、該半導体表面に設けられた半導体拡散バリア層上に
積層された多結晶高融点貴金属層の柱状結晶の結晶粒界
に酸素拡散バリア部を設けたことを特徴とする酸素拡散
バリア性電極。In an electrode which makes electrical contact with a semiconductor surface, an oxygen diffusion barrier portion is formed at a crystal grain boundary of a columnar crystal of a polycrystalline high melting point noble metal layer laminated on a semiconductor diffusion barrier layer provided on the semiconductor surface. An oxygen diffusion barrier electrode comprising:
uのいずれか1種もしくは複数種類を組み合わせた金属
の酸化物からなることを特徴とする請求項1記載の酸素
拡散バリア性電極。2. An oxygen diffusion barrier section comprising Ti, Zr, Ta, R
2. The oxygen diffusion barrier electrode according to claim 1, comprising an oxide of a metal obtained by combining one or more of u.
し、該半導体拡散バリア層上にTi、Zr、Ta、Ru
のいずれか1種もしくは複数種類を組み合わせた金属層
を挟んで柱状の結晶からなる多結晶高融点貴金属層を形
成した後、非酸化雰囲気中で450〜650℃で熱処理
する工程を有することを特徴とする請求項1または2に
記載の酸素拡散バリア性電極の製造方法。3. A semiconductor diffusion barrier layer is formed on a semiconductor surface, and Ti, Zr, Ta, and Ru are formed on the semiconductor diffusion barrier layer.
Forming a polycrystalline high-melting-point noble metal layer composed of columnar crystals with a metal layer of any one or a combination of a plurality of types interposed therebetween, and then performing a heat treatment at 450 to 650 ° C. in a non-oxidizing atmosphere. Claim 1 or 2
A method for producing the oxygen diffusion barrier electrode according to the above.
理した後、高融点金属層上に析出した上記バリア性金属
を除去する工程を有することを特徴とする請求項3記載
の酸素拡散バリア性電極の製造方法。4. The oxygen diffusion barrier according to claim 3, further comprising a step of removing the barrier metal deposited on the refractory metal layer after heat treatment at 450 to 650 ° C. in a non-oxidizing atmosphere. Method for producing a conductive electrode.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7089184A JP2751864B2 (en) | 1995-04-14 | 1995-04-14 | Oxygen diffusion barrier electrode and its manufacturing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7089184A JP2751864B2 (en) | 1995-04-14 | 1995-04-14 | Oxygen diffusion barrier electrode and its manufacturing method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH08288239A JPH08288239A (en) | 1996-11-01 |
JP2751864B2 true JP2751864B2 (en) | 1998-05-18 |
Family
ID=13963663
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP7089184A Expired - Lifetime JP2751864B2 (en) | 1995-04-14 | 1995-04-14 | Oxygen diffusion barrier electrode and its manufacturing method |
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Country | Link |
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JP (1) | JP2751864B2 (en) |
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KR100243285B1 (en) * | 1997-02-27 | 2000-02-01 | 윤종용 | High-dielectric capacitor and manufacturing method thereof |
EP0893832A3 (en) | 1997-07-24 | 1999-11-03 | Matsushita Electronics Corporation | Semiconductor device including a capacitor device and method for fabricating the same |
KR100333667B1 (en) * | 1999-06-28 | 2002-04-24 | 박종섭 | Method for fabricating capacitor of ferroelectric random access memory device |
JP5205741B2 (en) | 2006-11-14 | 2013-06-05 | 富士通セミコンダクター株式会社 | Manufacturing method of semiconductor device |
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US5348894A (en) * | 1993-01-27 | 1994-09-20 | Texas Instruments Incorporated | Method of forming electrical connections to high dielectric constant materials |
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1995
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