JP2743893B2 - Driver circuit failure determination method, failure location reporting method and peripheral device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interface circuit, and more particularly to a technique for detecting a failure in an interface circuit of a magnetic disk drive.

[0002]

2. Description of the Related Art In a system in which a host controller and a plurality of magnetic disk devices are connected in parallel via a bus, the output of a driver circuit of a certain host interface circuit is fixed at 0 level regardless of the input. Failure, ie "0"
When a failure occurs, the outputs of the driver circuits of the other magnetic disk devices are also fixed to the 0 level, so that the higher level controller cannot receive the signal output from the magnetic disk device, and all the magnetic disk devices connected in parallel have the higher level. The device cannot be controlled. At this time, in order to isolate the failed magnetic disk device, all the magnetic disk devices must be checked one by one.

Conventional methods and circuits for detecting a failure of a peripheral device or an interface include the following.

Japanese Patent Application Laid-Open No. 59-751 discloses that when a control device such as a central processing unit accesses a peripheral device such as a memory or an input / output interface via a bus line, the peripheral device responds to control signals from the control device. A failure detection method for a computer which detects a failure of the peripheral device based on a response from the device is disclosed.

Japanese Utility Model Laid-Open Publication No. 3-37541 discloses an interface for stopping data transfer to the main control unit when the next data is transmitted without data reception processing of the output device after data transmission by the main control unit. A failure detection circuit is disclosed.

In these methods, the control device attempts to detect a failure of the controlled device by detecting an error in the response of the controlled device, and can detect that the response of the controlled device is abnormal. However, when the controlled devices are connected in parallel, if a failure occurs in the interface of one peripheral device, the problem that all the devices become unusable, and it is difficult to determine the location of the failure. The problem that there is is not solved.

[0007]

The first problem is that, when the output of a driver circuit of a certain peripheral device fails to "0", all the peripheral devices connected in parallel to the peripheral device are sent from the higher-level device. It is out of control.

[0008] The reason is that if the output of one driver circuit fails to "0", the signal value on the bus is fixed to "0" even if any other driver circuit outputs "1". It is because.

A second problem is that when the output of a driver circuit of a certain peripheral device has a "0" failure, it cannot be determined which driver circuit has failed.

[0010] The reason is that if the output of one driver circuit is "0" fault, it will be "0" even if any other driver circuit outputs "1". For this reason,
It is possible to determine whether the reason why the output of the driver circuit remains "0" and does not become "1" is due to the failure of the driver circuit of its own circuit or the failure of another driver circuit connected in parallel to the bus. Because there is no.

[0011]

SUMMARY OF THE INVENTION An object of the present invention is to improve the drawbacks of the conventional magnetic disk drive, detect that a driver circuit of an interface circuit has failed, and disconnect the output of the failed driver circuit from other driver circuits. To prevent the magnetic disk drive from becoming uncontrollable, and disconnecting the output of the driver circuit to determine whether its own circuit or another driver circuit is defective, and determine whether the circuit is in the same magnetic disk drive. It is an object of the present invention to clarify which magnetic disk device has failed by reporting a higher-level device from an interface circuit unit of another system, thereby shortening the failure recovery time.

[0012]

A driver circuit failure detecting method according to the present invention is characterized in that the output of each driver circuit in an interface circuit section of a peripheral device is connected to the interface of another peripheral device via the same signal line on the interface. In a peripheral subsystem or computer system connected to the output of each corresponding driver circuit in the circuit section and the input of each corresponding receiver circuit in the interface circuit section of the higher-level device, the signal level of the output of the driver circuit is determined. Convert back to the input signal level,
A mismatch between the output of the driver circuit after returning the signal level and the input of the driver circuit is detected.

A driver circuit failure detection circuit according to the present invention comprises:
Circuit means for converting the signal level of the output of the driver circuit back to the signal level of its input, and circuit means for detecting a mismatch between the output of the driver circuit after returning the signal level and the input of the driver circuit; It is characterized by having.

The driver circuit failure detecting circuit according to the present invention is characterized in that it comprises means for disconnecting the output of the driver circuit from the interface at a subsequent stage of the driver circuit.

The driver circuit failure determination method of the present invention comprises:
If you detect a discrepancy using the discrepancy detection method,
Disconnecting the output of the driver circuit by the means for disconnecting the output of the driver circuit according to claim 3, and if the means for detecting mismatch does not detect the mismatch, it is determined that the driver circuit itself is faulty; If the means for detecting mismatch does not detect the mismatch, it is determined that the driver circuit of another peripheral device on the interface ahead of the means for cutting off the output of the driver circuit has failed.

The fault location reporting method according to the present invention is characterized in that a plurality of routes are provided in an interface for reporting a fault location, and that the occurrence of a fault in one route is reported from another route to a higher-level device. .

The peripheral device of the present invention has a plurality of paths in an interface for reporting a fault location to a higher-level device,
It has a driver circuit failure discrimination circuit that sends a driver failure discrimination signal to another path to notify that a failure has occurred in a certain path and whether the driver circuit of the device has failed or the driver circuit of another peripheral device has failed. , Through a driver circuit of another path to the host device.

According to the present invention, there is provided a peripheral device including a fault detecting circuit based on the driver circuit fault detecting method according to the first aspect of the present invention, a fault determining circuit based on the driver circuit fault determining method according to the fourth aspect, and an interface circuit. And a control circuit based on the fault location reporting method described in (1).

According to a second aspect of the present invention, there is provided a peripheral device comprising: a driver circuit failure detecting circuit according to a third aspect of the present invention; And a control circuit based on a location reporting method.

Detecting that the driver circuit of the higher-level interface circuit has failed, and disconnecting the output of the failed driver circuit from the bus to which other driver circuits are also connected, makes all the magnetic disk drives uncontrollable. Can be avoided.

By reporting the failure of the driver circuit to the higher-level device from another system, the higher-level device can recognize which magnetic disk device has failed, and the failure recovery time can be reduced.

[0022]

BEST MODE FOR CARRYING OUT THE INVENTION

[1] Description of Configuration Next, an embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a magnetic disk drive according to the present invention and the configuration of a circuit unit for implementing a driver circuit failure detection method, a driver circuit failure determination method, and a failure report method.

FIG. 5 is a block diagram showing a configuration in which a plurality of magnetic disk devices of the present invention and a host controller are connected by a bus.

From the magnetic disk device 43 to the host controller 4
A control signal and a data signal (hereinafter, referred to as an interface signal) 23 are output to 4. That is, the signal 20 (20-1) output from the hard disk 41 via the sequence circuit unit 1 is output to the host controller 44 via the driver circuit 7-1 and the signal disconnection circuit 8-1. The output 22-1 of the driver circuit 7-1 is input to the signal mismatch circuit 10-1 via the receiver circuit 9-1. Further, the signal 20-1, which is one of the signals output from the sequence circuit unit 1, is also the signal mismatch detection circuit 10.
-1 is input. The result 25-1 of comparing the two signals input to the signal mismatch circuit 10-1 is the OR circuit 1
1 is input. The OR circuit 11 outputs the outputs 25-1... 25- of the signal mismatch detection circuits 10-1.
If any one of n does not match, the output signal 25 also does not match (if it does not match, it is assumed to be "1"), and is output to the driver circuit failure determination circuit unit 2. Signal disconnection circuit 8
The signal disconnection control signal 21 for controlling -1 is output from the driver circuit failure determination circuit section 2 to the signal disconnection circuit 8-1. The interface circuit section 3 has n circuits similar to those described above, that is, n bits of interface signals.

The driver circuit failure determination circuit unit 2 includes a timer circuit 12, flip-flop (FF) circuits 13, 15,
17, and AND circuits 14 and 16. The clock 26 is supplied to the timer circuit 12 and the FF circuits 13, 15, 17
Is input to The reset signal 27 is supplied to the FF circuits 13 and 1
5 and 17 are input. The mismatch signal 25 output from the interface circuit unit 3 is
The signals are input to the circuits 14 and 16. Fixed time mismatch signal 25
Is "1", the output 28 of the timer circuit 12 becomes "1", and at the next rising edge of the clock 26, the signal cutting control signal 21 is set to "1", and the signal cutting circuits 8-1. 1 ... 7-n outputs are cut off. The signal disconnection circuits 8-1,..., 8-n can be easily realized by using relays.

At this time, the following two cases are assumed.

First, after the signal disconnection circuits 8-1 to 8-n are activated and the signals are disconnected, that is, the driver circuit 7-
No. 1 output 22-1 is no longer affected by the state of the driver circuit outside the interface circuit section 3, and then the mismatch signal 25 is no longer mismatched. In this case, since the signal disconnection control signal 21 is “1” and the mismatch signal 25 is “0”, the output 32 of the AND circuit 16 is “1”.
The other driver circuit failure signal 34 is set to "1" at the next rising edge of the clock 26 by the FF circuit 17, and is held until the reset signal 27 becomes "0".

Second, after the signal disconnection circuits 8-1 to 8-n are activated and the signals are disconnected, that is, the driver circuit 7-1
The output signal 22-1 is not affected by the state of the driver circuit outside the interface circuit section 3, and the mismatch signal 25 remains mismatched. In this case, since the signal disconnection control signal 21 is "1" and the mismatch signal 25 is also "1", the output 29 of the AND circuit 14 becomes "1" and the FF
The circuit 15 sets the own driver circuit failure signal 31 to "1" at the next rising edge of the clock 26, and then holds the signal until the reset signal 27 becomes "0". Also,
Since the own driver circuit failure signal 31 is input to the set signal of the FF circuit 13, the failed driver circuit 7
The outputs of -1... 7-n are disconnected, so that there is no effect on other driver circuits connected in parallel.

The own driver circuit failure signal 31 and the other driver circuit failure signal 34 are output as a driver failure determination signal 35 to the sequence circuit section 4 of the other system.
In the sequence circuit section 4, the driver failure determination signal 35
Is reported to the host controller 44 through the interface circuit unit 6. Similarly, when the driver circuit of the interface circuit section 6 fails, the sequence circuit section 1 reports to the host controller 44 through the interface circuit section 3 by the driver failure determination signal 36.

In this way, the upper-level control device 44 receives, from all the magnetic disk devices connected in parallel, information on which of the driver circuit of the magnetic disk device and the other driver circuit has failed, and which path (path). ) To receive information on whether a failure has occurred.
From these, it is possible to specify which driver circuit has failed. [2] Description of Operation Next, the operation of the embodiment of the present invention will be described with reference to FIGS.

The time required for the timer circuit 12 to start latching the input is four clocks of the clock 26.

First, a normal operation will be described with reference to FIG.

When the interface signal 20-1 becomes "1" (FIG. 2A), the output of the receiver circuit 9-1 is still "0" (FIG. 2B) at this time. The output 25-1 of "-1" is "1" (FIG. 2C). Subsequently, the mismatch signal 25 also becomes "1" (FIG. 2 (f)). Next, when the output 22-1 of the driver circuit 7-1 becomes "1" (FIG. 2D), the receiver circuit 9-
The output 24-1 of 1 also becomes "1" (FIG. 2 (e)). As a result, the output 25-1 of the signal mismatch detection circuit 10-1 becomes "0" (FIG. 2 (g)), and the mismatch signal 25 also becomes "0" (FIG. 2 (h)). Therefore, the mismatch signal 25
Does not become "1" for 4 + 1 clocks of the clock 26, so that neither the own driver circuit failure signal 31 nor the other driver circuit failure signal 34 becomes "1". At this time, the driver failure determination signal 35 becomes "0" (FIG. 2 (i)).

Next, a case where the output of the own driver circuit (here, the driver circuit 7-1) has failed will be described with reference to FIG.

When the interface signal 20-1 becomes "1" (FIG. 3 (a)), the output of the receiver circuit 9-1 is still "0" (FIG. 3 (b)). The output 25-1 of "-1" is "1" (FIG. 3C). Subsequently, the mismatch signal 25 also becomes "1" (FIG. 3 (f)). Here, the output 22-1 remains "0" (FIG. 3D) because the driver circuit 7-1 has failed.
Therefore, the output 24-1 of the receiver circuit 9-1 is also "0".
(FIG. 3E). Thus, the output 25-1 of the signal mismatch detection circuit 10-1 is also "1" (FIG. 3).
(G)), and then the mismatch signal 25 is also “1”.
(FIG. 3H). Therefore, the timer circuit 12
Output 28 becomes "1" (FIG. 3 (j)) at the rise of the clock 26 after four clocks have elapsed (FIG. 3 (i)). Then, the next rising of the clock 26 (FIG. 3)
(K)), the signal disconnection control signal 21 is "1" (FIG. 3)
(L)). Here, since the driver circuit itself has failed, the output 22-1 of the driver circuit 7-1 does not become "1" even if the driver circuit is disconnected. At this time, since the mismatch signal 25 is "1" (FIG. 3 (m)), the output 29 of the AND circuit 14 is "1" (FIG. 3 (n)).
Becomes Next rising of clock 26 (FIG. 3 (o))
And the own driver circuit failure signal 31 is "1" (FIG. 3
(P)) and the driver failure determination signal 35 is “1”.
(FIG. 3 (q)).

Next, a case where the output of another driver circuit, that is, the driver circuit of another magnetic disk device has failed will be described with reference to FIG.

When the interface signal 20-1 becomes "1" (FIG. 4 (a)), the output of the receiver circuit 9-1 is still "0" (FIG. 4 (b)) at this time. The output 25-1 of -1 is "1" (FIG. 4C). Subsequently, the mismatch signal 25 also becomes "1" (FIG. 4 (f)). Here, since the other driver circuit has failed, the output 22-1 of the driver circuit 7-1 is "0" (FIG. 4).
(D)). Therefore, the output 24-1 of the receiver circuit 9-1 also remains at "0" (FIG. 4E). Thereby, the output 25-1 of the signal mismatch detection circuit 10-1 is output.
Remains at "1" (FIG. 4 (g)), and the mismatch signal 25 also remains at "1" (FIG. 4 (h)). Therefore,
The output 28 of the timer circuit 12 changes to "1" (FIG. 4 (i)) at the rise of the clock 26 after four clocks have elapsed (FIG.
(J)). Subsequently, at the next rise of the clock 26 (FIG. 4 (k)), the signal disconnection control signal 21 becomes "1" (FIG. 4 (l)). Here, since the other driver circuit is out of order, when the driver circuit output 7-1 is disconnected from the interface signal by the signal disconnecting circuit 8-1, the output 22-1 of the driver circuit 7-1 is "1" (FIG. 4
(M)), and then the output 2 of the receiver circuit 9-1.
4-1 also becomes "1" (FIG. 4 (n)). As a result, the output 25-1 of the signal mismatch detection circuit 10-1 and the mismatch signal 25 sequentially become "0" (FIGS. 3 (o) and (p)). Here, the output 32 of the AND circuit 16 is "1" (FIG. 4).
(Q)). The subsequent rising of the clock 26 (FIG. 3
(R)), the other driver circuit failure signal 34 becomes "1" (FIG. 3 (s)), and the driver failure determination signal 35 becomes "2".
(FIG. 3 (u)). At this time, the timer circuit 1
2 also becomes "0" (FIG. 4 (t)). At the subsequent rising of the clock 26 (FIG. 4 (v)), the signal disconnection signal 2
1 becomes "0" (FIG. 4 (w)).

In the above description, the embodiment of the present invention has been described by exemplifying a case where a plurality of magnetic disk devices are connected to a higher-level control device. However, a higher-level device including other types of peripheral devices and a central processing unit is described. It is apparent that the present invention can be applied to the case where the connection is made.

[0040]

The first effect is that, when the driver circuit of the interface circuit section fails, the other magnetic disk devices connected in parallel to the bus can be prevented from becoming uncontrollable.

The reason is that the output of the failed driver circuit is disconnected from other driver circuits when it is detected that the own driver circuit has failed.

A second effect is that when the output of the driver circuit of the interface circuit section becomes abnormal, it is possible to determine whether the own driver circuit has failed or another driver circuit connected in parallel has failed. It is.

The reason is that the signal disconnection circuit is provided on the output side of the driver circuit, so that when an abnormality in the output of the driver circuit is detected, the driver circuit is disconnected from another driver circuit connected in parallel. This is because it is possible to confirm whether or not the operation of the driver circuit of the own circuit is proper.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing the configuration of a magnetic disk drive according to the present invention and the configuration of a circuit unit for implementing a driver circuit failure detection method, a driver circuit failure determination method, and a failure report method.

FIG. 2 is a time chart showing an operation when a driver circuit is normal.

FIG. 3 is a time chart illustrating an operation in a case where a driver circuit is out of order.

FIG. 4 is a time chart showing an operation when another driver circuit is out of order.

FIG. 5 is a block diagram showing connections between a plurality of magnetic disk devices of the present invention and a host control device.

[Description of Signs] 1, 4, 45, 48 Sequence circuit unit 2, 5, 46, 49 Driver circuit failure determination circuit unit 3, 6, 47, 50 Interface circuit unit 7-1 ... 7-n Driver circuit 8-1 ... 8-n signal disconnection circuit 9-1 ... 9-n receiver circuit 10-1 ... 10-n signal mismatch detection circuit 11 OR circuit 12 timer circuit 13,15,17 FF (flip-flop) circuit 14,16 AND circuit 41 , 52 Hard disk 43, 54 Magnetic disk unit 44 Host controller

Claims (8)

(57) [Claims] An output of each driver circuit in an interface circuit section of a peripheral device is connected to an output of a corresponding driver circuit in an interface circuit section of another peripheral device and an output of a higher-level device through the same signal line on the interface. In a peripheral device subsystem or a computer system connected to an input of each receiver circuit corresponding to the interface circuit section, an output of the driver circuit is input to another receiver circuit.
Is, input and output the driver circuit of the other receiver circuit
When the mismatch detecting means detects the mismatch with the force,
Interface disconnection means provided at the subsequent stage of the driver circuit
Disconnect the output of the driver circuit from the interface.
If disconnection, and the subsequent said mismatch detecting means detects a mismatch
If the driver circuit is determined to be faulty and the mismatch detecting means does not detect a mismatch, the
The output of the driver circuit is
Driver for other peripheral devices on the destination interface
A driver for determining that a road has failed
-Circuit failure determination method. 2. The driver circuit failure determination according to claim 1,
In the method, a predetermined time has passed since the mismatch detecting means detected the mismatch.
After a short time, an interface provided after the driver circuit
Output of the driver circuit by the source disconnecting means.
Driver circuit characterized by cutting from the face
Failure determination method. 3.請Motomeko 1 or 2 driver circuit according
To report the failure location determined by the failure determination method
The interface has multiple routes and one route has a fault.
Report that the occurrence has occurred to the higher-level device from another route.
Characterized failure location reporting method. 4. An interface circuit section of a peripheral device.
Output of each driver circuit
Interface circuit of other peripheral devices through the signal line of
Output of each corresponding driver circuit in the
Receiver circuits corresponding to the interface circuit section
Peripheral subsystem or electronics connected to the input of the
In a computer system, another receiver to which the output of the driver circuit is input
Circuit, the output of the other receiver circuit and the driver circuit.
A mismatch detecting means for detecting a mismatch with the input , provided at a subsequent stage of the driver circuit;
When the coincidence detecting means detects, the output of the driver circuit is output.
Interface disconnection to disconnect power from the interface
Disconnecting means and disconnecting the output of the driver circuit from the interface.
When the discrepancy detecting means detects a discrepancy after disconnection
It is determined that the driver circuit has failed, and
If the means for detecting a match does not detect a mismatch,
Others on the interface before the interface disconnection means
Driver circuit of peripheral device is defective
A peripheral device comprising a failure determination circuit. 5. The communication device according to claim 1 , wherein
If the circuit means detects a match, the mismatch is detected.
The output of the driver circuit
Disconnecting from the interface
4. The peripheral device according to 4. 6. An interface has a plurality of paths for reporting a fault location to a higher-level device. When an error occurs in a certain path, whether a driver circuit of the device has failed or a driver circuit of another peripheral device has failed. A peripheral device having a driver circuit failure determination circuit section for sending a driver failure determination signal for notifying whether a failure has occurred to another path, and reporting to a higher-level device through a driver circuit on another path. 7. A peripheral device according to claim 4, wherein said peripheral device is provided with an interface for reporting a fault location to a higher-level device.
It has multiple routes, and if there is a failure in one route,
Peripheral device, which reports to the host
Place. 8. A peripheral device according to claim 4, wherein said peripheral device has an interface for reporting a fault location to a higher-level device.
It has multiple routes, the failure of one route has occurred, and the driver of the device
-The circuit has failed or the driver circuit of another peripheral device is
A driver failure determination signal that indicates that a failure has occurred
Report to the host device through the driver circuit failure judgment circuit part to send to the path and the driver circuit of the other path
A peripheral device further comprising a control circuit.