JP2743804B2 - Reference voltage generation circuit - Google Patents
Reference voltage generation circuitInfo
- Publication number
- JP2743804B2 JP2743804B2 JP5329361A JP32936193A JP2743804B2 JP 2743804 B2 JP2743804 B2 JP 2743804B2 JP 5329361 A JP5329361 A JP 5329361A JP 32936193 A JP32936193 A JP 32936193A JP 2743804 B2 JP2743804 B2 JP 2743804B2
- Authority
- JP
- Japan
- Prior art keywords
- reference voltage
- input
- output
- voltage generating
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Control Of Voltage And Current In General (AREA)
- Dc-Dc Converters (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は基準電圧発生回路に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reference voltage generating circuit.
【0002】[0002]
【従来の技術】基準電圧はダイオードの順方向電圧降
下、あるいは直列抵抗による分圧を用いて発生すること
ができる。例えば図2は、ダイオードを用いた基準電圧
発生回路の一例を示したもので、ダイオードに定常電流
を流すことによって生じる電圧降下を、増幅器を用いて
適当に増幅した電圧を基準電圧としている。また図3は
抵抗分割を用いた基準電圧発生回路の一例を示したもの
で、抵抗を流れる電流によって生じる起電力を、適当な
ノードから取り出し、これを増幅器で増幅することによ
って任意の基準電圧を得ることができる。2. Description of the Related Art A reference voltage can be generated by using a forward voltage drop of a diode or voltage division by a series resistor. For example, FIG. 2 shows an example of a reference voltage generating circuit using a diode, and a voltage obtained by flowing a steady current through the diode and appropriately amplifying using an amplifier is used as a reference voltage. Also illustrated in Figure 3 in which an example of a reference voltage generation circuit using a resistor divider, the electromotive force generated by the current flowing through the resistor, taking out from the appropriate node, any of the reference voltage by amplifying this with amplifiers Can be obtained.
【0003】[0003]
【発明が解決しようとする課題】このような手段で基準
電圧を発生させる場合、増幅器のみでなく、ダイオード
または抵抗で構成される基準電圧生成部にも定常的に電
流を流しておく必要があった。When a reference voltage is generated by such a means, it is necessary to constantly supply a current not only to the amplifier but also to a reference voltage generation section composed of a diode or a resistor. Was.
【0004】本発明は、基準電圧を発生させる部分に流
れる定常的な消費電流を排除し、静的な消費電力を削減
するとともに、任意の基準電圧を発生できる基準電圧発
生回路を与えることを目的とする。SUMMARY OF THE INVENTION It is an object of the present invention to provide a reference voltage generating circuit which can eliminate a steady current consumption flowing in a portion for generating a reference voltage, reduce static power consumption, and generate an arbitrary reference voltage. And
【0005】[0005]
【課題を解決するための手段】本発明では、第1の入力
端子と第1の出力端子間を接続する第1の正理論スイッ
チと、第2の入力端子と第2の出力端子間を接続する第
2の正理論スイッチと、第1の出力端子と第2の入力端
子間を接続する負理論スイッチと、第1の出力端子と第
2の出力端子間を接続する容量で構成される基準電圧生
成要素をn個(n≧1)を用い、第i(i≧2)の基準
電圧生成要素の第1の入力および第2の入力を、第(i
−1)の基準電圧生成要素の第1の出力および第2の出
力にそれぞれ接続し、前記iの基準電圧生成要素の第1
の出力および第2の出力を、第(i+1)の基準電圧生
成要素の第1の入力および第2の入力にそれぞれ接続
し、前記第nの基準電圧生成要素の第2の出力端子を接
地して構成される基準電圧生成部と、第1の基準電圧生
成要素の第1の入力と第2の入力間を接続する容量と、
単位電圧源と、単位電圧源の高電位側と第1の基準電圧
生成要素の第1の入力とを接続する第3の正理論スイッ
チと、前記単位電圧源の低電位側と前記第1の基準電圧
生成要素の第2の入力端子を接続する第4の正理論スイ
ッチと、前記第1の基準電圧生成要素の第1の入力端子
と第1の出力端子および第2から第nの基準電圧生成要
素の各々の第1の出力端子から所望の基準電圧の値にし
たがって1個を選択するセレクタと、セレクタの出力を
入力とする増幅器で基準電圧発生回路を構成している。
ここで正理論スイッチを負理論スイッチに負理論スイッ
チを正理論スイッチにおきかえてもよい。According to the present invention, a first positive theoretical switch for connecting between a first input terminal and a first output terminal and a connection between a second input terminal and a second output terminal are provided. A second positive theoretical switch, a negative theoretical switch that connects the first output terminal and the second input terminal, and a reference that includes a capacitor that connects the first output terminal and the second output terminal. Using n voltage generation elements (n ≧ 1), the first input and the second input of the i-th (i ≧ 2) reference voltage generation element
-1) connected to the first output and the second output of the reference voltage generating element, respectively,
And the second output are respectively connected to a first input and a second input of an (i + 1) th reference voltage generating element, and a second output terminal of the nth reference voltage generating element is grounded. A reference voltage generation unit configured by: a capacitor connecting a first input and a second input of the first reference voltage generation element;
A unit voltage source, a third positive theoretical switch connecting a high potential side of the unit voltage source and a first input of a first reference voltage generating element, a low potential side of the unit voltage source and the first potential switch, A fourth positive logic switch connecting a second input terminal of the reference voltage generation element, a first input terminal and a first output terminal of the first reference voltage generation element, and a second to n-th reference voltages A reference voltage generating circuit is constituted by a selector for selecting one from each of the first output terminals of the generating elements according to a desired reference voltage value, and an amplifier to which the output of the selector is input.
Here, the positive theoretical switch may be replaced with a negative theoretical switch, and the negative theoretical switch may be replaced with a positive theoretical switch.
【0006】このような手段をとることによって、基準
電圧生成部は従来例のような定常電流を必要としないの
で、静的な消費電力を削減するとともに任意の基準電圧
を発生させることができる。By adopting such means, the reference voltage generator does not need a steady current as in the conventional example, so that static power consumption can be reduced and an arbitrary reference voltage can be generated.
【0007】[0007]
【実施例】図1に本発明の基準電圧発生回路の一実施例
を示す。図において、正理論スイッチと負理論スイッチ
は常に排他的に制御され、一方のスイッチが導通の状態
のときは、他方は非導通の状態になっている。また同一
論理のスイッチは同時に制御される構造になっている。
はじめに全ての正理論スイッチを同時の導通の状態にす
ると、単位電圧源114は容量113と全ての基準電圧
生成要素の容量108を並列に充電する。その後全ての
正理論スイッチを非導通にすると同時に、全ての負理論
スイッチを導通にすると、容量113と第1の基準電圧
生成要素110の容量から第nの基準電圧生成要素の容
量111までが直列に接続され、単位電圧源114の1
倍から(n+1)倍の電圧がセレクタ117に与えられ
る。セレクタ117は選択入力に従って(n+1)個の
電圧から1個を選択し、増幅器118に与えられ、その
出力が利用可能な基準電圧となる。単位電圧源は容量を
充電するのみであるので、基準電圧生成部112には静
的な消費電流が流れない。また容量に充電された電荷
は、増幅器118を高入力抵抗素子たとえば、MOSF
ETで構成することによって、長期保持可能である。FIG. 1 shows an embodiment of a reference voltage generating circuit according to the present invention. In the figure, the positive theoretical switch and the negative theoretical switch are always exclusively controlled, and when one switch is in a conductive state, the other is in a non-conductive state. Switches of the same logic are controlled simultaneously.
First, when all the positive theoretical switches are turned on simultaneously, the unit voltage source 114 charges the capacitor 113 and the capacitors 108 of all the reference voltage generating elements in parallel. Thereafter, when all the positive theoretical switches are turned off and all the negative theoretical switches are turned on, the capacitance 113 and the capacitance of the first reference voltage generating element 110 to the capacitance 111 of the nth reference voltage generating element are connected in series. And one of the unit voltage sources 114
A voltage that is twice to (n + 1) times is supplied to the selector 117. The selector 117 selects one of the (n + 1) voltages in accordance with the selection input, is given to the amplifier 118, and its output becomes an available reference voltage. Since the unit voltage source only charges the capacity, static current consumption does not flow through the reference voltage generator 112. The electric charge charged to the capacitor is supplied to the amplifier 118 through a high input resistance element such as a MOSF.
By using ET, long-term retention is possible.
【0008】以上説明してきた実施例のほか、正理論ス
イッチおよび負理論スイッチとして、それぞれnチャネ
ルMOSFETおよびpチャネルMOSFETを用いた
場合、あるいはその逆の組み合わせにおいても、同様に
本発明が適用できる。またスイッチを相補形のMOSF
ETで構成した場合にも同様の効果がある。In addition to the embodiments described above, the present invention can be similarly applied to a case where an n-channel MOSFET and a p-channel MOSFET are used as the positive theoretical switch and the negative theoretical switch, respectively, or a combination of the opposite. Also, switch the complementary MOSF
The same effect can be obtained when the ET is used.
【0009】[0009]
【発明の効果】以上説明したように、本発明は基準電圧
生成部に容量を用いているため、基準電圧の発生に静的
な消費電流を必要とせず、任意の基準電圧を発生させる
ことができる。As described above, according to the present invention, since a capacitance is used in the reference voltage generating section, static current consumption is not required for generating the reference voltage, and an arbitrary reference voltage can be generated. it can.
【図1】本発明の基準電圧発生回路の一実施例を示す図
である。FIG. 1 is a diagram showing one embodiment of a reference voltage generating circuit of the present invention.
【図2】ダイオードを用いた従来の基準電圧発生回路の
一実施例を示す図である。FIG. 2 is a diagram showing one embodiment of a conventional reference voltage generation circuit using a diode.
【図3】抵抗分割を用いた従来の基準電圧生成回路の一
実施例を示す図である。FIG. 3 is a diagram showing one embodiment of a conventional reference voltage generation circuit using resistance division.
101,103 入力端子 102,104 出力端子 105,106,115,116 正論理スイッチ 107 負論理スイッチ 108,113 容量 109,110,111 基準電圧生成要素 112 基準電圧生成部 114 単位電圧源 117 セレクタ 118 増幅器 101, 103 input terminal 102, 104 output terminal 105, 106, 115, 116 positive logic switch 107 negative logic switch 108, 113 capacitance 109, 110, 111 reference voltage generation element 112 reference voltage generation unit 114 unit voltage source 117 selector 118 amplifier
Claims (2)
続する第1の正論理スイッチと、第2の入力端子と第2
の出力端子間を接続する第2の正論理スイッチと、第1
の出力端子と第2の入力端子間を接続する負理論スイッ
チと、第1の出力端子と第2の出力端子間を接続する容
量で構成される基準電圧生成要素をn個(n≧1)用
い、第i(2≦i≦n−1)の基準電圧生成要素の第1
の入力および第2の入力を、第(i−1)の基準電圧生
成要素の第1の出力および第2の出力にそれぞれ接続
し、第iの基準電圧生成要素の第1の出力および第2の
出力を、第(i+1)の基準電圧生成要素の第1の入力
および第2の入力にそれぞれ接続し、第nの基準電圧生
成要素の第2の出力端子を接地して構成される基準電圧
生成部と、第1の基準電圧生成要素の第1の入力と第2
の入力間を接続する容量と、単位電圧源と、単位電圧源
の高電位側と第1の基準電圧生成要素の第1の入力とを
接続する第3の正理論スイッチと、単位電圧源の低電位
側と第1の基準電圧の生成要素の第2の入力端子を接続
する第4の正理論スイッチと、第1の基準電圧生成要素
の第1の入力端子と第1の出力端子および第2から第n
の基準電圧生成要素の各々の第1の出力端子から所望の
基準電圧の値にしたがって1個を選択するセレクタと、
セレクタの出力を入力とする増幅器で構成される基準電
圧発生回路。A first positive logic switch connecting between a first input terminal and a first output terminal, a second input terminal and a second
A second positive logic switch connecting the output terminals of
N (n ≧ 1) reference voltage generating elements each including a negative theoretical switch connecting between the output terminal and the second input terminal and a capacitor connecting between the first output terminal and the second output terminal The first of the i-th (2 ≦ i ≦ n−1) reference voltage generation elements
And the second input are respectively connected to the first output and the second output of the (i-1) th reference voltage generating element, and the first output and the second output of the i-th reference voltage generating element are connected. Is connected to the first input and the second input of the (i + 1) th reference voltage generating element, respectively, and the second output terminal of the nth reference voltage generating element is grounded. A first input of a first reference voltage generating element and a second input of a first reference voltage generating element;
Of the capacitors connected between the input and the unit voltage source, a third positive theory switch for connecting the first input of the high potential side and the first reference voltage generation element unit voltage source, the unit voltage source A fourth positive theoretical switch that connects the low potential side to a second input terminal of the first reference voltage generation element, a first input terminal, a first output terminal, and a fourth output terminal of the first reference voltage generation element 2 to n
A selector for selecting one from a first output terminal of each of the reference voltage generating elements according to a desired reference voltage value;
A reference voltage generation circuit composed of an amplifier that receives the output of the selector as an input.
かえ、第1〜第4の正理論スイッチを負理論スイッチに
おきかえた請求項1に記載の基準電圧発生回路。2. The reference voltage generating circuit according to claim 1, wherein the negative theoretical switch is replaced by a positive theoretical switch, and the first to fourth positive theoretical switches are replaced by negative theoretical switches.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5329361A JP2743804B2 (en) | 1993-12-27 | 1993-12-27 | Reference voltage generation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5329361A JP2743804B2 (en) | 1993-12-27 | 1993-12-27 | Reference voltage generation circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH07191765A JPH07191765A (en) | 1995-07-28 |
JP2743804B2 true JP2743804B2 (en) | 1998-04-22 |
Family
ID=18220603
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5329361A Expired - Fee Related JP2743804B2 (en) | 1993-12-27 | 1993-12-27 | Reference voltage generation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2743804B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5254714B2 (en) * | 2008-09-05 | 2013-08-07 | 株式会社マキタ | Microcomputer mounted system for power tools and battery pack |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0678527A (en) * | 1992-08-26 | 1994-03-18 | Nec Kansai Ltd | Driving voltage feeder and integrated circuit thereof |
-
1993
- 1993-12-27 JP JP5329361A patent/JP2743804B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH07191765A (en) | 1995-07-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2917914B2 (en) | Boost circuit | |
US4807104A (en) | Voltage multiplying and inverting charge pump | |
US7208997B2 (en) | Charge pump power supply circuit | |
US5036229A (en) | Low ripple bias voltage generator | |
US5835457A (en) | Electronic watch and method of charging the same | |
US6249446B1 (en) | Cascadable, high efficiency charge pump circuit and related methods | |
JPH05244766A (en) | Charging pump circuit | |
KR970031198A (en) | Internal Power Supply Circuit | |
GB2245780A (en) | Voltage multiplier | |
US5227672A (en) | Digital clock selection and changeover apparatus | |
US4302804A (en) | DC Voltage multiplier using phase-sequenced CMOS switches | |
JP2743804B2 (en) | Reference voltage generation circuit | |
US7042742B2 (en) | Charge-pump circuitry | |
JP2886281B2 (en) | Boost circuit | |
JP2006285953A (en) | Reference voltage generation circuit and reference current generation circuit | |
KR950022162A (en) | Capacitor Voltage Divider Circuit | |
JP3064573B2 (en) | Boost circuit | |
JPH08149799A (en) | Booster circuit and drive method therefor | |
US4755739A (en) | Switched direct voltage converter | |
US5568079A (en) | Step-up method and step-up circuit | |
JP4400145B2 (en) | Power supply | |
JP3702169B2 (en) | Booster system | |
JPS605772A (en) | Dc stabilized power source circuit | |
US4562526A (en) | Voltage control circuit | |
JPH0746825A (en) | Charge pumping circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19980106 |
|
LAPS | Cancellation because of no payment of annual fees |