JP2742618B2 - Package for storing semiconductor elements - Google Patents

Package for storing semiconductor elements

Info

Publication number
JP2742618B2
JP2742618B2 JP1312728A JP31272889A JP2742618B2 JP 2742618 B2 JP2742618 B2 JP 2742618B2 JP 1312728 A JP1312728 A JP 1312728A JP 31272889 A JP31272889 A JP 31272889A JP 2742618 B2 JP2742618 B2 JP 2742618B2
Authority
JP
Japan
Prior art keywords
external lead
semiconductor element
lead terminal
glass member
lid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1312728A
Other languages
Japanese (ja)
Other versions
JPH03173160A (en
Inventor
弘 松本
公明 井口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP1312728A priority Critical patent/JP2742618B2/en
Priority to US07/573,406 priority patent/US5057905A/en
Publication of JPH03173160A publication Critical patent/JPH03173160A/en
Application granted granted Critical
Publication of JP2742618B2 publication Critical patent/JP2742618B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は半導体素子を収納する半導体素子収納用パッ
ケージの改良に関するものである。
Description: TECHNICAL FIELD The present invention relates to an improvement in a semiconductor device housing package for housing a semiconductor device.

(従来の技術) 従来、半導体素子を収容するためのパッケージ、特に
ガラスの溶着によって封止するガラス封止型半導体素子
収納用パッケージは、絶縁基体と蓋体とから成り、内部
に半導体素子を収容する空所を有する絶縁容器と、該容
器内に収容される半導体素子を外部電気回路に電気的に
接続するための外部リード端子とから構成されており、
絶縁基体及び蓋体の相対向する主面に予め封止用のガラ
ス部材を被着形成すると共に、絶縁基体主面に外部リー
ド端子を固定し、半導体素子の各電極と外部リード端子
とをワイヤボンド接続した後、絶縁基体及び蓋体のそれ
ぞに被着させた封止用のガラス部材を溶融一体化させる
ことによって内部に半導体素子を気密に封止している。
(Prior Art) Conventionally, a package for accommodating a semiconductor element, particularly a package for accommodating a glass-encapsulated semiconductor element sealed by welding glass, includes an insulating base and a lid, and accommodates the semiconductor element inside. And an external lead terminal for electrically connecting a semiconductor element housed in the container to an external electric circuit,
A glass member for sealing is applied in advance on the opposing main surfaces of the insulating base and the lid, and external lead terminals are fixed on the main surface of the insulating base, and each electrode of the semiconductor element and the external lead terminal are wired. After the bond connection, the semiconductor element is hermetically sealed inside by fusing and integrating a sealing glass member attached to each of the insulating base and the lid.

(発明が解決しようとする課題) しかし乍ら、この従来のガラス封止型半導体素子収納
用パッケージは通常、外部リード端子がコバール(29Wt
% Ni−16Wt% Co−55Wt%Fe合金)や42Alloy(42Wt%
Ni−58Wt% Fe合金)の導電性材料から成っており、該
コバールや42Alloy等は透磁率が高く、且つ導電率が低
いことから以下に述べる欠点を有する。
(Problems to be Solved by the Invention) However, this conventional package for housing a glass-sealed semiconductor element usually has an external lead terminal of Kovar (29 Wt).
% Ni-16Wt% Co-55Wt% Fe alloy) and 42Alloy (42Wt%
Ni-58Wt% Fe alloy), and Kovar and 42Alloy have the following disadvantages due to their high magnetic permeability and low electric conductivity.

即ち、 コバールや42Alloyは鉄(Fe)、ニッケル(Ni)、コ
バルト(Co)といった強磁性体金属のみから成ってお
り、その透磁率は250〜700(CGS)と高い。そのためこ
のコバールや42Alloy等から成る外部リード端子に電流
が流れると外部リード端子中に透磁率に比例した大きな
自己インダクタンスが発生し、これが逆起電力を誘発し
てノイズとなると共に、該ノイズが半導体素子に入力さ
れて半導体素子に誤動作を生じさせる、 コバールや42Alloyはその導電率が3.0〜3.5%(IAC
S)と低い。そのためこのコバールや42Alloy等から成る
外部リード端子に信号を伝搬させた場合、信号の伝搬速
度が極めて遅いものとなり、高速駆動を行う半導体素子
はその収容が不可となってしまう、 半導体素子収納用パッケージの内部に収容する半導体
素子の高密度化、高集積化の進展に伴い、半導体素子の
電極数が大幅に増大しており、半導体素子の各電極を外
部電気回路に接続する外部リード端子の線幅も極めて細
くなってきている。そのため外部リード端子は上記の
記載のコバールや42Alloyの導電率が低いことと相俊っ
て電気抵抗が極めて大きなものになってきており、外部
リード端子に信号を伝搬させると、該外部リード端子の
電気抵抗に起因して信号が大きく減衰し、内部に収容す
る半導体素子に信号を正確に入力することができず、半
導体素子に誤動作を生じさせてしまう、 等の欠点を有していた。
That is, Kovar and 42Alloy are made of only ferromagnetic metals such as iron (Fe), nickel (Ni), and cobalt (Co), and have high magnetic permeability of 250 to 700 (CGS). Therefore, when a current flows through the external lead terminal made of Kovar or 42Alloy, a large self-inductance is generated in the external lead terminal in proportion to the magnetic permeability, which induces a back electromotive force to become noise, and the noise becomes a semiconductor. The conductivity of Kovar or 42Alloy is 3.0 to 3.5% (IAC
S) and low. Therefore, when a signal is propagated to an external lead terminal made of Kovar or 42Alloy, the signal propagation speed becomes extremely slow, and semiconductor devices that perform high-speed driving cannot be accommodated. The number of electrodes of a semiconductor element has increased significantly with the progress of higher density and higher integration of semiconductor elements housed inside the semiconductor device, and wires of external lead terminals for connecting each electrode of the semiconductor element to an external electric circuit. The width has also become extremely narrow. For this reason, the external lead terminal has become extremely large in electrical resistance in tandem with the low conductivity of Kovar and 42 Alloy described above, and when a signal is propagated to the external lead terminal, the external lead terminal becomes The signal is greatly attenuated due to the electric resistance, and the signal cannot be accurately input to the semiconductor element housed therein, thereby causing a malfunction in the semiconductor element.

(発明の目的) 本発明は上記欠点に鑑み案出されたもので、その目的
は外部リード端子で発生するノイズ及び外部リード端子
における信号の減衰を極小となし、内部に収容する半導
体素子への信号の入出力を確実に行うことを可能として
半導体素子を長期間にわたり正常、且つ安定に作動させ
ることができる半導体素子収納用パッケージを提供する
ことにある。
(Object of the Invention) The present invention has been devised in view of the above-mentioned drawbacks, and has as its object to minimize the noise generated at the external lead terminals and the signal attenuation at the external lead terminals to minimize the semiconductor device housed therein. An object of the present invention is to provide a package for housing a semiconductor element capable of reliably inputting / outputting a signal and allowing a semiconductor element to operate normally and stably for a long period of time.

また本発明の他の目的は高速駆動を行う半導体素子を
収容することができる半導体素子収納用パッケージを提
供することにある。
Another object of the present invention is to provide a semiconductor element housing package capable of housing a semiconductor element which operates at high speed.

(課題を解決するための手段) 本発明は内部に半導体素子を収容するための空所を有
する絶縁容器に外部リード端子をガラス部材を介して取
着して成る半導体素子収納用パッケージにおいて、前記
絶縁容器をフォルステライト質焼結体もしくはジルコニ
ア質焼結体で、外部リード端子を透磁率200(GCS)以
下、熱膨張係数100乃至110×10-7/℃、導電率10%(IAC
S)以上の金属で、ガラス部材をシリカ60.0乃至70.0Wt
%、ナトリウム、カリウムの酸化物の少なくとも1種1
0.0乃至20.0Wt%、酸化バリウム5.0乃至15.0Wt%から成
るガラスで形成したことを特徴とするものである。
(Means for Solving the Problems) The present invention relates to a package for housing semiconductor elements, wherein external lead terminals are attached via a glass member to an insulating container having a space for housing semiconductor elements therein. The insulating container is a forsterite-based sintered body or a zirconia-based sintered body, and the outer lead terminals are magnetic permeability of 200 (GCS) or less, coefficient of thermal expansion is 100 to 110 × 10 -7 / ° C, and conductivity is 10% (IAC
S) With the above metals, the glass member is silica 60.0 to 70.0Wt
%, At least one of sodium and potassium oxides 1
It is characterized by being formed of glass comprising 0.0 to 20.0 Wt% and 5.0 to 15.0 Wt% of barium oxide.

(実施例) 次に本発明を添付図面に基づき詳細に説明する。(Example) Next, the present invention will be described in detail with reference to the accompanying drawings.

第1図及び第2図は本発明の半導体素子収納用パッケ
ージの一実施例を示し、1は絶縁基体、2は蓋体であ
る。この絶縁基体1と蓋体2とにより絶縁容器3が構成
される。
1 and 2 show an embodiment of a package for accommodating a semiconductor element according to the present invention, wherein 1 is an insulating base and 2 is a lid. The insulating container 3 is constituted by the insulating base 1 and the lid 2.

前記絶縁基体1及び蓋体2はそれぞれの中央部に半導
体素子を収容する空所を形成するための凹部が設けてあ
り、絶縁基体1の凹部底面には半導体素子4が樹脂、ガ
ラス、ロウ剤等の接着剤を介し取着固定される。
The insulating base 1 and the lid 2 are each provided with a concave portion for forming a space for accommodating a semiconductor element at the center thereof, and the semiconductor element 4 is formed of resin, glass, brazing agent on the bottom surface of the concave portion of the insulating base 1. It is attached and fixed via an adhesive such as.

前記絶縁基体1及び蓋体2はフォルステライト質焼結
体もしくはジルコニア質焼結体から成り、第1図に示す
ような絶縁基体1及び蓋体2に対応した形状を有するプ
レス型内に、フォルステライト質焼結体の場合はマグネ
シア(MgO)、シリカ(SiO2)等の原料粉末を、ジルコ
ニア質焼結体の場合は酸化ジルコニウム(ZrO2)、イッ
トリア(Y2O3)等の原料粉末を充填させるとともに一定
圧力を印加して成形し、しかる後、成形品を約1200〜15
00℃の温度で焼成することによって製作される。
The insulating base 1 and the lid 2 are made of a forsterite-based sintered body or a zirconia-based sintered body, and are placed in a press die having a shape corresponding to the insulating base 1 and the lid 2 as shown in FIG. Raw material powders such as magnesia (MgO) and silica (SiO 2 ) for stellite sintered bodies, and raw material powders such as zirconium oxide (ZrO 2 ) and yttria (Y 2 O 3 ) for zirconia sintered bodies And molding by applying a constant pressure.
It is manufactured by firing at a temperature of 00 ° C.

尚、前記絶縁基体1及び蓋体2を形成するフォルステ
ライト質焼結体もしくはジルコニア質焼結体はその熱膨
張係数が100乃至110×10-7/℃であり、後述する封止用
ガラス部材の熱膨張係数との関係において絶縁基体1及
び蓋体2と封止用ガラス部材間に大きな熱膨張の差が生
じることはない。
The forsterite-based sintered body or zirconia-based sintered body forming the insulating base 1 and the lid 2 has a thermal expansion coefficient of 100 to 110 × 10 −7 / ° C., and a sealing glass member described later. There is no large difference in thermal expansion between the insulating base 1 and the lid 2 and the sealing glass member in relation to the thermal expansion coefficient of

また前記絶縁基体1及び蓋体2にはその相対向する主
面に封止用のガラス部材6が予め被着形成されており、
該絶縁基体1及び蓋体2の各々に被着されている封止用
ガラス部材6を加熱溶融させ一体化させることにより絶
縁容器3内の半導体素子4を気密に封止する。
Further, a glass member 6 for sealing is previously formed on the opposing main surfaces of the insulating base 1 and the lid 2.
The semiconductor element 4 in the insulating container 3 is hermetically sealed by heating and melting the sealing glass member 6 attached to each of the insulating base 1 and the lid 2 to be integrated.

前記絶縁基体1及び蓋体2の相対向する主面に被着さ
れる封止用ガラス部材6は、シリカ60.0乃至70.0Wt%、
ナトリウム、カリウムの酸化物の少なくとも1種10.0乃
至20.0Wt%、酸化バリウム5.0乃至15.0Wt%より形成さ
れるガラスから成り、上記各成分を所定の値となるよう
に秤量混合すると共に、該混合粉末を1300〜1400℃の温
度で加熱溶融させることによって製作される。このガラ
ス部材6の熱膨張係数は90乃至100×10-7/℃である。
The sealing glass member 6 attached to the opposing main surfaces of the insulating base 1 and the lid 2 is made of silica of 60.0 to 70.0 Wt%,
It is made of glass formed of at least one of sodium and potassium oxides of 10.0 to 20.0 Wt% and barium oxide of 5.0 to 15.0 Wt%. The above components are weighed and mixed so as to have predetermined values, and the mixed powder is mixed. Is manufactured by heating and melting at a temperature of 1300 to 1400 ° C. The glass member 6 has a coefficient of thermal expansion of 90 to 100 × 10 −7 / ° C.

前記封止用ガラス部材6は、その熱膨張係数が90乃至
100×10-7/℃であり、絶縁基体1及び蓋体2の各々の熱
膨張係数と近似することから絶縁基体1及び蓋体2の各
々に被着されている封止用ガラス部材6を加熱溶融させ
一体化させることにより絶縁容器3内の半導体素子4を
気密に封止する際、絶縁基体1及び蓋体2と封止用ガラ
ス部材6との間には両者の熱膨張係数の相違に起因する
熱応力が発生することは殆どなく、絶縁基体1と蓋体2
とを封止用ガラス部材6を介し強固に接合することが可
能となる。
The sealing glass member 6 has a thermal expansion coefficient of 90 to 90.
Since it is 100 × 10 −7 / ° C. and approximates the thermal expansion coefficients of the insulating base 1 and the lid 2, the sealing glass member 6 attached to each of the insulating base 1 and the lid 2 is When the semiconductor element 4 in the insulating container 3 is air-tightly sealed by heat melting and integrating, the difference in the thermal expansion coefficient between the insulating base 1 and the lid 2 and the sealing glass member 6 is caused. Is hardly generated due to the heat, the insulating base 1 and the lid 2
Can be firmly joined via the sealing glass member 6.

尚、前記封止用ガラス部材6はシリカ(SiO2)が60.0
Wt%未満であるとガラスの結晶化が進んで絶縁容器3の
気密封止が困難となり、また70.0Wt%を越えるとガラス
の熱膨張が小さくなって絶縁基体1と蓋体2の熱膨張と
合わなくなることからシリカ(SiO2)は60.0乃至70.0Wt
%の範囲に限定される。
The sealing glass member 6 is made of silica (SiO 2 ) of 60.0%.
If it is less than Wt%, the crystallization of the glass proceeds and it becomes difficult to hermetically seal the insulating container 3, and if it exceeds 70.0Wt%, the thermal expansion of the glass becomes small, and the thermal expansion of the insulating base 1 and the lid 2 is reduced. 60.0 to 70.0 Wt for silica (SiO 2 )
%.

またナトリウム、カリウムの酸化物が10.0Wt%未満で
あるとガラスを製作する際のガラスの溶融温度が大幅に
上がって作業性が著しく悪くなり、また20.0Wt%を越え
るとガラス耐薬品性が劣化して絶縁容器3の気密封止の
信頼性が大きく低下するためナトリウム、カリウムの酸
化物は10.0乃至20.0Wt%の範囲に限定される。
In addition, if the oxide of sodium and potassium is less than 10.0 Wt%, the melting temperature of the glass at the time of manufacturing the glass is greatly increased, and the workability is significantly deteriorated. As a result, the reliability of hermetic sealing of the insulating container 3 is greatly reduced, so that oxides of sodium and potassium are limited to the range of 10.0 to 20.0 Wt%.

また酸化バリウム(BaO)が5.0Wt%未満であるとガラ
スの耐薬品性が劣化して絶縁容器3の気密封止の信頼性
が大きく低下し、また15.0Wt%を越えるとガラスの結晶
化が進んで絶縁容器3の気密封止が困難となることから
酸化バリウム(BaO)は5.0乃至15.0Wt%の範囲に限定さ
れる。
When barium oxide (BaO) is less than 5.0 Wt%, the chemical resistance of the glass is deteriorated, and the reliability of hermetic sealing of the insulating container 3 is greatly reduced. Barium oxide (BaO) is limited to the range of 5.0 to 15.0 Wt% because it becomes difficult to hermetically seal the insulating container 3.

前記封止用ガラス部材6は前述した成分から成るガラ
スに適当な有機溶剤、溶媒を添加して得たガラスペース
トを従来周知の厚膜手法を採用することによって絶縁基
体1及び蓋体2の相対向する主面に被着形成される。
The sealing glass member 6 is made of a glass paste obtained by adding a suitable organic solvent and a solvent to the glass composed of the above-described components, by employing a conventionally known thick-film technique, by using a conventionally known thick-film technique. It is formed on the opposite main surface.

前記絶縁基体1と蓋体2との間には導電性材料から成
る外部リード端子5が配されており、該外部リード端子
5は半導体素子4の各電極がワイヤ7を介し電気的に接
続され、外部リード端子5を外部電気回路に接続するこ
とによって半導体素子4が外部電気回路に接続されるこ
ととなる。
An external lead terminal 5 made of a conductive material is disposed between the insulating base 1 and the lid 2. The external lead terminal 5 is electrically connected to each electrode of the semiconductor element 4 via a wire 7. By connecting the external lead terminal 5 to an external electric circuit, the semiconductor element 4 is connected to the external electric circuit.

前記外部リード端子5は絶縁基体1と蓋体2の相対向
する主面に被着させた封止用ガラス部材6を溶融一体化
させ、絶縁容器3を気密封止する際に同時に絶縁基体1
と蓋体2との間に取着される。
The external lead terminals 5 are formed by melting and integrating a sealing glass member 6 attached to the opposing main surfaces of the insulating base 1 and the lid 2, and simultaneously sealing the insulating container 3 with the insulating base 1.
And the cover 2.

前記外部リード端子5は非磁性体金属である銅(Cu)
から成る芯体の外表面にクロム−鉄合金(Cr−Fe合金)
を接合させたもの、或いは板状のインバー合金(36.5Wt
% Ni−63.5Wt%Fe合金)の上下面に非磁性体金属であ
る銅(Cu)を接合させたもの等から成り、その透磁率は
200(CGS)以下、導電率は10%(IACS)以上、熱膨張係
数は100乃至110×10-7/℃の導電性材料から成る。
The external lead terminal 5 is made of a non-magnetic metal such as copper (Cu).
Chromium-iron alloy (Cr-Fe alloy) on the outer surface of a core made of
Or plate-like Invar alloy (36.5Wt
% Ni-63.5Wt% Fe alloy) made of copper (Cu), which is a non-magnetic metal, joined to the upper and lower surfaces.
It is made of a conductive material having a conductivity of not more than 200 (CGS), a conductivity of not less than 10% (IACS) and a coefficient of thermal expansion of 100 to 110 × 10 −7 / ° C.

前記外部リード端子5はその透磁率が200(CGS)以下
であり、透磁率が低いことから外部リード端子5に電流
が流れたとしても外部リード端子5中には大きな自己イ
ンダクタンスが発生することはなく、その結果、前記自
己インダクタンスにより誘発される逆起電力に起因した
ノイズを極小となし、内部に収容する半導体素子4を常
に正常に作動させることができる。
The external lead terminal 5 has a magnetic permeability of 200 (CGS) or less, and since the magnetic permeability is low, a large self-inductance is generated in the external lead terminal 5 even when a current flows through the external lead terminal 5. As a result, the noise caused by the back electromotive force induced by the self-inductance can be minimized, and the semiconductor element 4 housed therein can always operate normally.

また前記外部リード端子5はその導電率が10%(IAC
S)以上であり、電気を流し易いことから外部リード端
子5の信号伝搬速度を極めて速いものとなすことがで
き、絶縁容器3内に収容した半導体素子4を高速駆動さ
せたとしても半導体素子4と外部電気回路との間におけ
る信号の出し入れは常に安定、且つ確実となすことがで
きる。
The external lead terminal 5 has a conductivity of 10% (IAC
S) This is the above, and since it is easy to conduct electricity, the signal propagation speed of the external lead terminal 5 can be made extremely high. Even if the semiconductor element 4 housed in the insulating container 3 is driven at high speed, the semiconductor element 4 Signals can be always sent and received between the power supply and the external electric circuit in a stable and reliable manner.

また同時に外部リード端子5の導電率が高いことから
外部リード端子5の線幅が細くなったとしても外部リー
ド端子5の電気抵抗を低く抑えることができ、その結
果、外部リード端子5における信号の減衰を極小として
内部に収容する半導体素子4に外部電気回路から供給さ
れる電気信号を正確に入力することができる。
At the same time, since the electrical conductivity of the external lead terminal 5 is high, even if the line width of the external lead terminal 5 is reduced, the electrical resistance of the external lead terminal 5 can be suppressed low. An electric signal supplied from an external electric circuit can be accurately input to the semiconductor element 4 housed therein with the attenuation being minimized.

また更に前記外部リード端子5はその熱膨張係数が10
0乃至110×10-7/℃であり、封止用ガラス部材6の熱膨
張係数と近似することから外部リード端子5を絶縁基体
1と蓋体2の間に封止用ガラス部材6を用いて固定する
際、外部リード端子5と封止用ガラス部材6との間には
両者の熱膨張係数の相違に起因する熱応力が発生するこ
とはなく、外部リード端子5を封止用ガラス部材6で強
固に固定することも可能となる。
Further, the external lead terminal 5 has a coefficient of thermal expansion of 10
Since the thermal expansion coefficient is 0 to 110 × 10 −7 / ° C. and is close to the thermal expansion coefficient of the glass member for sealing 6, the external lead terminal 5 is used between the insulating base 1 and the lid 2. When fixing the external lead terminal 5 and the sealing glass member 6, no thermal stress is generated between the external lead terminal 5 and the sealing glass member 6 due to a difference in thermal expansion coefficient between the external lead terminal 5 and the sealing glass member 6. 6, it is also possible to fix firmly.

かくして、この半導体素子収納用パッケージによれば
絶縁基体1の凹部底面に半導体素子4を取着固定すると
ともに該半導体素子4の各電極をボンディングワイヤ7
により外部リード端子5に接続させ、しかる後、絶縁基
体1と蓋体2とを該絶縁基体1及び蓋体2の相対向する
主面に予め被着させておいた封止用ガラス部材6を溶融
一体化させることによって接合させ、これによって最終
製品としての半導体装置が完成する。
Thus, according to the package for accommodating the semiconductor element, the semiconductor element 4 is attached and fixed to the bottom surface of the concave portion of the insulating base 1 and each electrode of the semiconductor element 4 is connected to the bonding wire 7.
After that, the sealing glass member 6 in which the insulating substrate 1 and the lid 2 are previously adhered to the opposing main surfaces of the insulating substrate 1 and the lid 2 is removed. The semiconductor device as a final product is completed by joining by melting and integrating.

(発明の効果) 本発明の半導体素子収納用パッケージによれば、半導
体素子を収容するための絶縁容器をフォルステライト質
焼結体もしくはジルコニア質焼結体で、外部リード端子
を透磁率が200(CGS)以下、導電率が10%(IACS)以
上、熱膨張係数が100乃至110×10-7/℃の金属で、ガラ
ス部材をシリカ60.0乃至70.0Wt%、ナトリウム、カリウ
ムの酸化物の少なくとも1種10.0乃至20.0Wt%、酸化バ
リウム5.0乃至15.0Wt%から成るガラスで形成したこと
から外部リード端子に電流を流したとしても該外部リー
ド端子中に大きな自己インダクタンスが発生することは
なく、その結果、前記自己インダクタンスにより誘発さ
れる逆起電力に起因したノイズを極小となし、内部に収
容する半導体素子を常に正常に作動させることが可能と
なる。
(Effect of the Invention) According to the semiconductor element housing package of the present invention, the insulating container for housing the semiconductor element is a forsterite-based sintered body or a zirconia-based sintered body, and the external lead terminals have a magnetic permeability of 200 ( CGS), a metal having a conductivity of 10% (IACS) or more and a thermal expansion coefficient of 100 to 110 × 10 −7 / ° C., and the glass member is made of 60.0 to 70.0 Wt% of silica and at least one of oxides of sodium and potassium. Since the seeds are formed of a glass composed of 10.0 to 20.0 Wt% and barium oxide of 5.0 to 15.0 Wt%, even if a current is applied to the external lead terminals, no large self-inductance is generated in the external lead terminals. The noise caused by the back electromotive force induced by the self-inductance can be minimized, and the semiconductor device housed therein can always be normally operated.

また外部リード端子の信号伝搬速度を極めて速いもの
となすことができ、絶縁容器内に収容した半導体素子を
高速駆動させたとしても半導体素子と外部電気回路との
間における信号の出し入れを安定、且つ確実となすこと
が可能となる。
Also, the signal propagation speed of the external lead terminal can be made extremely high, and even if the semiconductor element housed in the insulating container is driven at a high speed, the transfer of signals between the semiconductor element and the external electric circuit is stable, and It is possible to make sure.

更に外部リード端子の線幅が細くなったとしても外部
リード端子の電気抵抗を低く抑えることができ、その結
果、外部リード端子における信号の減衰を極小として内
部に収容する半導体素子に外部電気回路から供給される
電気信号を正確に入力することができる。
Furthermore, even if the line width of the external lead terminal is reduced, the electric resistance of the external lead terminal can be kept low. The supplied electric signal can be input accurately.

また更に前記外部リード端子はその熱膨張係数が絶縁
基体、蓋体及び封止用ガラス部材の各々の熱膨張係数と
近似し、絶縁基体と蓋体との間に外部リード端子を挟
み、各々を封止用ガラス部材で取着接合したとしても絶
縁基体及び蓋体と封止用ガラス部材との間、外部リード
端子と封止用ガラス部材との間のいずれにも熱膨張係数
の相違に起因する熱応力は発生せず、すべてを強固に取
着接合することも可能となる。
Furthermore, the thermal expansion coefficient of the external lead terminal is close to that of each of the insulating base, the lid and the sealing glass member, and the external lead terminal is sandwiched between the insulating base and the lid. Due to differences in the coefficient of thermal expansion between the insulating substrate and the lid and the sealing glass member, and between the external lead terminals and the sealing glass member even if they are attached and bonded with the sealing glass member. No thermal stress is generated, and it is possible to firmly attach and join all of them.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の半導体素子収納用パッケージの一実施
例を示す断面図、第2図は第1図に示すパッケージの絶
縁基体上面より見た平面図である。 1……絶縁基体、2……蓋体 3……絶縁容器、5……外部リード端子 6……封止用ガラス部材
FIG. 1 is a cross-sectional view showing one embodiment of a package for housing a semiconductor element according to the present invention, and FIG. 2 is a plan view of the package shown in FIG. DESCRIPTION OF SYMBOLS 1 ... Insulating base, 2 ... Lid 3 ... Insulating container, 5 ... External lead terminal 6 ... Glass member for sealing

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】内部に半導体素子を収容するための空所を
有する絶縁容器に外部リード端子をガラス部材を介して
取着して成る半導体素子収納用パッケージにおいて、前
記絶縁容器をフォルステライト質焼結体もしくはジルコ
ニア質焼結体で、外部リード端子を透磁率200(CGS)以
下、熱膨張係数100乃至110×10-7/℃、導電率10%(IAC
S)以上の金属で、ガラス部材をシリカ60.0乃至70.0Wt
%、ナトリウム、カリウムの酸化物の少なくとも1種1
0.0乃至20.0Wt%、酸化バリウム5.0乃至15.0Wt%から成
るガラスで形成したことを特徴とする半導体素子収納用
パッケージ。
1. A package for storing semiconductor elements, wherein an external lead terminal is attached via a glass member to an insulating container having a space for accommodating a semiconductor element therein. A sintered or zirconia-based sintered body with an external lead terminal having a magnetic permeability of 200 (CGS) or less, a coefficient of thermal expansion of 100 to 110 × 10 -7 / ° C, and a conductivity of 10% (IAC
S) With the above metals, the glass member is silica 60.0 to 70.0Wt
%, At least one of sodium and potassium oxides 1
A package for accommodating a semiconductor element, comprising a glass made of 0.0 to 20.0 Wt% and 5.0 to 15.0 Wt% barium oxide.
JP1312728A 1989-08-25 1989-11-30 Package for storing semiconductor elements Expired - Lifetime JP2742618B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1312728A JP2742618B2 (en) 1989-11-30 1989-11-30 Package for storing semiconductor elements
US07/573,406 US5057905A (en) 1989-08-25 1990-08-24 Container package for semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1312728A JP2742618B2 (en) 1989-11-30 1989-11-30 Package for storing semiconductor elements

Publications (2)

Publication Number Publication Date
JPH03173160A JPH03173160A (en) 1991-07-26
JP2742618B2 true JP2742618B2 (en) 1998-04-22

Family

ID=18032709

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1312728A Expired - Lifetime JP2742618B2 (en) 1989-08-25 1989-11-30 Package for storing semiconductor elements

Country Status (1)

Country Link
JP (1) JP2742618B2 (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5521968B2 (en) * 1974-05-16 1980-06-13
JPS53123080A (en) * 1977-04-02 1978-10-27 Ngk Insulators Ltd Circuit substrate and ceramic package assembly and method of producing same
JPS6265954A (en) * 1985-09-18 1987-03-25 Nippon Electric Glass Co Ltd Borosilicate glass for sealing alumina
JPH0516730Y2 (en) * 1987-05-22 1993-05-06
JPS645041A (en) * 1987-06-29 1989-01-10 Shinko Electric Ind Co Manufacture of ceramic body having superconducting circuit pattern

Also Published As

Publication number Publication date
JPH03173160A (en) 1991-07-26

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