JP2742412B2 - Inverter device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an inverter device. [Background Art] FIG. 8 shows a configuration of an inverter device using a conventional self-excited inverter circuit B, in which transistors Q ₁ and Q ₂ are connected in series from a DC power supply (including a rectified voltage of an AC power supply) E. The diodes D ₁ and D ₂ are connected in parallel to the transistors Q ₁ and Q _{2 with} the polarity shown. Capacitor C ₁ , load R, primary winding of drive transformer T ₁ in parallel with transistor Q ₁
a series circuit of n ₁ is connected, drive transformer T ₁ having a primary winding n ₁ has a secondary winding n _2, n _3, the secondary winding n ₂ control resistance of the transistor Q ₁ It is connected to R _1, 2 winding n ₃ is connected to a control resistor R ₂ of the transistor Q _2. The load R forms a resonance circuit including the inductance L, the capacitor C ₁ , and the discharge lamp LA. Further, the inverter circuit B is provided with a start circuit ST, and the start circuit ST is configured as follows. That connecting a resistor R ₃ and capacitor C ₃ in series, the connection point of the resistor R ₃ and capacitor C ₃ example DIAC
Connected to one end of the bidirectional switching elements, such as Q _5, it is connected to the other end of the diac Q ₅ to the base of the transistor Q _2. The connection point between the resistor R ₃ and the capacitor C ₃ is connected to the collector of the transistor Q ₂ via the diode D ₃ . The operation of the above-described inverter circuit B is as follows.
That is, when the power switch SW is turned on, the capacitor C ₃ becomes the resistor R ₃
Is charged through. Then the capacitor when the voltage of the capacitor C ₃ reaches the break-over voltage of the diac Q ₅
C ₃ is discharged through the base-emitter junction of the transistor Q _2. Transistor Q ₂ for the first time conducted by this discharge. Thus charging the capacitor C ₁ current flows through the DC power source E → capacitor C ₁ → load R → 1 winding n ₁ → transistor Q ₂ → DC power source E for driving transformer T _1. Since this current flows through the primary winding n ₁ of the drive transformer T _1, 2 pieces of 2
Voltage is induced in the next windings n ₂ and n ₃ . Polarity induced voltage of the secondary winding n ₃ is to maintain the conductive state of the transistor Q ₂ (forward voltage)
Having. Then the current in an attempt to charge the capacitor C ₁ increases, the current gradually decreases as the charging progresses, eventually when approached zero, the forward voltage in feedback voltage transistor Q ₁ by the driving transformer T _1, transistor Q ₂ the transistor Q ₂ is reverse voltage is turned off, the transistor Q ₁ is turned on. Then, 1 of the load R and the driving transformer T ₁
Winding n ₁ and transistor Q ₁ and the capacitor C ₁ and be closed circuit starts to discharge. The subsequent transistor Q ₁ in the vibration due to the capacitor discharge is turned off, the load R by turning on and off the two transistors Q _1, Q ₂ alternately by repeating charge and discharge of the capacitor C ₁ as referred to turn on the transistor Q ₂ electric current, the discharge passage LA is igniting the resonance voltage generated in the capacitor C _2. However, in such a configuration, the transistors Q ₁ , Q ₂
Of hFE (DC current amplification factor), the driving transformer T ₁ of the .mu.s (relative permeability), tan [delta (loss factor), the inductance value of the inductance L in the load R to form a resonant circuit, such as the capacitance of the capacitor C ₂ Due to the variation, the current flowing through the load R as the discharge lamp fluctuates greatly. When the current decreases, the specified illuminance cannot be obtained, and when the current increases, a current exceeding a specified value flows through the discharge lamp LA, which adversely affects the life of the discharge lamp LA. In addition, a large current flows through the transistors Q ₁ and Q ₂ and the inductance L, and the amount of heat generated increases. The above problems also occur when the DC power supply E voltage fluctuates. Conventionally, as a discharge lamp lighting method for performing load fluctuation compensation, a frequency control method as shown in FIG. 9 is often used. FIG. 10 shows a specific example of the circuit, in which a DC power supply E including a power supply obtained by rectifying an AC is input to a capacitor.
A half bridge type inverter circuit B is constituted by C ₄ , C ₅ , diodes D ₁ , D ₂ , transistors Q ₁ , Q ₂ , a choke coil L ₁ as a load R, a discharge lamp LA are connected in series, and a discharge lamp LA is connected to the discharge lamp LA. capacitor C ₆ is connected in parallel to form a series resonant circuit. The transistors Q ₁ and Q ₂ are controlled by the control circuit S, and the load current detection circuit F detects the lamp current and feeds it back to the control circuit S. In this configuration, the transistors Q ₁ and Q ₂ are turned on / off at a certain switching frequency higher than the resonance frequency at the time of full lighting, as shown in FIG. ) As shown in the transistor
By increasing the setting of the switching frequency of Q ₁ and Q ₂ , the impedance of the resonance circuit can be increased and the lamp current can be reduced. However, in the method described above, since the frequency is made variable, there are problems such as an increase in power supply feedback noise and an increase in the frequency resulting in an increase in transistor switching loss. [Object of the Invention] The present invention has been made in view of the above problems, and an object of the present invention is to compensate for load current fluctuation without changing the frequency and without increasing the loss of the switching transistor. It is an object of the present invention to provide an inverter device having a simple circuit configuration capable of performing the following. [Disclosure of the Invention] In the present invention, in order to achieve the above object, at least one pair of switching elements including a DC power supply and a transistor and a diode connected in anti-parallel to the transistor at both ends of the DC power supply are connected in series. An inverter circuit that turns on a corresponding switching element in a drive period that is alternately set in a predetermined cycle for each switching element, converts the voltage of the DC power supply into an AC voltage and outputs the AC voltage, and an output of the inverter circuit. An inverter device comprising: a load to be energized; a control circuit that varies a ratio of an ON period of each switching element in the drive period; and a control circuit connected in series with the load, for each ON period of the pair of switching elements. The positive and negative voltages of the inverter circuit generated by the change in the ratio are included in the asymmetric output voltage. A capacitor that cuts a flow component is provided in the inverter circuit, a control circuit is connected to one control terminal of the pair of switching elements, and a sub-switching element that cuts off a drive signal to the switching element when turned on; A comparator for detecting a load fluctuation detecting element such as a load current or an input voltage and comparing the detected output with a reference value, and a feedback path for integrating a comparison output of the comparator and feeding back to a control terminal of the sub-switching element Are provided. Hereinafter, the present invention will be described with reference to examples. Embodiment 1 A discharge lamp lighting device using an inverter device according to the present invention is a self-excited oscillation inverter circuit in which a DC power supply is used as a power supply and a series resonance circuit including an inductance, a capacitor, and a discharge lamp is used as a load. A sub-switching element is connected in parallel to one feedback input terminal of the switching element, and a part of the output of the inverter circuit is fed back through a comparator and an integrator to a control terminal of the sub-switching element via switch means. Yes, the drive periods of the pair of switching elements are alternately set by a feedback signal in a predetermined cycle by self-excited oscillation, and the corresponding switching elements are turned on in the drive period, and the feedback signal of one of the switching elements is turned on by the sub-switching element. Forcibly shut off the switch during the drive period of the switching element. The feature is that the ratio of the on-periods of the two switching elements is made variable by shortening the on-period. FIG. 1 shows an embodiment using a half-bridge type inverter circuit. In this figure, an inverter circuit B uses a DC power source E as a power source and a diode as in FIG.
It is composed of D ₁ , D ₂ , capacitors C ₁ , C ₂ , transistors Q ₁ , Q _2, etc., which are main switching elements, and has an inductance L as a load R, a discharge lamp LA connected in series, and a parallel connection to the discharge lamp LA. capacitor C ₂ is connected, the series resonant circuit is configured. The starting circuit ST has the same configuration as the starting circuit ST of the circuit in FIG. 8, and is used to start the inverter circuit B when the power is turned on. Moreover transistor Q ₂ based, between the emitter serving as the sub-switching element transistor Q ₃ is connected through a resistor R _2. The base of the transistor Q ₃ are the transistor Q ₄ is connected for control, which is turned on by the output of the monostable multivibrator IC _2, it is turned off. Monostable multivibrator IC ₁ in Naozu, IC ₂ commercially available IC, MC14538B, composed of such SN74123N, further connection point between the collector of the base of the transistor Q ₄ of the transistor Q ₃ are of the integrator 1 It is connected to the output terminal of the operational amplifier IC ₄ via a resistor R _18. Operational amplifier IC ₄ is composed of a μPC451 if励E. The integrator 1 is adapted to be inputted to the operational amplifier IC ₄ via a resistor R ₁₉ to the output signal q ₃ of the comparator 2. Comparator 2 is a comparator IC ₃
(E.g., MyuPC451) consists, current transformer T ₂ load detected by the current I _LA proportional to the secondary output diode D _4,
The detection output voltage Vi obtained by rectifying and smoothing capacitor C ₆ compares the reference voltage e. This reference voltage e is obtained by a Zener diode or the like. Thus, the current transformer T ₂ , the comparator IC ₃ , the transistors Q ₃ , Q ₄ , the monostable multivibrators IC ₁ , IC _{2 and the} like constitute a control circuit S for compensating the output fluctuation of the inverter circuit B. Next, the operation of this embodiment will be described with reference to the waveform diagrams of FIGS. First, the monostable multi ICs ₁ and ₂ operate as follows. That is, the voltage V _R5 (FIG. 2 (a)) obtained by dividing the voltage V _{CE of the} transistor Q ₂ by the resistors R _{4 and} R ₅ is input to the input terminal B ₁ of the monostable multivibrator IC ₁ . You. The output terminal Q ₁ of the monostable multivibrator IC ₁ has:
Exits signals q ₁ to the high level at the falling edge of voltage V _R5.
This time is determined by the capacitor C ₇ resistor R ₆ (second
(See figure (c)). Monostable multivibrator output signal q ₁ IC ₁ 'further input B ₂ of the monostable multivibrator IC ₂
Output of the monostable multivibrator IC ₂
The _2, the signal q ₂ as a low level at the falling edge of the signal q ₁ is output. Low level period of the signal q ₂ is the capacitor C ₈
It is determined by the resistor R ₇ (see FIG. 2 (d)). The signal q ₂ is inputted via a resistor R ₈ to the base of the transistor Q _4, the transistor Q ₄ on, it is turned off. Then the current transformer T ₂ are detected load current I _LA, the detection output voltage Vi is compared with a reference voltage e by the comparator IC ₃ of the comparator 2. At the output end of comparator IC ₃ ,
When e, low level, when Vi> e, the signal q ₃ to a high level is output as the third view (b). This signal q ₃
Is further input to the integrator 1 and the output signal q _{4 of the} integrator 1
Is as shown in FIG. Here, since the integrator 1 forms an inverting integrator, the phase of the input / output signal is reversed. And the base of the transistor Q ₃ signal q ₄ via a resistor R ₁₈ Well,
Is input to the connection point of the collector of the transistor Q _4. Thus to increase the load current I _LA is equal to or Vi> e, the signal q
₃ becomes a low level as shown in FIG. 3 (b), the output signal q ₄ of the integrator 1 increases linearly as shown in FIG. 3 (b), the transistor Q ₃ are transistors Q ₄ Turns on in synchronization with off. This transistor Q ₂ is rapidly off. As a result the on period of the transistor Q ₂ is smaller than the on period of the transistor Q _1, the transistors Q _1, Q
_In the period of ₂ , the load current _ILA becomes small due to the imbalance. This principle has already been proposed in Japanese Patent Application No. 60-13716. To summarize the principle, the positive waveform and the negative waveform are not the same (the on-duty is different) by making the ON periods of both transistors Q ₁ and Q ₂ different.
Form an asymmetrical AC waveform and convert this AC waveform to a capacitor.
When through a C ₁ is applied to the load R, the DC component by the capacitor C ₁ is to be cut, so that the power corresponding to the asymmetry is supplied to the load R. Therefore smaller than the ON period of the transistor Q _1, the transistors Q _1, Q
_The power supplied to the load R can be adjusted by gradually changing the ON period of No. ₂ to change the asymmetry of the AC output. Now the load current I _LA decreases, eventually, when the Vi> e, the output signal q ₃ of the comparator IC ₃ of the comparator 2 becomes high level. The output signal q ₄ of the integrator 1, as shown in the result FIG. 3 (b) is reduced linearly, eventually transistor Q ₃ is equal the ON period of the transistor Q _1, Q ₂ turns off, the load current I _LA increases. By repeating the above operation, the load current I output waveform of _LA becomes as shown in FIG. 3 (d), as a result the load current I _LA detection output voltage Vi is the comparator 2 reference voltage e
And the load current _ILA also becomes a substantially constant value. In this embodiment, the period T during which the load current _ILA changes in FIG. 3D is the time constant capacitor of the integrator 1 shown in FIG.
C _9, is determined by the resistor R _19, the period T is set to 20msec or less the variation when the period T is greater than 20msec load current I _LA is recognized as a flicker to the human eye. Note FIG. 2 (b) current I _Q2 is flowing through the transistor Q _2, also FIG. 3 (c) is a current I _Q3 flowing through the transistor Q _3, also FIG. (E) shows a signal q _2. Example 2 Figure 4 shows an embodiment, in this embodiment connected to the base of the transistor Q ₂ the sub-switching element serving transistor Q ₃ in series, the output of the secondary winding n ₃ resistance R It is adapted to be connected to the base of the transistor Q ₂ through ₂₀ and the transistor Q _3. And this transistor Q ₄ transistor Q ₄ for controlling the base of the transistor Q ₃ is connected to the same manner as in Example 1, the monostable multivibrator IC ₂
It is turned on and off by the output of. The output of integrator 1 is connected via a resistor R ₁₈ to the further connecting point of the collector of the base of the transistor Q ₄ of the transistor Q _3. The above configuration is different from the first embodiment, and other configurations are the same as the first embodiment. Next, the operation of this embodiment will be described with reference to the waveform diagrams of FIGS. First, the monostable multi ICs ₁ and ₂ operate as follows. That is, the voltage V _R5 (FIG. 5 (a)) obtained by dividing the voltage V _{CE of the} transistor Q ₂ by the resistors R ₄ and R ₅ is input to the input terminal B ₁ of the monostable multivibrator IC ₁ . . The output to Q ₁ monostable multivibrator IC _1, exits signals q ₁ to the high level at the falling edge of voltage V _R5. This period is determined by the capacitor C ₇ resistor R ₆ (see FIG. 5 (c)). Output signals q ₁ of the monostable multivibrator IC ₁ 'is further inputted to the input terminal B ₂ of the monostable multivibrator IC _2, the output terminal Q ₂ of the monostable multivibrator IC _2, the high at the falling edge of the signal q ₁ signal q ₂ as a level is outputted. High level period of the signal q ₂ are determined by the resistor R ₇ and capacitor C ₈ (see FIG. 5 (d)). The signal q ₂ is inputted via a resistor R ₈ to the base of the transistor Q _4, the transistor Q ₄ on, it is turned off. Then the current transformer T ₂ are detected load current I _LA, the detection output voltage Vi is compared with a reference voltage e by the comparator IC ₃ of the comparator 2. At the output end of comparator IC ₃ ,
When e, low level, when Vi> e, the signal q ₃ to a high level is output as FIG. 6 (b). This signal q ₃
Is further input to the integrator 1 and the output signal q _{4 of the} integrator 1
Is as shown in FIG. Here, since the integrator 1 forms an inverting integrator, the phase of the input / output signal is reversed. And the base of the transistor Q ₃ signal q ₄ via a resistor R ₁₈ Well,
Is input to the connection point of the collector of the transistor Q _4. Thus to increase the load current I _LA is equal to or Vi> e, the signal q
₃ becomes a low level as shown in FIG. 6 (b), the output signal q ₄ of the integrator 1 increases linearly as shown in Figure 6 (b), the transistor Q ₃ are transistors Q ₄ Turns off synchronously with on. This transistor Q ₂ is rapidly off. As a result the on period of the transistor Q ₂ is on-period of the transistor Q _1, Q ₂ are becomes unbalanced, the load current I
_LA becomes smaller. Now the load current I _LA decreases, eventually, when the Vi> e, the output signal q ₃ of the comparator IC ₃ of the comparator 2 becomes high level. Consequently Figure 6 output signal q ₄ of the integrator 1, as shown in (b) is linearly decreased, eventually the transistor Q ₃ is equal the ON period of the transistor Q _1, Q ₂ turns off, the load current I _LA increases. By repeating the above operation, the load current I output waveform of _LA becomes as shown in Figure 6 (d), as a result the load current I _LA detection output voltage Vi is the comparator 2 reference voltage e
And the load current _ILA also becomes a substantially constant value. In this embodiment, the period T during which the load current _ILA changes in FIG. 6D is the time constant capacitor of the integrator 1 shown in FIG.
C _9, is determined by the resistor R _19, the period T is set to 20msec or less the variation when the period T is greater than 20msec load current I _LA is recognized as a flicker to the human eye. Note 5 (b) is a current flowing through the transistor Q ₂ I _Q2, also FIG. 6 (c) is a current I _Q4 flowing through the transistor Q _4, also FIG. (E) shows a signal q _2. Example 3 with respect to the embodiments 1 and 2 in which the comparator 2 inputs the detected output voltage Vi that both corresponding to the load current I _LA, this embodiment resistor input voltage R _21, R ₂₂ , And the detected voltage is input to the comparator 2. Other configurations and operations are the same as those of the first embodiment. [Effects of the Invention] In the present invention, at least one pair of switching elements each including a transistor and a diode connected in anti-parallel to the transistor are connected in series at both ends of the DC power supply. An inverter circuit that turns on a corresponding switching element during a drive period that is set alternately in a cycle to convert the voltage of the DC power supply into an AC voltage and outputs the AC voltage, and a load that is energized by the output of the inverter circuit An inverter device, comprising: a control circuit that varies a ratio of an on period of each switching element in the drive period; and an inverter circuit connected in series with a load and generated by a change in a ratio of each on period of the pair of switching elements. That cuts the DC component contained in the asymmetric output voltage And a sub-switching element connected to one of the control terminals of the pair of switching elements to cut off a drive signal to the switching element when the control circuit is turned on. A comparator for detecting a load fluctuation detecting element such as a voltage and comparing the detected output with a reference value, and a feedback path for integrating a comparison output of the comparator and feeding back to a control terminal of the sub-switching element are provided. This makes it possible to compensate for fluctuations in the output of the self-excited inverter circuit. As a result, the oscillation frequency can be changed, but without using a separately-excited inverter circuit having complicated control and problems such as an increase in loss. The load variation can be compensated, which is advantageous for preventing generation of noise and reducing switching loss of the switching element.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram of a first embodiment of the present invention, FIGS. 2 and 3 are waveform diagrams for explaining the operation of the first embodiment, and FIG. 4 is a circuit diagram of a second embodiment of the present invention. FIGS. 5, 5 and 6 are waveform diagrams for explaining the above operation, FIG. 7 is a circuit diagram of a third embodiment of the present invention, FIG. 8 is a circuit diagram of a conventional example, and FIG. 9 is another conventional example. FIG. 10 is a circuit diagram of the above, and FIG. 11 is a waveform diagram for explaining the operation of the above. R: load, E: DC power supply, B: inverter circuit,
Q ₁ , Q ₂ ... Transistors, S... Control circuits, 1... Integrators, 2.

Claims (1)

(57) [Claims] A drive period in which at least one pair of a switching element including a DC power supply and a transistor and a diode connected in anti-parallel to the transistor at both ends of the DC power supply are connected in series, and each switching element is alternately set at a predetermined cycle. An inverter device comprising: an inverter circuit that turns on a corresponding switching element to convert the voltage of the DC power supply into an AC voltage and outputs the AC voltage; and a load that is energized by the output of the inverter circuit. And a control circuit that varies the ratio of the on-periods of the respective switching elements, and the positive and negative voltages of the inverter circuit connected in series with the load and generated by a change in the ratio of the on-periods of the pair of switching elements to an asymmetric output voltage. A capacitor that cuts the DC component contained in the inverter circuit A control circuit connected to one control terminal of the pair of switching elements to cut off a drive signal to the switching element when the control circuit is turned on; and a load fluctuation detecting element for load current and input voltage of the inverter circuit. And a feedback path for integrating the comparison output of the comparator and returning the result to the control terminal of the sub-switching element. Inverter device.