JP2738091B2 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

Info

Publication number
JP2738091B2
JP2738091B2 JP32695889A JP32695889A JP2738091B2 JP 2738091 B2 JP2738091 B2 JP 2738091B2 JP 32695889 A JP32695889 A JP 32695889A JP 32695889 A JP32695889 A JP 32695889A JP 2738091 B2 JP2738091 B2 JP 2738091B2
Authority
JP
Japan
Prior art keywords
tape
semiconductor chip
semiconductor
chip
back surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP32695889A
Other languages
Japanese (ja)
Other versions
JPH03187242A (en
Inventor
九弘 岡本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP32695889A priority Critical patent/JP2738091B2/en
Publication of JPH03187242A publication Critical patent/JPH03187242A/en
Application granted granted Critical
Publication of JP2738091B2 publication Critical patent/JP2738091B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/10155Shape being other than a cuboid
    • H01L2924/10158Shape being other than a cuboid at the passive surface

Landscapes

  • Dicing (AREA)

Description

【発明の詳細な説明】 〔概要〕 半導体ウエーハを分割して半導体チップに分離するウ
エーハダイシング方法の改良に関し、 半導体ウエーハを分割して分離された半導体チップを
UVテープから取り外してチップトレイに搬送する際に、
半導体チップに生じているカケが他の半導体チップの表
面に落下するのを防止することが可能となる半導体装置
の製造方法の提供を目的とし、 第1のUVテープに半導体ウエーハの背面を貼付し、前
記半導体ウエーハを個々の半導体チップに分割した後、
前記半導体チップ及び第1のUVテープを洗浄し、前記半
導体チップの背面に貼付してある前記第1のUVテープに
紫外線を照射した後、前記半導体チップの表面に別の第
2のUVテープを貼付する工程と、前記半導体チップの背
面に貼付され、紫外線を照射された前記第1のUVテープ
を半導体チップの背面から剥離する工程と、前記第2の
UVテープに貼付されている前記半導体チップの背面の縁
部分を面取りブレードを用いて面取り加工する工程と、
前記半導体チップ及び第2のUVテープを洗浄し、前記半
導体チップの表面に貼付されている前記第2のUVテープ
に紫外線を照射した後、前記半導体チップの背面に更に
別の第3のUVテープを貼付し、前記第2のUVテープを前
記半導体チップの表面から剥離する工程とを含むよう構
成する。
DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to an improvement in a wafer dicing method for dividing a semiconductor wafer into semiconductor chips and separating the semiconductor chips into semiconductor chips.
When removing from UV tape and transporting to the chip tray,
In order to provide a method of manufacturing a semiconductor device capable of preventing chips generated on a semiconductor chip from falling onto the surface of another semiconductor chip, the back surface of a semiconductor wafer is attached to a first UV tape. After dividing the semiconductor wafer into individual semiconductor chips,
After washing the semiconductor chip and the first UV tape and irradiating the first UV tape attached to the back surface of the semiconductor chip with ultraviolet light, another second UV tape is applied to the surface of the semiconductor chip. Attaching the first UV tape, which is attached to the back surface of the semiconductor chip and irradiated with ultraviolet light, from the back surface of the semiconductor chip; and
A step of chamfering the edge portion of the back surface of the semiconductor chip attached to the UV tape using a chamfering blade,
After cleaning the semiconductor chip and the second UV tape, and irradiating the second UV tape adhered to the surface of the semiconductor chip with ultraviolet light, another third UV tape is further applied to the back surface of the semiconductor chip. And peeling off the second UV tape from the surface of the semiconductor chip.

〔産業上の利用分野〕[Industrial applications]

本発明は、半導体装置の製造方法に係り、特に半導体
ウエーハを分割して半導体チップに分離するウエーハダ
イシング方法の改良に関するものである。
The present invention relates to a method for manufacturing a semiconductor device, and more particularly to an improvement in a wafer dicing method for dividing a semiconductor wafer into semiconductor chips.

近年半導体装置の高集積化に伴い高信頼性が要求され
ており、このため半導体ウエーハの全板厚をダイシング
溝により分割するようフルカットし、分離された半導体
チップをピックアップしてチップトレイに並べる方法が
主流になりつつあるが、この半導体チップのピックアッ
プの際に、このダイシング溝と背面との交線に生じてい
るカケが半導体チップから分離して他の半導体チップの
表面に落下すると、アセンブリ工程におけるワイヤ間の
短絡や半導体チップのパッド間の短絡の要因となること
がある。
In recent years, high reliability has been required along with the high integration of semiconductor devices. For this reason, the full thickness of a semiconductor wafer is fully cut so as to be divided by dicing grooves, and the separated semiconductor chips are picked up and arranged on a chip tray. Although the method is becoming mainstream, when the chip generated at the intersection of the dicing groove and the back surface separates from the semiconductor chip and drops on the surface of another semiconductor chip during pickup of the semiconductor chip, the assembly is performed. This may cause a short circuit between wires in a process or a short circuit between pads of a semiconductor chip.

以上のような状況から、半導体ウエーハのダイシング
溝と背面との交線に生じたカケが、半導体チップと分離
して他の半導体チップの表面に落下するのを防止するこ
とが可能な半導体装置の製造方法が要望されている。
From the above situation, a semiconductor device capable of preventing chips generated at an intersection between a dicing groove of a semiconductor wafer and a back surface from being separated from a semiconductor chip and falling onto the surface of another semiconductor chip. There is a need for a manufacturing method.

〔従来の技術〕[Conventional technology]

従来の半導体装置の製造方法を第2図により工程順に
説明する。
A conventional method for manufacturing a semiconductor device will be described in the order of steps with reference to FIG.

まず第2図(a)に示すようにUVテープ13に半導体ウ
エーハ11の背面を貼付し、図示しないダイシング装置を
用いて第2図(b)に示すようにブレード14によりUVテ
ープ13に20〜50μm程度切り込むように全板厚を分割し
てダイシング溝11aを形成して個々の半導体チップ12に
分割し、純水を用いるスピン洗浄によりダイシング工程
で生じた粉を除去する。
First, as shown in FIG. 2 (a), the back surface of the semiconductor wafer 11 is adhered to a UV tape 13 and, using a dicing device (not shown), the UV tape 13 is applied to the UV tape 13 with a blade 14 as shown in FIG. 2 (b). A dicing groove 11a is formed by dividing the entire thickness so as to cut about 50 μm, and the semiconductor chip 12 is divided into individual semiconductor chips 12, and powder generated in the dicing step is removed by spin cleaning using pure water.

このダイシング工程においては、半導体ウエーハ11の
背面とダイシング溝11aとの交線に図に示すようなカケ1
2aが生じている。
In this dicing step, the chip 1 as shown in the figure is drawn at the intersection of the back surface of the semiconductor wafer 11 and the dicing groove 11a.
2a has occurred.

UVテープ13に紫外線を照射して硬化させた後、第2図
(c)に示すようにこの分割された半導体チップ12をUV
テープ13を貫通するピックアップ針15で突き上げて、半
導体チップ12をUVテープ13から剥離して半導体チップ12
を収納する図示しないチップトレイに搬送して収納して
いるが、この際に半導体チップ12に生じているカケ12a
が他の半導体チップの表面に落下して傷,短絡等の障害
の原因となっている。
After irradiating the UV tape 13 with ultraviolet rays to cure the semiconductor chip 12, the divided semiconductor chips 12 are UV-cured as shown in FIG.
The semiconductor chip 12 is peeled off from the UV tape 13 by pushing up with a pickup needle 15 penetrating the tape
Is transported to and stored in a chip tray (not shown).
Is dropped on the surface of another semiconductor chip, causing a failure such as a scratch or a short circuit.

〔発明が解決しようとする課題〕[Problems to be solved by the invention]

以上説明した従来の半導体装置の製造方法において
は、半導体チップをUVテープから剥離して半導体チップ
を収納するチップトレイに搬送して収納する際に、半導
体チップに生じているカケが他の半導体チップの表面に
落下して傷,短絡等の障害が発生するという問題点があ
った。
In the conventional method for manufacturing a semiconductor device described above, when a semiconductor chip is peeled off from the UV tape and transported to a chip tray for storing the semiconductor chip and stored therein, the chip generated on the semiconductor chip may be damaged by another semiconductor chip. There is a problem that a fault such as a scratch and a short circuit occurs when the device falls on the surface of the device.

本発明は以上のような状況から、半導体ウエーハを分
割して分離された半導体チップをUVテープから取り外し
てチップトレイに搬送する際に、半導体チップに生じて
いるカケが他の半導体チップの表面に落下するのを防止
することが可能となる半導体装置の製造方法の提供を目
的としたものである。
According to the present invention, when the semiconductor chip divided from the semiconductor wafer is separated from the UV tape and transferred to the chip tray, the chip generated on the semiconductor chip may be removed from the surface of another semiconductor chip. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can prevent the semiconductor device from falling.

〔課題を解決するための手段〕[Means for solving the problem]

本発明の半導体装置の製造方法は、第1のUVテープに
半導体ウエーハの背面を貼付し、この半導体ウエーハを
個々の半導体チップに分割した後、この半導体チップ及
び第1のUVテープを洗浄し、この半導体チップの背面に
貼付してあるこの第1のUVテープに紫外線を照射した
後、この半導体チップの表面に別の第2のUVテープを貼
付する工程と、この半導体チップの背面に貼付され、紫
外線を照射されたこの第1のUVテープを半導体チップの
背面から剥離する工程と、この第2のUVテープに貼付さ
れているこの半導体チップの背面の縁部分を面取りブレ
ードを用いて面取り加工する工程と、この半導体チップ
及び第2のUVテープを洗浄し、この半導体チップの表面
に貼付されているこの第2のUVテープに紫外線を照射し
た後、この半導体チップの背面に更に別の第3のUVテー
プを貼付し、この第2のUVテープをこの半導体チップの
表面から剥離する工程とを含むよう構成する。
In the method of manufacturing a semiconductor device according to the present invention, the back surface of a semiconductor wafer is attached to a first UV tape, and after dividing the semiconductor wafer into individual semiconductor chips, the semiconductor chip and the first UV tape are washed. After irradiating the first UV tape attached to the back surface of the semiconductor chip with ultraviolet light, attaching another second UV tape to the surface of the semiconductor chip, and attaching the second UV tape to the back surface of the semiconductor chip. Peeling off the first UV tape irradiated with ultraviolet rays from the back surface of the semiconductor chip, and chamfering an edge portion of the back surface of the semiconductor chip attached to the second UV tape using a chamfering blade. Cleaning the semiconductor chip and the second UV tape, and irradiating the second UV tape attached to the surface of the semiconductor chip with ultraviolet rays. Attaching another third UV tape to the surface, and peeling off the second UV tape from the surface of the semiconductor chip.

〔作用〕[Action]

即ち本発明においては、UVテープに貼付した半導体ウ
エーハを個々の半導体チップに分割した後、この半導体
ウエーハの背面に貼付してあるこのUVテープに紫外線を
照射し、この半導体ウエーハの背面に別のUVテープを貼
付し、この半導体ウエーハの背面に貼付され、紫外線を
照射されたUVテープを半導体ウエーハの背面から剥離
し、このUVテープに貼付されているこの半導体ウエーハ
の背面とこのダイシング溝との交線を面取りブレードを
用いて面取り加工し、この半導体ウエーハの表面に貼付
されているこのUVテープに紫外線を照射した後、この半
導体ウエーハの背面に更に別のUVテープを貼付し、この
紫外線を照射したUVテープをこの半導体ウエーハの表面
から剥離するので、この半導体チップのカケを完全に面
取りブレードで取り去ることが可能となり、半導体チッ
プの搬送時にカケが他の半導体チップの表面に落下する
のを防止することができ、傷,短絡等の障害を防止する
ことが可能となる。
That is, in the present invention, after dividing the semiconductor wafer attached to the UV tape into individual semiconductor chips, the UV tape attached to the back of the semiconductor wafer is irradiated with ultraviolet light, and another semiconductor wafer is attached to the back of the semiconductor wafer. A UV tape is adhered, the UV tape that is adhered to the back of the semiconductor wafer and irradiated with ultraviolet rays is peeled from the back of the semiconductor wafer, and the dicing groove between the back of the semiconductor wafer adhered to the UV tape and the dicing groove is formed. The intersection line is chamfered using a chamfering blade, and after irradiating the UV tape attached to the surface of the semiconductor wafer with ultraviolet light, another UV tape is attached to the back surface of the semiconductor wafer and the ultraviolet light is applied. The irradiated UV tape is peeled from the surface of this semiconductor wafer, so the chip of this semiconductor chip must be completely removed with a chamfer blade. This makes it possible to prevent chips from dropping onto the surface of another semiconductor chip when the semiconductor chip is transported, thereby preventing obstacles such as scratches and short circuits.

〔実施例〕〔Example〕

以下第1図により本発明による一実施例を工程順に詳
細に説明する。
Hereinafter, an embodiment of the present invention will be described in detail with reference to FIG.

まず第1図(a)に示すようにUVテープ3に半導体ウ
エーハ1の背面を貼付し、図示しないダイシング装置を
用いて第1図(b)に示すようにブレード4によりUVテ
ープ3に20〜50μm程度切り込むように半導体ウエーハ
1の全板厚を分割してダイシング溝1aを形成して個々の
半導体チップ2に分離し、純水を用いるスピン洗浄によ
りダイシング工程で生じた粉を除去する。
First, the back surface of the semiconductor wafer 1 is affixed to the UV tape 3 as shown in FIG. 1 (a), and the UV tape 3 is applied to the UV tape 3 by a blade 4 as shown in FIG. The whole thickness of the semiconductor wafer 1 is divided so as to cut into about 50 μm, dicing grooves 1a are formed and separated into individual semiconductor chips 2, and the powder generated in the dicing step is removed by spin cleaning using pure water.

このダイシング工程においては、半導体ウエーハ1の
背面とダイシング溝1aとの交線に図に示すようなカケ2a
が生じている。
In this dicing step, a chip 2a as shown in the figure is formed at the intersection of the back surface of the semiconductor wafer 1 and the dicing groove 1a.
Has occurred.

UVテープ3に紫外線を照射して硬化させた後、第1図
(c)に示すように、この分割された半導体チップ2の
表面にUVテープ5を貼付する。
After the UV tape 3 is cured by irradiating it with ultraviolet light, a UV tape 5 is attached to the surface of the divided semiconductor chip 2 as shown in FIG. 1 (c).

つぎにこのUVテープ3を剥離し、半導体チップ2の背
面を上にして図示しないダイシング装置のテーブルに載
置し、第1図(d)に示すように、面取りブレード6を
用いて半導体チップ2の背面とダイシング溝1aとの交線
を面取り加工してこの部分に生じていたカケ2aを除去
し、純水を用いるスピン洗浄によりダイシング工程で生
じた粉を除去する。
Next, the UV tape 3 is peeled off, and placed on a table of a dicing apparatus (not shown) with the back surface of the semiconductor chip 2 facing up, and as shown in FIG. The intersecting line between the back surface and the dicing groove 1a is chamfered to remove the chip 2a generated in this portion, and the powder generated in the dicing step is removed by spin cleaning using pure water.

ついでこのUVテープ5に紫外線を照射して硬化させた
後、第1図(e)に示すように半導体チップ2の背面に
UVテープ7を貼付し、UVテープ5を剥離する。
Next, the UV tape 5 is cured by irradiating it with ultraviolet rays, and then, as shown in FIG.
The UV tape 7 is attached, and the UV tape 5 is peeled off.

最後にこのUVテープ7に紫外線を照射して硬化させた
後、第1図(f)に示すように半導体チップ2をUVテー
プ7を貫通するピックアップ針8で突き上げて、半導体
チップ2をUVテープ7から剥離して半導体チップを収納
するチップトレイに搬送して収納する。
Finally, the UV tape 7 is cured by irradiating it with ultraviolet rays. Then, as shown in FIG. 1 (f), the semiconductor chip 2 is pushed up by a pick-up needle 8 penetrating the UV tape 7, and the semiconductor chip 2 is The semiconductor chip is peeled off from the chip 7 and transferred to and stored in a chip tray for storing semiconductor chips.

このように半導体ウエーハ1をダイシングにより分割
して半導体チップ2に分離するのにUVテープ3を用い、
半導体チップ2の背面とダイシング溝1aとの交線を面取
り加工するのにUVテープ5を用い、最後に更に半導体チ
ップ2の背面をUVテープ7に貼付し、このUVテープ7か
ら半導体チップ2をチップトレイに搬送して収納するの
で、半導体チップ2から他の半導体チップの表面にカケ
2aが落下して傷,短絡等の障害の原因となるのを防止す
ることが可能となる。
In this way, the UV tape 3 is used to divide the semiconductor wafer 1 by dicing and separate it into the semiconductor chips 2,
The UV tape 5 is used to chamfer the intersection line between the back surface of the semiconductor chip 2 and the dicing groove 1a. Finally, the back surface of the semiconductor chip 2 is further adhered to the UV tape 7, and the semiconductor chip 2 is removed from the UV tape 7. Since the semiconductor chip is transported and stored in the chip tray, the chip from the semiconductor chip 2 to the surface of another semiconductor chip
2a can be prevented from dropping and causing an obstacle such as a scratch or a short circuit.

〔発明の効果〕〔The invention's effect〕

以上の説明から明らかなように本発明によれば、2枚
のUVテープを用いて半導体チップの分離とカケの除去を
行い、最後に半導体チップの背面をUVテープに貼付した
状態で半導体チップをピックアップしてチップトレイに
収納するので、カケが半導体チップから他の半導体チッ
プの表面に落下するのを防止することが可能となる利点
があり、著しい経済的及び、信頼性向上の効果が期待で
きる半導体装置の製造方法の提供が可能である。
As is apparent from the above description, according to the present invention, the semiconductor chip is separated and the chip is removed using two UV tapes, and finally, the semiconductor chip is attached with the back surface of the semiconductor chip attached to the UV tape. Since it is picked up and stored in the chip tray, there is an advantage that the chip can be prevented from dropping from the semiconductor chip to the surface of another semiconductor chip, and significant economical and reliability improvement effects can be expected. A method for manufacturing a semiconductor device can be provided.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明による一実施例を工程順に示す側断面
図、 第2図は従来の半導体装置の製造方法を工程順に示す側
断面図、 である。 図において、 1は半導体ウエーハ、1aはダイシング溝、2は半導体チ
ップ、2aはカケ、3はUVテープ、4はブレード、5はUV
テープ、6は面取りブレード、7はUVテープ、8はピッ
クアップ針、を示す。
FIG. 1 is a side sectional view showing one embodiment of the present invention in the order of steps, and FIG. 2 is a side sectional view showing a conventional method of manufacturing a semiconductor device in the order of steps. In the figure, 1 is a semiconductor wafer, 1a is a dicing groove, 2 is a semiconductor chip, 2a is a chip, 3 is a UV tape, 4 is a blade, 5 is UV
The tape, 6 indicates a chamfer blade, 7 indicates a UV tape, and 8 indicates a pickup needle.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】第1のUVテープ(3)に半導体ウエーハ
(1)の背面を貼付し、前記半導体ウエーハ(1)を個
々の半導体チップ(2)に分割した後、前記半導体チッ
プ(2)及び第1のUVテープ(3)を洗浄し、前記半導
体チップ(2)の背面に貼付してある前記第1のUVテー
プ(3)に紫外線を照射した後、前記半導体チップ
(2)の表面に別の第2のUVテープ(5)を貼付する工
程と、 前記半導体チップ(2)の背面に貼付され、紫外線を照
射された前記第1のUVテープ(3)を半導体チップ
(2)の背面から剥離する工程と、 前記第2のUVテープ(5)に貼付されている前記半導体
チップ(2)の背面の縁部分を面取りブレード(6)を
用いて面取り加工する工程と、 前記半導体チップ(2)及び第2のUVテープ(5)を洗
浄し、前記半導体チップ(2)の表面に貼付されている
前記第2のUVテープ(5)に紫外線を照射した後、前記
半導体チップ(2)の背面に更に別の第3のUVテープ
(7)を貼付し、前記第2のUVテープ(5)を前記半導
体チップ(2)の表面から剥離する工程と、 を含むことを特徴とする半導体装置の製造方法。
1. A semiconductor wafer (1) is affixed to a first UV tape (3) with a back surface attached thereto, and the semiconductor wafer (1) is divided into individual semiconductor chips (2). Cleaning the first UV tape (3) and irradiating the first UV tape (3) attached to the back surface of the semiconductor chip (2) with ultraviolet rays; Attaching another second UV tape (5) to the semiconductor chip (2), and attaching the first UV tape (3), which is attached to the back surface of the semiconductor chip (2) and irradiated with ultraviolet rays, to the semiconductor chip (2). A step of peeling off the back surface; a step of chamfering an edge portion of the back surface of the semiconductor chip (2) attached to the second UV tape (5) using a chamfer blade (6); (2) and the second UV tape (5) are washed, After irradiating the second UV tape (5) attached to the surface of the body chip (2) with ultraviolet rays, another third UV tape (7) is attached to the back surface of the semiconductor chip (2). And a step of peeling the second UV tape (5) from the surface of the semiconductor chip (2).
JP32695889A 1989-12-15 1989-12-15 Method for manufacturing semiconductor device Expired - Fee Related JP2738091B2 (en)

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JP32695889A JP2738091B2 (en) 1989-12-15 1989-12-15 Method for manufacturing semiconductor device

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Application Number Priority Date Filing Date Title
JP32695889A JP2738091B2 (en) 1989-12-15 1989-12-15 Method for manufacturing semiconductor device

Publications (2)

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JPH03187242A JPH03187242A (en) 1991-08-15
JP2738091B2 true JP2738091B2 (en) 1998-04-08

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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3497722B2 (en) 1998-02-27 2004-02-16 富士通株式会社 Semiconductor device, method of manufacturing the same, and transfer tray thereof
JP2000232080A (en) * 1999-02-10 2000-08-22 Disco Abrasive Syst Ltd Workpiece to be processed dividing system, and pellet- shifting apparatus
US6885522B1 (en) 1999-05-28 2005-04-26 Fujitsu Limited Head assembly having integrated circuit chip covered by layer which prevents foreign particle generation

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