JP2721521B2 - Inverter device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an inverter device used for a discharge lamp lighting device or the like having a dimming function.

[Prior Art] FIG. 11 is a circuit diagram of a conventional inverter device (see JP-A-63-110962). Hereinafter, the circuit configuration will be described. Transistors Q ₁ and Q ₂ as main switching elements are connected in series to both ends of the DC power supply E ₁ , and diodes D ₁ and D ₂ are connected in anti-parallel to the transistors Q ₁ and Q ₂ , respectively. At both ends of the transistor Q ₁ is a coupling capacitor C ₀ for cutting a direct current component, through a current transformer CT ₁ for feeding back the load current, the load circuit Z is connected. The load circuit Z is composed of an inductor L ₁ , a capacitor
C is constituted by _first and consisting of a discharge lamp l LC resonant circuit, the load current is oscillating current. The oscillating current flows through the primary winding n ₁ of the current transformer CT _1. Therefore,
In the secondary windings n ₂ and n ₃ of the current transformer CT ₁ , a voltage whose polarity changes according to the oscillating current flowing through the load circuit Z is induced,
This induced voltage is applied between the base / emitter of the transistor Q _1, Q _2, thereby switching the transistor Q _1, Q ₂ alternately. The resistance R ₁ to R ₃ is the base resistance of the transistor Q _1, Q _2.

The inverter device includes a starting circuit ST for starting the self-excited oscillation operation described above when the DC power source E ₁ is turned. This starter circuit ST starts
C ₂ is charged through the resistor R _5, the charging voltage is 2 the terminal thyristor reaches the breakover voltage of Q ₄ diode thyristor Q ₄ is turned on, via a diode thyristor Q ₄ to the base of the transistor Q ₂ Transistor with a base current
Q ₂ is turned on first to start the inverter device.

In addition, between the base and emitter of the transistor Q ₂ is,
Sub-switching element serving transistor Q ₃ is connected to the base of the transistor Q _3, the output signal of the control circuit X is applied through the base resistor R _4. In the control circuit X, it detects the voltage across the transistor Q ₂ with the resistor R _6, R _7, by operating the timer circuit TM1, TM2, the transistor Q ₃ transistor Q ₂ from then turned on after a predetermined time by turning on, in which forcibly turns off the transistor Q _2. The timer TM1 is the time until the transistor Q ₂ is forcibly turned off from the on-τ
₁ Set the timer circuit TM2 is to set the width tau ₂ of the ON signal of the transistor Q _3. This τ ₂ may be longer than the time from when the transistor Q ₃ is turned on to when the transistor Q ₂ is completely turned off. That is, this circuit focuses on the change in the collector-emitter voltage V _Q2 when the transistor Q ₂ switches, detects the on state of the transistor Q ₂ by detecting the voltage V _Q2, and after a certain period, the transistor Q ₂ Is forcibly turned off to control the output current.

Schmitt buffer SB and NOT in timer circuit TM1
A circuit N ₁ , a differentiating circuit including a capacitor C ₈ and a resistor R ₈ , and
Gate pulse circuit comprising a NOT circuit N ₂ generates a trigger signal at the falling time of the voltage detected by the resistor R _6, R ₇ (on-time the transistor Q _2). This trigger signal is input to a trigger input (pin 2) of a general-purpose timer ICtm (for example, μPD5555). The output of the general-purpose timer ICTM (3 pin) from the trigger point and the resistor R ₉ capacitor
Predetermined time determined by a time constant of C ₄ becomes "High" level. On-interval tau ₁ transistor Q ₂ is determined by this time.

The timer circuit TM2 is a gate pulse circuit for generating a signal of a predetermined width from the falling time of the output of the timer circuit TM1 (3 pin), a NOT circuit N _3, capacitor C
_6, comprises a differential circuit composed of the resistor R _10, and a NOT circuit N _4, N _5. Transistor Q ₃ is turned on and off by the output signal of the timer circuit TM2.

FIG. 12 is a circuit diagram of another conventional inverter device.
In this conventional example, the configuration of the main circuit of the inverter device is the same as that of the conventional example shown in FIG. 11, but the configuration of the control circuit is not self-excited but is separately excited as shown in FIG. This is different from the conventional example. The control circuit 10 includes an oscillator 11 that determines a switching frequency of the transistors Q ₁ and Q ₂ , a flip-flop 12 that divides a fundamental frequency generated by the oscillator 11,
A control signal for the transistors Q ₁ and Q ₂ is created by the AND circuits G ₁ and G ₂ from the outputs of the monostable multivibrator 13 for determining the on-time of the transistors Q ₁ and Q ₂ and the flip-flop 12 and the monostable multivibrator 13. And a two-phase dividing circuit 14. Control signal output from the control circuit 10 is input to the drive circuit 20, the transistors Q _1, Q ₂ for driving, via a drive transformer T _3, T _4, is supplied to the transistor Q _3, Q _4, The transistors Q ₁ and Q ₂ are alternately turned on and off to separately oscillate the inverter device. The switching frequency of the inverter device is determined by the oscillator 11, and the on-duty of each of the transistors Q ₁ and Q ₂ is determined by the monostable multivibrator 13.

[Problem to be Solved by the Invention] In the conventional example shown in FIG.
Q _1, Q ₂ are required current transformer CT ₁ comprising a pair of feedback winding for controlling on and off alternately, the shape and weight increases, the cost is also a problem of increase.
Further, as a current transformer CT _1, when using a toroidal core with no gap small, the inductance value is changed by variations in the permeability of the core at the time of manufacture (typically ± 30%), the oscillation frequency of the inverter device Also, there is a disadvantage that the output current greatly varies and the output variation becomes very large. The auxiliary and the timer circuit TM1 for determining the ON time of the transistor Q ₂ transistor Q ₃
Therefore, two timer circuits, a timer circuit TM2 for determining the ON time of the control circuit X, are required, and the configuration of the control circuit X becomes complicated.

On the other hand, in the conventional example shown in FIG. 12, the switching frequency of the transistors Q ₁ and Q ₂ can be freely changed by changing the oscillation frequency of the oscillator 11, and the output pulse of the monostable multivibrator 13 can be changed. By changing the width, the on-duty of the transistors Q ₁ and Q ₂ can be freely changed, so that the degree of freedom in design is increased, but the configuration of the control circuit 10 becomes very complicated, and the driving Since the transformers T ₃ and T ₄ are required, there is a problem that the configuration of the drive circuit 20 is complicated and the cost increases.

The present invention has been made in view of such a point,
An object of the present invention is to provide an inverter device that can arbitrarily set an output current to a load with a very simple configuration.

[Means for Solving the Problems] In the inverter device according to the present invention, in order to solve the above problems, as shown in FIG.
_1, the DC power supply a pair of switching elements connected in series to both ends of the E ₁ (transistors Q _1, Q _2), connected in parallel through the capacitor C ₀ to at least one of the switching elements, inductors L ₁ and A load circuit Z including a series circuit of a load 1 and an oscillating current flowing through the load circuit Z are fed back to only the control terminal of _one switching element (transistor Q ₁ ), and the _one switching is performed at a predetermined cycle determined by the oscillating current. On / off control of the other switching element (transistor Q ₂ ) is performed by feedback means (feedback winding n ₂ ) for controlling ON / OFF of only the element and the timer circuit 3 operating at least during the OFF period of the one switching element. And a control means (control circuit X).

In the control circuit X shown in FIG. 1, the detection circuit 1 has detected the off time of the transistor Q _1, triggers the timer circuit 3 to start the timer operation by the trigger circuit 2 in this off-time, the timer output of the timer circuit 3, and the transistor Q ₂ to turn on a certain time.

[Operation] In the present invention, as described above, one of the switching elements (transistor Q ₁ ) is turned on / off by feedback means (feedback winding n ₂ ) in accordance with the oscillating current of the load circuit Z,
Since the other switching element (transistor Q ₂ ) is controlled to be turned on and off by control means including the timer circuit 3, it is not necessary to use a current transformer having a pair of feedback windings or drive windings as in the conventional example. , can be performed oscillates in a very simple structure, yet it is possible to change the on-duty of the transistor Q ₂ in accordance with the time constant of the timer circuit 3, as it is possible to perform the adjustment of the output of the inverter device is there.

Embodiment 1 FIG. 2 is a circuit diagram of a first embodiment of the present invention. Since the basic configuration of the inverter device is the same as that of the conventional example, portions having the same functions are denoted by the same reference numerals, and redundant description will be omitted. In the present embodiment, the secondary winding n ₂ of the inductor L ₁ have been used as a feedback means, the feedback of the oscillating current in the load circuit Z only one transistor Q _1. The other transistor Q ₂ is on-off controlled by a monostable multivibrator MV1. The monostable multivibrator MV1 is composed of a general-purpose integrated circuit (for example, μPD4538 manufactured by NEC Corporation). After the falling trigger input terminal B changes from “High” level to “Low” level, the output terminal Q remains “High” for a certain period of time. "Level, output terminal is“ L ”
ow "level. In this embodiment, the transistor Q
Detected by dividing the _second voltage across V _Q2 by a series circuit of resistors R _6, R _7, and a trigger signal of the monostable multivibrator MV1. The time when the output terminal Q of the monostable multivibrator MV1 becomes the “High” level (when the output terminal
ow "to become time level). Output terminal Q of when determined by the constant of the resistor R ₉ and the capacitor C ₄ is connected to the base of the transistor Q ₄ for driving through a resistor R _14, the output terminal resistor through R ₁₅ is connected to the base of the transistor Q ₅ for driving. transistor collector of Q ₄ are the DC power source E ₂
The positive electrode of the negative electrode of the transistor Q emitters of ₅ DC power source E _2, are connected, the collector of the emitter and the transistor Q ₅ of the transistor Q ₄ are, connected to the base of the transistor Q ₂ through a resistor R ₂ I have. Therefore monostable multi-vibrator MV1, the on period of the transistor Q ₂ τ
_It operates as a timer circuit for determining ₁ . Can be performed continuously output adjusted by the changing the value of resistor R ₉ for constant setting time of the monostable multivibrator MV1, when the load l is the discharge lamp can continuous dimming.

FIG. 3 is an operation waveform diagram of the present embodiment when the load circuit Z is inductive. The same figure (a) shows the inductor L ₁
Shows a load current I flowing in the figure, I _Q1, I _Q2 collector current flowing through the transistor _{Q 1, Q 2, I D1} , I D2 diode
The current flowing through D ₁ and D ₂ is shown. Further, FIG. (B) is the transistor collector-emitter voltage V _Q1 of Q _1, FIG. (C) the voltage between the collector and emitter of the transistor Q ₂ V
_Q2, FIG. (D) shows the base-emitter voltage V _BE1 of the transistor Q _1, FIG. (E), (f) an output terminal Q of the monostable multivibrator MV1, the output signals, respectively.

Hereinafter, the operation of this embodiment will be described with reference to the operation waveform diagram of FIG. When the power switch SW is turned on,
The starting circuit ST transistor Q ₂ is turned on, because the voltage across V _Q2 (FIG. 3 (c)) becomes "Low" level, the trigger input terminal B of the monostable multivibrator MV1 is "High" level to " Low level. As a result, the monostable multivibrator MV1 is triggered, and its output terminal Q is at "High" level and its output terminal is at "L".
ow the "level (FIG. 3 (e), (f)). Accordingly, transistor Q ₄ for driving is turned on, the transistor Q ₅ is turned off and the transistor through the DC power source E ₂ from the transistor Q _4, the resistor R ₂ to Q ₂ is supplied base current and the on-state transistor Q ₂ is maintained. transistor Q ₂ is turned on, and conducts the diode D _3, since the capacitor C ₂ will not be charged, the starting circuit ST is stopped . in this case, the secondary winding n ₂ of the inductor L ₁ is wound polarity such as to apply a reverse bias voltage between the base and emitter of the transistor Q _1, the transistor Q ₁ is kept off.

Then, the resistance R ₉ and after a predetermined time t determined by the capacitor C _4, the output terminal Q of the monostable multivibrator MV1 is "Low" level, the output terminal becomes "High" level, transistor Q ₄ are off, transistor Q ₅ turns on. For this reason, the transistor Q ₂ is turned off. When the transistor Q ₂ at point A shown in FIG. 3 (b) is turned off, the residual inductance of the inductor L ₁ generates a reverse induced voltage by the collector current I _Q2 of the transistor Q ₂ is decreased, the inductor L ₁ since the oscillating current I flowing tries to flow in the same direction, the diode D ₁ is conducting, current I _D1 flows. Further, by the secondary winding n ₁ of the inductor L ₁ generates a reverse induced voltage, as shown in FIG. 3 (d), the transistor Q ₁ is being forward biased, the transistor Q ₁ is the on-state Become. When the diode D ₁ of the current I _D1 becomes zero, transistor charges accumulated in the capacitor C ₀ as a power supply
Current I _Q1 flows through the Q _1. At this time, the core of the inductor L ₁ is linearly magnetized towards the saturation magnetic flux. Eventually, the core reaches saturation flux, inductance rapidly toward the direction of zero, so that the time variation of the collector current I _Q1 of the transistor Q ₁ is infinite. Transistor Q ₁
Of the collector current I _Q1 reaches hfe times the base current becomes unsaturated state of the transistor Q _1, since the induced voltage of each winding of the inductor L ₁ is decreased, the transistor Q ₁ base current also decreases fed back Turns off. Even after the transistor Q ₁ is turned off, the vibration current I flowing through the inductor L ₁ is going to flow in the same direction, the diode D ₂ conducts, current I _D2 is the load circuit Z, the capacitor C _0, the DC power source E ₁ Flows along the path. When the diode D ₂ is conducting, the transistor Q ₂
Voltage V _Q2 becomes zero, so that the falling trigger input terminal B of the monostable multivibrator MV1 changes from “High” level to “Low” level, and the monostable multivibrator
Output terminal Q of MV1 becomes "High" level, transistor Q ₄ for driving is turned on, the transistor Q ₂ is forward biased. After the oscillating current I _D2 flowing through the diode D ₂ becomes zero, the DC power supply E ₁ supplies the capacitor C ₀ , the load circuit Z,
Collector current I _Q2 flows through a path of the transistor Q _2. Hereinafter, by repeating the above operation, the oscillation operation of the inverter is continued.

In this embodiment, since the on-off control of the transistor Q ₁ and feeds back the oscillating current by the secondary winding n ₂ of the inductor L _1, requires a current transformer CT ₁ as in the conventional example shown in FIG. 11 do not do. Further, when the circuit configuration of FIG. 2 for lighting the lamp load of about FLR40W (lamp current 420 mA), the inductance value of the inductor L ₁ is required extent number [mH],
Considering current capacity and temperature rise, a core (product name EI-35) as shown in FIG. 5 is required. The dimensions of the core, x ₁ = 18.2 [mm], x ₂ = 5.5 mm., X ₃ = 29.7 [m
m], y ₁ = 10.3 [mm], y ₂ = 25.0 [mm], y ₃ = 35.0 [m
m], z ₁ = 14.0 mm and the gap of the inductor L ₁ becomes about 1 mm. Thus, the inductance value of the inductor L ₁ receives hardly affected by variations in the permeability of the core material during manufacture, variations in the primary winding n _1, 2 winding n ₂ of the inductance value decreases. Therefore, the transistor to Q ₁ embodiment is driven stably, unlike the conventional examples of Figure 11, as compared to the case of driving by another current transformer CT _1, the oscillation frequency and the output current of the inverter is much There is no variation. Transistor Q ₂
Since the on-duty of is determined by the monostable multivibrator MV1, there is no large variation. It is also possible to easily adjust the output if the resistance R ₉ a variable resistor.

Figure 4 varies the time constant of the resistor R ₉ and a capacitor C _4, by shortening the pulse width of the output terminal Q of the monostable multivibrator MV1, in the case of reducing the on-duty of the transistor Q ₂ It is an operation waveform diagram. As shown in FIGS. 4 (b) and (c), the transistors Q ₁ and Q ₂
The output control can be performed by making the on-time of the device unbalanced. When the load circuit Z is a discharge lamp lighting circuit, the output light flux can be adjusted by such unbalance control (see Japanese Patent Application No. 60-113716). In the present embodiment, by decreasing the on-duty of the transistor Q _2, the oscillation frequency becomes higher,
The dimming control is performed even deeper.

Embodiment 2 FIG. 6 is a circuit diagram of a second embodiment of the present invention, and FIG. 7 is an operation waveform diagram thereof. In the present embodiment detects the current I _Q1 flowing through the transistor Q ₁ at a current transformer CT _2, using a voltage V _C3 generated in the capacitor C ₃ as a trigger signal of the monostable multivibrator MV1. That is, the transistor Q ₁ is turned off, the current I _Q1 does not flow from the detection voltage V _C3 is "High" level "Low"
The level changes to a trigger signal for the monostable multivibrator MV1. Other configurations and operations are the same as those of the first embodiment.

Third Embodiment FIG. 8 is a circuit diagram of a third embodiment of the present invention, and FIG. 9 is an operation waveform diagram thereof. In the present embodiment detects the current I _D2 of the diode D ₂ by the current transformer CT _2, monostable multivibrator voltage V _C3 generated in the capacitor C ₃ MV1
Is used as a trigger signal. That is, when the current I _D2 of the diode D ₂ does not flow, the detection voltage V _C3 is changed to the "Low" level from "High" level, a trigger signal of the monostable multivibrator MV1. Other configurations and operations are the same as those of the first embodiment.

Embodiment 4 FIG. 10 is a circuit diagram of a fourth embodiment of the present invention. In this embodiment, the transistor Q ₂ is using the MOSFET, the transistor Q ₁ is using bipolar transistors, MO
Since the driving power of the SFET is smaller than that of the bipolar transistor, the power consumption of the driving circuit can be reduced. The starting circuit ST2 is constituted by a monostable multivibrator MV2 (for example, μPD4538 manufactured by NEC Corporation). Trigger signal of the monostable multivibrator MV2 is a resistor R ₁₁ capacitor
Created by a trigger circuit consisting of C _11, the output pulse width is determined by the time constant of the resistor R ₁₂ and capacitor C _12. The output of the starting circuit ST2, along with the output of the voltage detection circuit consisting of resistor R _6, R _7, is applied to the trigger input terminal B of the monostable multivibrator MV1 through the OR circuit G _3.

The operation of the starting circuit ST2 of the present embodiment will be briefly described. When the power switch SW is turned on, the capacitor C ₂
Is charged via the R _5, operation power is supplied to the starting circuit ST2 and monostable multivibrator MV1. By the capacitor C ₁₁ is charged by the resistor R _11, a rising trigger input terminal A of the monostable multivibrator MV2 so changes from "Low" level to the "High" level, the monostable multivibrator MV2 is triggered hand,
The output terminal Q becomes "High" level. Monostable output terminal Q of the multivibrator MV2 is "High" level for a period of time is determined by the time constant of the resistor R ₁₂ and capacitor C _12, for example, the output terminal Q after a lapse of a few hundred .mu.sec "Low"
Become a level. This pulse signal is applied to the falling trigger input terminal B of the monostable multivibrator MV1 through the OR circuit G _3, the falling of the pulse signal monostable multivibrator MV1 is triggered. Thus, the output terminal Q is "High" level of the monostable multivibrator MV1, the other output terminal becomes "Low" level, the transistor Q ₄ is turned on, the transistor Q ₅ is turned off, the gate of the transistor Q ₂ to which consisting MOSFET a positive voltage is applied to the terminal, the transistor Q ₂ is turned on. The subsequent oscillating operation is the same as in the first embodiment.

[Effect of the Invention] In the inverter device of the present invention, the oscillating current of the load circuit is fed back to the control terminal of one switching element,
On / off control of the one switching element is performed in a predetermined cycle determined by the oscillating current, and the other switching element is turned on / off by control means including a timer circuit that operates at least during a period in which the one switching element is not on. The circuit configuration is simpler, smaller and lighter, and lower cost compared to the conventional example in which oscillating current is fed back to both switching elements and one of the switching elements is forcibly turned off. There is an effect that can be. Further, since the other switching element is controlled by the timer circuit, there is an effect that a relatively stable operation can be realized with a simple configuration.

Note that by changing the time constant of the timer circuit and changing the on-duty of the other switching element, there is an effect that output control can be performed.

[Brief description of the drawings]

FIG. 1 is a block circuit diagram showing a basic configuration of the present invention, and FIG.
FIG. 3 is a circuit diagram of a first embodiment of the present invention, FIG. 3 and FIG. 4 are operation waveform diagrams of the same, FIGS. 5 (a) and (b) are front and side views of a core used in the same, FIG. 6 is a circuit diagram of a second embodiment of the present invention, FIG. 7 is an operation waveform diagram of the above embodiment, FIG. 8 is a circuit diagram of a third embodiment of the invention, FIG. 9 is an operation waveform diagram of the above embodiment,
FIG. 10 is a circuit diagram of a fourth embodiment of the present invention, FIG. 11 is a circuit diagram of a conventional example, and FIG. 12 is a block circuit diagram of another conventional example. E ₁ denotes a DC power source, Q _1, Q ₂ transistors, C ₀ capacitor, L ₁ is an inductor, l is the load, Z is a load circuit, 1 detection circuit, 2 is the trigger circuit, 3 is a timer circuit.

 ──────────────────────────────────────────────────続 き Continued from the front page (72) Inventor Daishi Kido 1048 Odakadoma, Kadoma City, Osaka Prefecture Inside Matsushita Electric Works, Ltd. (56) References JP-A-64-57596 (JP, A) JP-A-63-55889 (JP, A)

Claims (2)

(57) [Claims] 1. A load circuit including a DC power supply, a pair of switching elements connected in series to both ends of the DC power supply, and at least one of the switching elements connected in parallel via a capacitor, and including a series circuit of an inductor and a load. When,
Feedback means for feeding back the oscillating current flowing through the load circuit only to the control terminal of one of the switching elements and for controlling ON / OFF of only the one of the switching elements at a predetermined cycle determined by the oscillating current; A control circuit for controlling the other switching element to be turned on / off by a timer circuit that operates during the off period of the inverter device. 2. The inverter device according to claim 1, wherein the timer circuit has a variable time constant.