JP2707909B2 - Bonding method for integrated circuit chips - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for bonding integrated circuit chips, and more particularly to a method for connecting bumps.

[0002]

2. Description of the Related Art A conventional integrated circuit chip bonding method is to form an oxide film 2 'on an integrated circuit chip 1' as shown in FIGS. 4 'is provided. Further, a polyimide film 5 ', a barrier metal 3' and the like are formed to provide the solder bumps 16. A bonding method generally used when connecting the integrated circuit chip 1 'on which the solder bumps 16 are formed and the circuit board 7' on which the pad metal 8 'and the wiring conductor 9' are formed as described above. Is 200-400 ° C
This is a reflow method in which solder is heated and melted in a moderate atmosphere. Reflow is a type that heats by sliding a sheet-shaped belt on a hot plate, a belt furnace of a type that heats infrared rays from the top, an air reflow type that heats by air, a reflow type that uses vapor, etc. It is performed by various reflow furnaces. More recently, reflow by laser light has begun to be studied. (For example, Japanese Patent Application No. 1-69219, bonding method of integrated circuit chip) According to the invention, as shown in FIG. 2B, an integrated circuit chip 1 'with solder bumps is mounted on a circuit board 7' and a laser beam is applied. Irradiate the entire surface of the integrated circuit chip back surface 14 'to heat the entire integrated circuit chip 1' (about 200 ° C. to 400 ° C.)
Then, the solder bumps 15 'are melted and connected to the circuit board 7'.

[0003]

The conventional method of bonding an integrated circuit chip uses an integrated circuit chip on which solder bumps (wet back already formed) have been formed, and therefore, from the supply of solder to a wafer to the completion of wet back. Has a number of steps. Therefore, the construction period is long, and there are problems in yield, quality, and the like. In particular, the steps from flux application to wet back to flux cleaning include problems such as flux residue and environmental protection. In addition, since the connection method using a reflow furnace is employed, it takes a long time to melt the solder, and the productivity is poor. In addition, there is a problem that the temperature control is difficult and the yield is poor. In addition, the equipment is large (for example, width 1-2m ×
(3-5 m in length), and the alignment device for the integrated circuit chip and the circuit board is an individual device. In a bonding method of an integrated circuit chip using a laser beam, which has been studied recently, since the entire integrated circuit chip is rapidly heated, distortion remains, and there are many problems such as fluctuations in electrical characteristics and cracks. .

[0004]

According to the present invention, there is provided a method for bonding an integrated circuit chip, wherein the bump for external connection of the integrated circuit chip is not wet-backed, and the wet-back process of the bump and the connection with the circuit board are performed. Are connected by melting by one laser beam, so that many steps from solder supply to wafer to completion of wet back are not required. Further, since the YAG laser transmits through the silicon of the integrated circuit chip, focuses on the vicinity of the bump, heats and melts only the bump, and connects the bump, stress applied to the integrated circuit chip is reduced, and no distortion remains.
Therefore, problems such as fluctuations in electrical characteristics and cracks are eliminated. Further, the size of the apparatus can be reduced as compared with the reflow furnace, so that the control of the temperature, the atmosphere, and the like becomes easy. In addition, YAG
A laser having a wavelength of about 1.06 μm is suitable.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1A is a cross-sectional view showing one embodiment of the present invention, and shows a state before connection between an integrated circuit chip and a circuit board. FIG. 1B is a cross-sectional view showing one embodiment of the present invention, and shows a state after connection between the integrated circuit chip and the circuit board. An oxide film 2, an aluminum electrode 4, a barrier metal 3, a polyimide film 5 and the like are sequentially formed on the integrated circuit chip 1. After the barrier metal 3 is formed, solder bumps (before wet back) 6 are provided. In the present invention, a solder bump (before wet back) 6 in which the wet back step is omitted is used. The integrated circuit chip 1 provided with the solder bumps (before wet back) 6 is connected to the wiring conductor 9 and the pad metal 8.
Is mounted on the pad metal 8 of the circuit board 7 on which is formed. At this time, the positions of the solder bumps (before wet back) 6 of the integrated circuit chip 1 and the positions of the pad metals 8 of the circuit board 7 need to be accurately adjusted. After the completion of the alignment, as shown in FIG. 1B, the YAG laser beam (for example, wavelength: 1.06 μm) 1
Irradiate 0,11,12.

At this time, the focal points of the laser beams 10, 11, and 12 are set not in the integrated circuit chip 1 'but in the vicinity of the solder bumps (after connection) 15, as shown in FIG. The method of irradiating the laser beams 10, 11, and 12 is shown in FIG.
As shown in (B), the pulse may be performed for each solder bump (after connection) 15 or continuous irradiation may be performed. The depth of focus needs to be changed depending on the thickness of the integrated circuit chip 1 ′,
About 600 μm.

Therefore, according to the present invention, the YAG laser beam (wavelength 1.06) transmitted through the silicon of the integrated circuit chip 1 'is used.
.mu.m) to melt the solder bumps (before wet back) 6 and connect them to the circuit board 7 '. The power value of the YAG laser depends on the device and the product, but it is 10W ~
About 50W is appropriate.

To explain another embodiment of the present invention, when a material that transmits laser light, such as silicon or glass, is used for the circuit board 7, the laser lights 1, 2 and 2 shown in FIG. Steps 3 and 3 can also be performed by irradiating from the back surface of the circuit board 7. According to this method, bonding can be performed after a heat spreader made of Al or Cu is attached to the back surface of the integrated circuit chip 1 in advance.

[0009]

As described above, the present invention uses an integrated circuit chip with solder bumps that has not been wet-backed,
Because the circuit board and the laser beam are connected together,
The wet back process can be omitted. Further, since the solder bumps are directly melted and connected by the YAG laser beam transmitted through the silicon of the integrated circuit chip, stress on the integrated circuit chip can be reduced. Compared to the method using a reflow furnace, the method using a laser beam can reduce the size of the apparatus, and thus can be integrated with an apparatus for aligning an integrated circuit chip and a circuit board. Therefore, positioning to connection can be performed by one device. This is more advantageous for displacement as the pitch between bumps is smaller. In addition, since one device is used, alignment, management of connection conditions, and the like become easy. By implementing the present invention, as a total effect, the defective rate is reduced to one third and the number of processing steps is reduced by 20% as compared with the conventional case.

[Brief description of the drawings]

FIG. 1A is a cross-sectional view showing one embodiment of the present invention before connection. (B) is a cross-sectional view showing one embodiment of the present invention, after connection.

FIG. 2A is a cross-sectional view showing a conventional technique, before connection. (B) is a cross-sectional view showing the prior art, showing the state after connection.

[Explanation of symbols]

 1, 1 'integrated circuit chip 2, 2' oxide film 3, 3 'barrier metal 4, 4' aluminum electrode 5, 5 'polyimide film 6 solder bump (before wet back) 7, 7' circuit board 8, 8 'pad Metal 9, 9 'Wiring conductor 10 Laser light-1 11 Laser light-2 12 Laser light-3 13 Laser light focus 14 Backside of integrated circuit chip 15, 15' Solder bump (after connection) 16 Solder bump

Claims (3)

(57) [Claims] 1. A bonding method for connecting an integrated circuit chip having a plurality of external connection bumps formed on one surface to a circuit board having connection terminals provided at positions corresponding to the external connection bumps. And using an external connection bump which has not been wet-backed. 2. The integrated circuit chip bonding method according to claim 1, wherein the connection is performed by a laser beam transmitted through the integrated circuit chip. 3. The bonding method for an integrated circuit chip according to claim 1, wherein the connection is performed by using a YAG laser beam.