JP2704122B2 - Halftone image processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a halftone image processing apparatus, and more particularly to a halftone image processing apparatus for expressing a halftone image by an error diffusion method.

[0002]

2. Description of the Related Art An error diffusion method has been developed as a method for expressing a halftone image. This works by converting a multi-valued input image to 2
In this method, the error amount of the density generated at the time of binarization is diffused to surrounding pixels of the input pixel, and the density of the input image is stored on average. For the error diffusion method, see Robert
W. A from Floyd, Louis Steinberg
nAdaptive Algorithm for S
patent Grayscale (Proceedi
ng of the S.P. I. D. Vol. 17/2
Second Quarter 1976 pp75
-77).

Further, a more efficient error diffusion process has been developed in which the memory capacity for storing errors is reduced as compared with the error diffusion method. An example of this method is disclosed in Japanese Patent Application No. 5-3.
49572. A conventional halftone image processing apparatus based on the error diffusion method described here will be described with reference to the drawings.

FIG. 11 is a block diagram showing a conventional halftone image processing apparatus.

Referring to FIG. 11, this conventional halftone image processing apparatus uses an error amount 1 of a plurality of peripheral pixels which have already been binarized.
11, a correction value 109 is calculated, the input multi-level image signal 101 is added to the obtained correction value, and the input value 102 after addition is
The point of outputting the value is the same as in the conventional error diffusion method.
In this method, instead of storing the binarization error in the memory,
Either the signal 104 for specifying the representative value of the error amount on the black side or the signal 105 for specifying the representative value of the error amount on the white side according to the input value 102 after the binarization error is corrected, the error amount selection signal 1
06 is stored in the error amount designation memory 14. Correction value 1
When calculating 09, a representative value of the error amount selected by the error amount selection signal 106 is used. Since one bit is sufficient for the error amount selection signal, the memory capacity can be reduced as compared with the conventional error diffusion method.

The correction value calculation circuit 10 is an output circuit for calculating a correction value 109 from the error amount 111. This calculation procedure is calculated based on a predetermined procedure from the error amounts 111 of peripheral pixels having a predetermined positional relationship with the pixel position where the error amount 111 is calculated.

The adder 11 receives the input multivalued image signal 10
1 and a circuit that adds the position of the multi-level signal 101 and a correction value 109 at a position having a predetermined positional relationship, and outputs the corrected input value 102.

The comparator 12 calculates the corrected input value 102 as 2
This is a circuit that converts the binary image signal 110 into a binary signal in comparison with the binarization threshold value 103 and outputs the converted binary image signal 110. The conversion into the binary image signal 110 is performed according to the following procedure. If the value of the input value 102 after the correction is equal to or larger than the binarization threshold value 103, it is determined as a black signal and a logical value "1" is output. Also, 2
If the threshold value is less than the threshold value 103, the signal is determined to be a white signal and a logical value “0” is output.

The error amount selection signal selector 13 is a circuit for selecting a representative value of a black side or white side error amount based on the corrected input value 102. This selection is based on the binarization threshold, and if it is equal to or more than the threshold value, it is determined to be the black side, and if it is less than the threshold value, the white side is determined. As the codes for setting the black side and the white side, a signal 104 specifying the representative value of the error amount on the black side and a signal 105 specifying the representative value of the error amount on the white side are input. Using the input value 102 after the correction as a selection signal, either the signal 104 for specifying the error amount on the black side or the representative value 105 of the error amount on the white side is selected and output as an error amount selection signal 106.

The error amount designation memory 14 is a circuit for storing the error amount selection signal 106 output from the error amount selection signal selector 13. This memory is configured by a 1-bit / pixel memory that stores the error amount selection signal 106 which is an alternative signal between the black side and the white side.

An error amount selector 15 receives an error amount selection signal 106 read from the error amount designation memory 14 and
This circuit selects one of the representative value 107 of the error amount on the black side and the representative value 108 of the error amount on the white side and outputs the error amount 111.

In the conventional halftone image processing apparatus having the above configuration, the multi-level image signal 101 input to the adder 11
Is added to the correction value 109 output from the correction value calculation circuit 10 to obtain the corrected input value 102. The corrected input value 102 is converted by the comparator 12 into a binary signal “1” or “0” which is compared with a fixed binary threshold 103, and is output as a binary image signal 110.

The corrected input value 102 is input to the comparator 12 and also to the error amount selector 13. The corrected input value 102 input to the error amount selection signal selector 13 is classified into either a black side signal or a white side signal, and a signal designating either of them is output as an error amount selection signal 106. You. Error selection signal 1
06 is stored in the error amount designation memory 14.

From the error amount designation memory 14, error amount selection signals 106 for a plurality of peripheral pixels are simultaneously read. The read error amount selection signal 106 is used as a selection signal for selecting the black side or white side representative value 107 or 108 in the error amount selector 15. For each error amount selection signal 106 of a plurality of peripheral pixels, a representative value 107 of a black side error amount or a representative value 108 of a white side error amount
Is selected, and an error amount 111 for each of the plurality of peripheral pixels is output.

The correction value calculation circuit 10 multiplies the coefficients corresponding to the respective positions of the peripheral pixels to obtain a total sum and obtains a correction value 1
09 is output.

[0016]

In this conventional halftone image processing apparatus, the error amount designation memory stores not the error amount itself but a selection signal of the error amount, so that the error amount is smaller than that of the conventional error diffusion method. Although the memory for saving can be reduced, when a correction value of an input multi-valued image is obtained, a representative value of a predetermined fixed error is used. Can only be realized approximately. Therefore, compared to the conventional error diffusion method, there is a problem that the image quality is deteriorated because the density of the input image is not completely preserved. In particular, there has been a problem that pseudo contours, textures, and the like are conspicuous in portions of the input multi-valued image where there is little change in shading.

It is an object of the present invention to provide a halftone image processing apparatus capable of suppressing generation of a false contour or a texture in a portion of an input multi-valued image where a change in shading is small.

[0018]

According to the present invention, there is provided a halftone image processing apparatus for converting a target pixel of an input multi-valued image signal into a predetermined error amount caused by a binarization conversion of pixels around the target pixel. added on the basis of the instructions, stores and converts the identification signal for identifying belongs the input multivalue image signal obtained by adding to any of the black side or white side, front on the basis of the stored the identification signal
If the identification signal belongs to the black side,
The representative value of the error amount on the black side prepared is converted into a binary value.
The identification signal belongs to the white side.
In the case of a signal, the error amount on the white side
In a halftone image processing apparatus in which a representative value is an error amount generated by a binarization conversion , a binarization threshold value generating means for generating a binarization threshold value which changes for each pixel in accordance with the position of the pixel of interest , Based on a predetermined criterion for each pixel
Therefore, an error amount generating means for generating a plurality of error amounts, a weight coefficient generating means for generating a weight coefficient that changes for each of the pixels, and the error of the pixel of interest and its surrounding pixels.
Amount and each position of the pixel of interest and its surrounding pixels
The weight count generated by the weight count generation means corresponding to
And at least one set of correction value calculating means for correcting the input multi-level image signal by multiplication .

The halftone image processing apparatus of the present invention adds an error amount generated by binarization conversion of pixels around the target pixel to a target pixel of the input multi-valued image signal based on a predetermined procedure. , and stores the converted identification signal for identifying belongs input multivalue image signal obtained by adding to any of the black side or white side, the identification signal is black, based on the stored the identification signal
If the identification signal belongs to the side, it is prepared in advance
Error amount generated by binarization conversion of the representative value of the black side error amount
If the identification signal is an identification signal belonging to the white side,
Binarize the representative value of the error amount on the white side prepared in advance
In a halftone image processing apparatus which uses the amount of error generated by the conversion , there is provided a binarization threshold value generating means for generating a binarization threshold value which changes for each pixel in accordance with the position of the pixel of interest.

The halftone image processing apparatus according to the present invention adds, to a target pixel of an input multi-valued image signal, an error amount generated by binarization conversion of pixels around the target pixel based on a predetermined procedure. , and stores the converted identification signal for identifying belongs input multivalue image signal obtained by adding to any of the black side or white side, the identification signal based on the stored the identification signal is a black-side
Black if the identification signal belongs to
The representative value of the amount of error on the
However, if the identification signal is an identification signal belonging to the white side,
Binary transformation of the representative value of the error amount on the white side prepared in advance
In the halftone image processing apparatus, the error amount caused by the conversion is determined in advance for each pixel corresponding to the position of the target pixel.
Error amount generating means for generating a plurality of error amounts in accordance with a given standard .

The halftone image processing apparatus according to the present invention adds, to a target pixel of an input multi-valued image signal, an error amount generated by binarization conversion of pixels around the target pixel based on a predetermined procedure. , and stores the converted identification signal for identifying belongs input multivalue image signal obtained by adding to any of the black side or white side, the identification signal based on the stored the identification signal is a black-side
Black if the identification signal belongs to
The representative value of the amount of error on the
However, if the identification signal is an identification signal belonging to the white side,
Binary transformation of the representative value of the error amount on the white side prepared in advance
In the halftone image processing apparatus, the weighting factor generating means generates a weighting factor that changes for each pixel, and the error of the target pixel and its surrounding pixels
The difference amount and the respective positions of the pixel of interest and its surrounding pixels
Weight count generated by the weight count generating means corresponding to the position
And a correction value calculating means for calculating a correction value for correcting the input multi-valued image signal by multiplying the input multi-valued image signal.

[0022]

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of the present invention, FIG. 2 is a block diagram showing a binarized threshold generator in the first embodiment, and FIG. 3 is a first embodiment. 2A shows a block diagram of a binarized threshold signal corresponding to the blocking of an input image signal in FIG.
Shows the correspondence between the input terminal of the binary threshold value generator shown in, (B) is a diagram showing a threshold level of each block in decimal.

In FIG. 1, the configuration of the first embodiment is as follows.
The same components as those of the conventional example shown in FIG. 11 are denoted by the same reference numerals. The difference is that the binarization threshold generator 16 for generating the binarization threshold 103 corresponding to the target pixel coordinate 112.
have.

In FIG. 2, 2 in the first embodiment is shown.
The binarization threshold generator 16 has 16 terminals 200 to 21.
In FIG. 5, 16 preset threshold values blocked in a matrix shown in FIG. 3B are input by associating with each terminal shown in FIG. 3A, and among the input image signals, The pixel of interest pixel coordinate signal 112 for determining the coordinate position of the pixel of interest on the matrix is input to the terminals 216 to 219. AND circuits 21A to 21A for selecting one binarization threshold value 103
T, and OR circuits 22A to 22E, and a target binarization threshold 10 from an output terminal 220 of the OR circuit 22E.
3 is output.

Next, only the part of the operation of the first embodiment that differs from the conventional example will be described with reference to FIGS. 1, 2 and 3. FIG.

The binarized threshold generator 16 has a terminal 216
219, one of the terminals 200 to 215 is selected, and the selection result is output to the terminal 220. For example, when the values of the terminals 216 to 219 are
“0”, “1”, “1”, “0”. Terminal 216,
Since 217 is “0” and “1”, the logical product circuit 21B becomes true and the logical products 21A, 21C, and 21D become false, and the value of the terminal 201 is supplied to the logical product circuit 21Q via the logical sum circuit 22A. Similarly, the values of the terminals 205, 209, and 213 are supplied to the AND circuits 21R, 21S, and 21T, respectively.
Furthermore, since the values of the terminals 218 and 219 are "1" and "0", the logical product circuit 21S is true and the logical products 21Q, 21R and 21T are false.
The value of 9 is output to the terminal 220 via the OR circuit 22E.

FIG. 4 is a block diagram showing a second embodiment of the present invention, FIG. 5 is a block diagram showing an error amount generator in the second embodiment, and FIG. 6 is an input image in the second embodiment. Indicate the blocking of the error amount corresponding to the blocking of the signal,
6A is a diagram showing the correspondence between the signal of each block and the input terminal of the error generator shown in FIG. 5, and FIG. 6B is a diagram showing the level of the error amount of each block in decimal.

Referring to FIG. 4, the configuration of the second embodiment is as follows.
The same components as those of the conventional example shown in FIG. 11 are assigned the same numbers, and differ from the conventional example in that an error amount generator 17 for generating error amounts 107 and 108 corresponding to the target pixel coordinates 112 is provided.

In FIG. 5, the error amount generator 17 in the second embodiment has 16 terminals 500 to 515, each of which is divided into a matrix of 16 shown in FIG.
Preset error amounts number is input by the correspondence between the terminals shown in FIG. 6 (A), the target pixel coordinate signal 112 for determining the coordinate position on the matrix of the pixel of interest of the input image signal It is configured to be input to terminals 516 to 519 to select a representative value 107 of the black-side error amount and a representative value 108 of the white-side error amount based on the 16 error amounts or the 4-bit target pixel coordinate signal 112. AND circuit 51A
52E and the OR circuits 52A to 52E. The representative value 107 of the black-side error amount and the representative value 108 of the white-side error amount are output from the output terminal 520 of the OR circuit 52E and the output terminal 521 of the complement conversion circuit 54, respectively. Is output.

Next, only the part of the operation of the second embodiment that is different from the conventional example will be described with reference to FIGS. 4, 5 and 6. FIG.

The error amount generator 17 has terminals 516 to 519.
One of the terminals 500 to 515 is selected according to the logic of the input signal to the terminal 520, and the selection result is output to the terminals 520 and 521. For example, assume that the values of the terminals 516 to 519 are “0”, “1”, “1”, and “0”. Terminal 516,
Since 517 is “0” and “1”, the logical product circuit 51B is true and the logical product circuits 51A, 51C, and 51D are false, and the value of the terminal 501 is supplied to the logical product circuit 51Q via the logical sum circuit 52A. Similarly, the values of the terminals 505, 509, and 513 are supplied to the AND circuits 51R, 51S, and 51T, respectively.
Further, since the values of the terminals 518 and 519 are "1" and "0", the logical product circuit 51S is true and the logical products 51Q, 51R, and 51T are false.
The value of 9 is output to the terminal 520 via the OR circuit 52E. Further, a value in which the sign of the value of the terminal 509 is negative is output to the terminal 521 by the complement conversion circuit 54.

FIG. 7 is a block diagram showing a third embodiment of the present invention, FIG. 8 is a block diagram showing a weighting factor generator in the third embodiment, and FIG. 9 is a weighting factor in the third embodiment. FIG. 10 is a diagram showing an example of a weight coefficient set generated by a generator, and FIG. 10 is a block diagram showing a correction value calculating circuit according to the third embodiment.

Referring to FIG. 7, the configuration of the third embodiment is as follows.
The same components as those of the conventional example shown in FIG. 11 are given the same numbers, and different points are a weighting factor generator 18 for determining a weighting factor to be used in the correction value calculating circuit 20 and a plurality of binarized binary values. And a correction value calculation circuit 20 for calculating a correction value 109 from the error amount 111 of the peripheral pixels and the weight coefficient.

In FIG. 8, the weight coefficient generator 18 of the third embodiment has eight terminals 800 to 807 assigned with coefficient set numbers shown in FIG.
8 to 810, a 3-bit random number generated by an internal random number generator 84 using a synchronization signal of an input image signal as a clock is input, and a weight coefficient of one coefficient set from eight coefficient sets. AND circuit 8 for outputting 113
1A to 81J and OR circuits 82A to 82C,
The weight coefficient 113 is output from the terminal 811 of the OR circuit 82C. That is, the weight coefficients of S1 to S12 of one of the coefficient sets 1 to 8 shown in FIG. 9 are output in parallel.

In FIG. 10, the correction value calculating circuit 20 according to the third embodiment includes an error selector 15 shown in FIG.
12 sets of error amounts 1 in which one set is composed of a plurality of bits
11 are input to terminals 1202 to 1213, respectively.
Multipliers 91A to 91L, which are respectively input to terminals 901 to 912 and multiplied by weighting coefficients 113 of S1 to S12 selected from weighting coefficient generator 18, and multipliers 91A to 91L
The outputs of 91L are added and the correction value 109 is output from a terminal 913.
Are output from the adder 92A to 92K.

Next, of the operation of the third embodiment, only the parts different from the conventional example will be described with reference to FIGS. 7, 8, 9 and 10.

The weight coefficient generator 18 has terminals 808 to 81
According to the logic of the input signal from the random number generator 84 input to 0, one of the eight coefficient sets shown in FIG. 9 input to the terminals 800 to 807 is selected and output to the terminal 812 as the weight coefficient 113. . For example, terminals 808 to 810
Are “0”, “1”, and “0”. Terminal 808,
Since 809 is “0” and “1”, the AND circuit 81B is true, and 81A, 81C, and 81D are false, and the input value of the terminal 801 is supplied to the AND circuit 81I via the OR circuit 82A. Similarly, the input value of the terminal 805 is supplied to the AND circuit 81J. Further, since the value of the terminal 810 is “0”, the logical product circuit 81I is true and the logical value of the terminal 81J is false, so that the input value of the terminal 805 supplied to the logical product circuit 81I is weighted to the terminal 812 via the logical sum circuit 82C. It is output as a coefficient 113. That is, S1 to S1 of the coefficient set 6 shown in FIG.
The weight coefficient 113 in S12 is output as a parallel signal.

The error amount 111 in the peripheral pixel output from the error amount selection selector 15 is input from the terminal 1202 of the correction value calculation circuit 20 via the terminal 1213. Weight coefficient 113 output from weight coefficient generator 18
Is input from a terminal 901 via a terminal 912, and corresponding coefficients S1 to S12 are obtained. Two values corresponding to the error amount 111 and the weight coefficient 113 are respectively multiplied by multipliers 91A to 91L, summed up by adders 92A to 92K, and output as a correction value 109 to a terminal 913.

FIG. 9 shows an example of a weight coefficient set. In this example, the values of the weight coefficients use the same value in all the sets, and only the corresponding positions are different. You may change the value.

[0041]

As described above, according to the present invention, the error amount generated by the binarization conversion of the pixels around the target pixel is added to the target pixel of the input multi-valued image signal based on a predetermined procedure. Convert the added input multi-valued image signal into an identification signal for identifying whether it belongs to the black side or the white side, and store it.
In a halftone image processing apparatus for calculating an error amount generated by a binarization conversion based on a stored identification signal, a binarization threshold value that generates a binarization threshold value that changes for each pixel in accordance with a target pixel position Generating means, an error amount generating means for generating an error amount that changes for each pixel, a weight coefficient generating means for generating a weight coefficient that changes for each pixel, and an error amount and a weight coefficient generated by the weight coefficient generating means. Means for calculating a correction value for correcting an input multi-valued image signal by using at least one set of these means. Since it is changed for each pixel, the correction value obtained from the error amount of peripheral pixels by changing the representative value of the error for each pixel by the error amount generating means changes for each pixel. Since the correction value obtained from the error amount of the peripheral pixels by changing the weighting factor raised to the representative value of the error for each pixel by the weighting factor generating means changes for each pixel, the input multi-valued image signal has little change in shading. Even if it is a part, the output binary image is unlikely to have a single farming degree, and thus has the effect of preventing image quality deterioration such as a false contour or texture.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a block diagram showing a binary threshold generator according to the first embodiment;

FIG. 3 shows blocking of a binarized threshold signal corresponding to blocking of an input image signal in the first embodiment;
(A) is a diagram showing the correspondence between the signal of each block and the input terminal of the binary threshold generator shown in FIG. 2, and (B) is a diagram showing the level of the threshold value of each block in decimal. is there.

FIG. 4 is a diagram showing a second embodiment of the present invention.

FIG. 5 is a block diagram showing an error amount generator according to the second embodiment.

6A and 6B show the blocking of an error amount corresponding to the blocking of an input image signal in the second embodiment. FIG. 6A shows the correspondence between the signal of each block and the input terminal of the error generator shown in FIG. (B) shows the level of the error amount of each block as 1
It is the figure shown in 0 decimal.

FIG. 7 is a block diagram showing a third embodiment of the present invention.

FIG. 8 is a block diagram showing a weight coefficient generator according to the third embodiment.

FIG. 9 is a diagram illustrating an example of a weight coefficient set generated by a weight coefficient generator according to the third embodiment.

FIG. 10 is a block diagram illustrating a correction value calculation circuit according to the third embodiment.

FIG. 11 is a block diagram showing a conventional example.

[Explanation of symbols]

10, 20 Correction value calculation circuit 11 Adder 12 Comparator 13 Error amount selection signal selector 14 Error amount designation memory 15 Error amount selector 16 Binarization threshold generator 17 Error amount generator 18 Weight coefficient generator 54 Complement number conversion circuit 84 Random number generator 101 Multi-valued image signal 102 Input value after correction 103 Binarization threshold value 104 Signal specifying a representative value of black side error amount 105 Signal specifying a representative value of white side error amount 106 Error amount Selection signal 107 Representative value of black-side error amount 108 Representative value of white-side error amount 109 Correction value 110 Binary image signal 111 Error amount 112 Target pixel coordinates 113 Weighting coefficients 21A to 21T, 51A to 51T, 81A to 81J
AND circuit 22A to 22E, 52A to 52E, 82A to 82C
OR circuit 23A to 23D, 53A to 53D, 83A to 83C
Logical NOT circuit 91A-91L Multiplier 92A-92K Adder 200-220,500-521,800-811,9
00-913,1202-1213 terminal

 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-4-343179 (JP, A) JP-A-5-336373 (JP, A) JP-A-7-200812 (JP, A)

Claims (4)

(57) [Claims] An input multi-valued image signal is obtained by adding, to a target pixel of an input multi-valued image signal, an error amount generated by binarization conversion of pixels around the target pixel based on a predetermined procedure. was stored by converting the identification signal for identifying whether belongs to the black side or white side, if the identification signal based on the stored the identification signal of the identification signal belongs to the black side roughened
Binary conversion of the representative value of the error amount on the black side prepared in advance
And the identification signal belongs to the white side.
For the identification signal, the error on the white side prepared in advance
In a halftone image processing apparatus in which a representative value of an amount is an error amount generated by a binarization conversion , a binarization threshold value generation that generates a binarization threshold value that changes for each pixel in accordance with the position of the target pixel Means and a predetermined base for each pixel.
Error amount generating means for generating a plurality of error amounts according to a standard, weight coefficient generating means for generating a weight coefficient that changes for each pixel,
The amount of error and each of the noted pixel and its surrounding pixels
Weight generated by the weight count generating means corresponding to the position of
A halftone image processing apparatus comprising at least one set of a correction value calculating means for correcting the input multi-level image signal by multiplying a count . 2. An input multi-valued image signal obtained by adding an error amount generated by binarization conversion of pixels around the target pixel to a target pixel of an input multi-valued image signal according to a predetermined procedure. was stored by converting the identification signal for identifying whether belongs to the black side or white side, if the identification signal based on the stored the identification signal of the identification signal belongs to the black side rough
Binary conversion of the representative value of the error amount on the black side prepared in advance
The identification signal belongs to the white side.
If the identification signal is
In a halftone image processing device, a representative value of the difference amount is an error amount generated by the binarization conversion , a binarization threshold value that changes for each pixel in accordance with the position of the pixel of interest is generated. A halftone image processing device comprising a binarization threshold value generating means. 3. An input multi-valued image signal obtained by adding, to a target pixel of an input multi-valued image signal, an error amount generated by binarization conversion of pixels around the target pixel based on a predetermined procedure. was stored by converting the identification signal for identifying whether belongs to the black side or white side, if the identification signal based on the stored the identification signal of the identification signal belongs to the black side roughened
Binary conversion of the representative value of the error amount on the black side prepared in advance
And the identification signal belongs to the white side.
For the identification signal, the error on the white side prepared in advance
In a halftone image processing apparatus in which a representative value of an amount is an error amount generated by binarization conversion, an error amount that generates a plurality of error amounts according to a predetermined reference for each pixel corresponding to the position of the target pixel A halftone image processing device comprising a generating means. 4. An input multi-valued image signal which is added to a pixel of interest of an input multi-valued image signal according to a predetermined procedure by adding an error amount generated by binarization conversion of pixels around the pixel of interest. was stored by converting the identification signal for identifying whether belongs to the black side or white side, if the identification signal based on the stored the identification signal of the identification signal belongs to the black side roughened
Binary conversion of the representative value of the error amount on the black side prepared in advance
And the identification signal belongs to the white side.
For the identification signal, the error on the white side prepared in advance
In a halftone image processing apparatus in which the representative value of the amount is an error amount generated by the binarization conversion, a weight coefficient generating means for generating a weight coefficient that changes for each pixel;
The error amount of the pixel around the pixel of interest and the pixel of interest and its periphery.
The weight count generating means corresponding to each position of the side pixel
A correction value calculating means for calculating a correction value for correcting the input multi-valued image signal by multiplying by a weight count generated in a stage .