JPH0898018A - Halftone image processor - Google Patents

Abstract

PURPOSE: To improve the image quality by preventing a pseudo contour or texture easily caused to a part where a change in the contrast of an image is less. CONSTITUTION: An error signal caused by binarization conversion of surrounding pixels with respect to a noted pixel is corrected into a correction value 109 by a correction value calculation circuit 10 and added to the noted pixel by an adder 11 to be an input value 102 after the correction. A binarized threshold level generator 16 obtains a binarized threshold level 103 changing for each pixel based on a noted pixel coordinate 112. The input value 102 after the correction and the binarized threshold level 103 changing for each pixel are compared by a comparator 12 to output a binary image signal 110.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a halftone image processing device, and more particularly to a halftone image processing device for expressing a halftone image by an error diffusion method.

[0002]

2. Description of the Related Art An error diffusion method has been developed as a method of expressing a halftone image. This is a multi-valued input image
This is a method in which the amount of density error that occurs when digitizing is diffused to the peripheral pixels of the input pixel, and the density of the input image is stored on average. For the error diffusion method, see Robert.
W. Floyd, Louis Steinberg's A
nAdaptive Algorithm for S
partial Grayscale (Proceedi
ng of the S. I. D. Vol. 17/2
Second Quarter 1976 pp75
-77).

Further, as compared with this error diffusion method, a memory capacity for storing an error is reduced and more efficient error diffusion processing has been developed. An example of this method is Japanese Patent Application No. 5-3.
49572. A conventional halftone image processing apparatus using the error diffusion method described here will be described with reference to the drawings.

FIG. 11 is a block diagram showing a conventional halftone image processing apparatus.

In FIG. 11, the conventional halftone image processing apparatus has an error amount 1 of a plurality of peripheral pixels already binarized.
The correction value 109 is calculated from 11, the input multi-valued image signal 101 is added to the obtained correction value, and the input value 102 after addition is set to 2
The point of outputting the value is the same as that of the conventional error diffusion method.
In this method, instead of storing the binarization error in the memory,
According to the input value 102 after correcting the binarization error, the error amount selection signal 1 is selected from the signal 104 that specifies the representative value of the error amount on the black side and the signal 105 that specifies the representative value of the error amount on the white side.
It is stored in the error amount designation memory 14 as 06. Correction value 1
When 09 is calculated, the representative value of the error amount selected by the error amount selection signal 106 is used. Since one bit is sufficient for the error amount selection signal, the memory capacity can be reduced as compared with the conventional error diffusion method.

The correction value calculation circuit 10 is an output circuit for calculating the correction value 109 from the error amount 111. This calculation procedure is performed based on a predetermined procedure from the error amount 111 of the peripheral pixels having a predetermined positional relationship with the calculated pixel position of the error amount 111.

The adder 11 receives the input multi-valued image signal 10
This is a circuit that adds 1 and a correction value 109 of a position having a predetermined positional relationship with the position of the multi-valued signal 101, and outputs a corrected input value 102.

The comparator 12 outputs the corrected input value 102 to 2
This is a circuit that compares the binarized threshold value 103 and converts it into a binary signal, and outputs the converted binary image signal 110. The conversion to the binary image signal 110 is based on the following procedure. If the corrected input value 102 is greater than or equal to the binarization threshold value 103, it is determined to be a black signal and a logical value "1" is output. Also, 2
If it is less than the threshold value 103, it is determined to be a white signal and a logical value “0” is output.

The error amount selection signal selector 13 is a circuit for selecting a representative value of the error amount on the black side or the white side based on the corrected input value 102. This selection is based on the binarization threshold, and if it is more than or equal to it, it is on the black side, and if it is less than it is on the white side. Further, as the signs of the black side and white side settings, a signal 104 designating a representative value of the black side error amount and a signal 105 designating a representative value of the white side error amount are input. Using the corrected input value 102 as a selection signal, either the signal 104 designating the error amount on the black side or the representative value 105 of the error amount on the white side is selected and output as an error amount selection signal 106.

The error amount designation memory 14 is a circuit for storing the error amount selection signal 106 output from the error amount selection signal selector 13. This memory is composed of a 1-bit / pixel memory that stores the error amount selection signal 106, which is an alternative signal of black side / white side.

The error amount selector 15 is based on the error amount selection signal 106 read from the error amount designation memory 14,
This is a circuit that selects either the representative value 107 of the error amount on the black side or the representative value 108 of the error amount on the white side and outputs the error amount 111.

In the conventional halftone image processing apparatus having the above structure, the multivalued image signal 101 input to the adder 11 is inputted.
Is added to the correction value 109 output from the correction value calculation circuit 10 to obtain the corrected input value 102. The corrected input value 102 is converted into a binary signal “1” or “0” that is compared with the fixed binary threshold value 103 in the comparator 12, and is output as a binary image signal 110.

The corrected input value 102 is input to the comparator 12 and also to the error amount selection selector 13. The corrected input value 102 input to the error amount selection signal selector 13 is classified into either a black side signal or a white side signal, and a signal designating one of these is output as an error amount selection signal 106. It Error amount selection signal 1
06 is stored in the error amount designation memory 14.

From the error amount designation memory 14, the error amount selection signals 106 for a plurality of peripheral pixels are read out at the same time. The read error amount selection signal 106 is used as a selection signal for selecting the black-side or white-side representative value 107 or 108 in the error amount selector 15. For the error amount selection signal 106 of each of the plurality of peripheral pixels, the representative value 107 of the black side error amount or the representative value 108 of the white side error amount.
Is selected, and the error amount 111 for each of the plurality of peripheral pixels is output.

The correction value calculation circuit 10 multiplies the coefficients corresponding to the respective positions of the peripheral pixels and sums them to obtain the correction value 1
It outputs as 09.

[0016]

In this conventional halftone image processing apparatus, since the error amount selection memory stores the error amount selection signal instead of the error amount itself, the error amount is reduced as compared with the conventional error diffusion method. Although the memory for saving can be reduced, since the representative value of the fixed error that is determined in advance is used when obtaining the correction value of the input multi-valued image, the density saving of the input image, which is a feature of the error diffusion method, It can only be realized approximately. Therefore, compared to the conventional error diffusion method, the density preservation of the input image is not perfect, so that the image quality is deteriorated. In particular, there is a problem that pseudo contours and textures are conspicuous in a portion of the input multi-valued image in which the change in shading is small.

It is an object of the present invention to provide a halftone image processing device capable of suppressing the generation of pseudo contours and textures in a portion of an input multi-valued image in which the change in shading is small.

[0018]

According to the halftone image processing apparatus of the present invention, an error amount generated by binarization conversion of pixels around the pixel of interest is determined with respect to the pixel of interest of the input multi-valued image signal. Based on the procedure, the input multi-valued image signal is added and converted into an identification signal for identifying whether it belongs to the black side or the white side, which is stored, and by the binarization conversion based on the stored identification signal. In a halftone image processing device for calculating the amount of error that occurs, a binarization threshold value generation unit that generates a binarization threshold value that changes for each pixel corresponding to the position of the pixel of interest, and a change for each pixel. Error amount generating means for generating the error amount, weighting coefficient generating means for generating a weighting coefficient that changes for each pixel, and the error amount and the weighting coefficient generated by the weighting coefficient generating means. Value Correct image signal It has at least one set of these means of the correction value calculating means for.

The halftone image processing apparatus of the present invention adds the error amount generated by the binarization conversion of the pixels around the target pixel to the target pixel of the input multi-valued image signal based on a predetermined procedure. , The added input multi-valued image signal is converted into an identification signal for identifying whether it belongs to the black side or the white side and stored, and the error amount caused by the binarization conversion is calculated based on the stored identification signal. The halftone image processing device has a binarization threshold value generation unit that generates a binarization threshold value that changes for each pixel in correspondence with the position of the pixel of interest.

The halftone image processing apparatus of the present invention adds the error amount generated by the binarization conversion of the pixels around the target pixel to the target pixel of the input multi-valued image signal according to a predetermined procedure. , The added input multi-valued image signal is converted into an identification signal for identifying whether it belongs to the black side or the white side and stored, and the error amount caused by the binarization conversion is calculated based on the stored identification signal. The halftone image processing device has an error amount generating means for generating the error amount that changes for each pixel corresponding to the position of the pixel of interest.

The halftone image processing apparatus of the present invention adds the error amount generated by the binarization conversion of the pixels around the target pixel to the target pixel of the input multi-valued image signal according to a predetermined procedure. , The added input multi-valued image signal is converted into an identification signal for identifying whether it belongs to the black side or the white side and stored, and the error amount caused by the binarization conversion is calculated based on the stored identification signal. In the halftone image processing device, a weighting factor generating means for generating a weighting factor that changes for each pixel,
And a correction value calculation means for calculating a correction value for correcting the input multi-valued image signal using the error amount and the weighting coefficient generated by the weighting coefficient generation means.

[0022]

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of the present invention, FIG. 2 is a block diagram showing a binarization threshold generator in the first embodiment, and FIG. 3 is a first embodiment. 2 shows the binarization of the binarized threshold signal corresponding to the block of the input image signal in FIG.
Shows the correspondence with the input terminal of the 2 near threshold generator shown in
(B) is a diagram showing the threshold level of each block in decimal.

In FIG. 1, the configuration of the first embodiment is as follows.
The same components as those in the conventional example shown in FIG. 11 are assigned the same numbers, and the difference is that the binarization threshold generator 16 that generates the binarization threshold 103 corresponding to the pixel coordinate 112 of interest.
have.

In FIG. 2, reference numeral 2 in the first embodiment is used.
The thresholding threshold value generator 16 includes 16 terminals 200 to 21.
In FIG. 5, 16 preset threshold values that are blocked in the matrix shown in FIG. 3B are input by associating with each terminal shown in FIG. The target pixel coordinate signal 112 that determines the coordinate position of the target pixel on the matrix is input to the terminals 216 to 219, and the target pixel coordinate signal 112 of 4 bits from the 16 binary threshold values is used. AND circuits 21A to 21 for selecting one binary threshold value 103
T and OR circuits 22A to 22E, and the target binarization threshold value 10 from the output terminal 220 of the OR circuit 22E.
3 is output.

Next, only the part of the operation of the first embodiment that is different from the conventional example will be described with reference to FIGS. 1, 2 and 3.

The binarization threshold generator 16 has a terminal 216.
~ 219 selects one of the terminals 200 to 215 according to the logic of the input signal and outputs the selection result to the terminal 220. For example, the values of the terminals 216 to 219 are
These are “0”, “1”, “1”, and “0”. Terminal 216,
Since 217 is "0" or "1", the AND circuit 21B becomes true and 21A, 21C and 21D become false, and the value of the terminal 201 is supplied to the AND circuit 21Q via the OR circuit 22A. Similarly, the values of the terminals 205, 209, and 213 are supplied to the AND circuits 21R, 21S, and 21T, respectively.
Furthermore, since the values of the terminals 218 and 219 are "1" and "0", the AND circuit 21S is true and 21Q, 21R, and 21T are false, so that the terminal 20 supplied to the AND circuit 21S.
The value of 9 is output to the terminal 220 via the OR circuit 22E.

FIG. 4 is a block diagram showing a second embodiment of the present invention, FIG. 5 is a block diagram showing an error amount generator in the second embodiment, and FIG. 6 is an input image in the second embodiment. Shows the blocking of the error amount corresponding to the blocking of the signal,
(A) is a diagram showing the correspondence between the signal of each block and the input terminal of the error generator shown in FIG. 5, and (B) is a diagram showing the error level of each block in decimal.

In FIG. 4, the configuration of the second embodiment is as follows.
The same constituents as those of the conventional example shown in FIG. 11 are given the same numbers, and different points are that an error amount generator 17 for generating error amounts 107 and 108 corresponding to the target pixel coordinate 112 is provided.

In FIG. 5, the error amount generator 17 in the second embodiment has 16 terminals 500 to 515, which are blocked in the matrix shown in FIG. 6B.
The preset error amount is input by associating with each terminal shown in FIG. 60A, and the target pixel coordinate signal 112 for determining the coordinate position on the matrix of the target pixel in the input image signal is the terminal. A logic for selecting the representative value 107 of the black side error amount and the representative value 108 of the white side error amount according to 16 error amounts or a 4-bit target pixel coordinate signal 112. Product circuit 51A
.About.52E and OR circuits 52A to 52E, and the representative value 107 of the black side error amount and the representative value 108 of the white side error amount from the output terminal 520 of the OR circuit 52E and the output terminal 521 of the complement conversion circuit 54, respectively. Is output.

Next, only the part of the operation of the second embodiment different from that of the conventional example will be described with reference to FIGS. 4, 5 and 6.

The error amount generator 17 has terminals 516-519.
One of the terminals 500 to 515 is selected according to the logic of the input signal to and the selection result is output to the terminals 520 and 521. For example, assume that the values of the terminals 516 to 519 are "0", "1", "1", and "0". Terminal 516,
Since 517 is "0" or "1", the logical product circuit 51B becomes true and 51A, 51C, 51D become false, and the value of the terminal 501 is supplied to the logical product circuit 51Q via the logical sum circuit 52A. Similarly, the values of the terminals 505, 509, and 513 are supplied to the AND circuits 51R, 51S, and 51T, respectively.
Further, since the values of the terminals 518 and 519 are “1” and “0”, the logical product circuit 51S is true and 51Q, 51R, and 51T are false, so the terminal 50 supplied to the logical product circuit 51S.
The value of 9 is output to the terminal 520 via the OR circuit 52E. In addition, the complement conversion circuit 54 outputs to the terminal 521 a value in which the sign of the value of the terminal 509 is negative.

FIG. 7 is a block diagram showing a third embodiment of the present invention, FIG. 8 is a block diagram showing a weight coefficient generator in the third embodiment, and FIG. 9 is a weight coefficient in the third embodiment. FIG. 10 is a diagram showing an example of a weighting factor set generated by the generator, and FIG. 10 is a block diagram showing a correction value calculation circuit in the third embodiment.

In FIG. 7, the configuration of the third embodiment is as follows.
The same constituents as those in the conventional example shown in FIG. 11 are assigned the same numbers, and different points are a weight coefficient generator 18 that determines a weight coefficient used in the correction value calculation circuit 20, and a plurality of already binarized plurality. The correction value calculation circuit 20 calculates the correction value 109 from the error amount 111 of the peripheral pixels and the weighting coefficient.

In FIG. 8, the weight coefficient generator 18 in the third embodiment has eight terminals 800 to 807 to which the coefficient set numbers shown in FIG.
8 to 810 have a configuration in which a 3-bit random number generated by an internal random number generator 84 is input using the synchronizing signal of the input image signal as a clock, and a weighting coefficient of one coefficient set from eight coefficient sets AND circuit 8 for outputting 113
1A to 81J and OR circuits 82A to 82C,
The weighting coefficient 113 is output from the terminal 811 of the logical sum circuit 82C. That is, the weighting factors S1 to S12 of one of the coefficient sets 1 to 8 shown in FIG. 9 are output in parallel.

In FIG. 10, the correction value calculation circuit 20 in the third embodiment is the error amount selector 15 shown in FIG.
Error amount 1 of 12 sets in which one set is composed of multiple bits
11 are input to terminals 1202-1213,
The multipliers 91A to 91L and the multipliers 91A to 91L in which the weighting factors 113 of S1 to S12 selected from the weighting factor generator 18 are input to the terminals 901 to 912 and multiplied, respectively.
The correction values 109 are added from the terminal 913 by adding the respective outputs of 91L.
And adders 92A to 92K for outputting

Next, only the part of the operation of the third embodiment different from that of the conventional example will be described with reference to FIGS. 7, 8, 9 and 10.

The weight coefficient generator 18 has terminals 808-81.
According to the logic of the input signal from the random number generator 84 input to 0, one of the eight coefficient sets shown in FIG. 9 input to the terminals 800 to 807 is selected and output to the terminal 812 as the weighting coefficient 113. . For example, terminals 808-810
Values of "0", "1", and "0". Terminal 808,
Since 809 is "0" or "1", the AND circuit 81B is true and 81A, 81C, 81D are false, and the input value of the terminal 801 is supplied to the AND circuit 81I via the OR circuit 82A. Similarly, the input value of the terminal 805 is supplied to the AND circuit 81J. Further, since the value of the terminal 810 is "0", the logical product circuit 81I is true and 81J is false, so that the input value of the terminal 805 supplied to the logical product circuit 81I is weighted to the terminal 812 via the logical sum circuit 82C. It is output as the coefficient 113. That is, S1 to S1 of the coefficient set 6 shown in FIG.
The weighting coefficient 113 of S12 is output as a parallel signal.

The error amount 111 in the peripheral pixels output from the error amount selection selector 15 is input via the terminals 1202 to 1213 of the correction value calculation circuit 20. Weighting coefficient 113 output from the weighting coefficient generator 18
Is inputted via the terminals 901 to 912 and becomes the corresponding coefficients S1 to S12. Two values respectively corresponding to the error amount 111 and the weighting coefficient 113 are multiplied by the multipliers 91A to 91L, summed by the adders 92A to 92K, and output to the terminal 913 as the correction value 109.

FIG. 9 shows an example of a weighting coefficient set. In this example, the weighting coefficient values are the same in all the sets, and only the corresponding positions are different. You may change the value.

[0041]

As described above, according to the present invention, the error amount generated by the binarization conversion of the pixels around the target pixel is added to the target pixel of the input multi-valued image signal based on a predetermined procedure. , The added input multi-valued image signal is converted into an identification signal for identifying whether it belongs to the black side or the white side and stored.
In a halftone image processing device that calculates an error amount caused by binarization conversion based on a stored identification signal, a binarization threshold value that generates a binarization threshold value that changes for each pixel in correspondence with a target pixel position. A generation unit, an error amount generation unit that generates an error amount that changes for each pixel, a weight coefficient generation unit that generates a weight coefficient that changes for each pixel, and an error amount and a weight coefficient generated by the weight coefficient generation unit are used. By including at least one set of these means with the correction value calculating means for calculating the correction value for correcting the input multi-valued image signal, the binarization threshold value generating means can generate the binarization threshold value. Since it is changed for each pixel, the correction value obtained from the error amount of the peripheral pixels by changing the representative value of the error for each pixel by the error amount generating means is changed for each pixel. Since the correction value obtained from the error amount of the peripheral pixels by changing the weighting coefficient to be multiplied by the representative value of the error by the weighting coefficient generating means changes for each pixel, the grayscale of the input multi-valued image signal does not change much. Even if it is a portion, the output binary image is unlikely to have a single farming degree, so that there is an effect that image quality deterioration such as pseudo contour or texture can be prevented.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a block diagram showing a binarization threshold value generator in the first embodiment.

FIG. 3 shows blocking of a binarized threshold signal corresponding to blocking of an input image signal in the first embodiment,
(A) is a diagram showing the correspondence between the signal of each block and the input terminal of the binary threshold generator shown in FIG. 2, and (B) is a diagram showing the threshold level of each block in decimal. is there.

FIG. 4 is a diagram showing a second embodiment of the present invention.

FIG. 5 is a block diagram showing an error amount generator in the second embodiment.

FIG. 6 shows blocking of an error amount corresponding to blocking of an input image signal in the second embodiment, (A) shows correspondence between signals of each block and input terminals of the error amount generator shown in FIG. (B) shows the level of the error amount of each block as 1
It is the figure shown by 0 base.

FIG. 7 is a block diagram showing a third embodiment of the present invention.

FIG. 8 is a block diagram showing a weighting coefficient generator according to the third embodiment.

FIG. 9 is a diagram showing an example of a weighting coefficient set generated by a weighting coefficient generator in the third embodiment.

FIG. 10 is a block diagram showing a correction value calculation circuit in the third embodiment.

FIG. 11 is a block diagram showing a conventional example.

[Explanation of symbols]

10, 20 Correction value calculation circuit 11 Adder 12 Comparator 13 Error amount selection signal selector 14 Error amount designation memory 15 Error amount selector 16 Binarization threshold value generator 17 Error amount generator 18 Weighting coefficient generator 54 Complement conversion circuit 84 random number generator 101 multi-valued image signal 102 corrected input value 103 binarization threshold 104 signal for specifying a representative value of error amount on the black side 105 signal for specifying representative value of error amount on the white side 106 error amount Selection signal 107 Representative value of error amount on black side 108 Representative value of error amount on white side 109 Correction value 110 Binary image signal 111 Error amount 112 Target pixel coordinate 113 Weighting coefficient 21A to 21T, 51A to 51T, 81A to 81J
AND circuit 22A to 22E, 52A to 52E, 82A to 82C
OR circuit 23A-23D, 53A-53D, 83A-83C
Logical NOT circuit 91A-91L Multiplier 92A-92K Adder 200-220,500-521,800-811,9
00-913, 1202-1213 terminals

Claims (4)

[Claims] 1. An input multi-valued image signal obtained by adding, to a target pixel of an input multi-valued image signal, an error amount caused by binarization conversion of pixels around the target pixel according to a predetermined procedure. Is converted into an identification signal for identifying which one belongs to the black side or the white side, and the result is stored, and the halftone image processing apparatus calculates the error amount caused by the binarization conversion based on the stored identification signal. A binarization threshold value generation means for generating a binarization threshold value that changes for each pixel corresponding to the position of the pixel of interest; an error amount generation means for generating the error amount that changes for each pixel; A weighting coefficient generating means for generating a weighting coefficient that varies for each and a correction value calculating means for correcting the input multi-valued image signal using the error amount and the weighting coefficient generated by the weighting coefficient generating means. At least one pair of saws A halftone image processing apparatus comprising these means. 2. An input multi-valued image signal obtained by adding, to a target pixel of an input multi-valued image signal, an error amount caused by binarization conversion of pixels around the target pixel in accordance with a predetermined procedure. Is converted into an identification signal for identifying which one belongs to the black side or the white side, and the result is stored, and the halftone image processing apparatus calculates the error amount caused by the binarization conversion based on the stored identification signal. A halftone image processing device, comprising: a binarization threshold value generation unit that generates a binarization threshold value that changes for each pixel in correspondence with the position of the pixel of interest. 3. An input multi-valued image signal obtained by adding, to a target pixel of an input multi-valued image signal, an error amount caused by binarization conversion of pixels around the target pixel according to a predetermined procedure. Is converted into an identification signal for identifying which one belongs to the black side or the white side, and the result is stored, and the halftone image processing apparatus calculates the error amount caused by the binarization conversion based on the stored identification signal. A halftone image processing apparatus comprising: an error amount generating means for generating the error amount that changes for each pixel corresponding to the position of the pixel of interest. 4. An input multi-valued image signal obtained by adding to a target pixel of an input multi-valued image signal an error amount caused by binarization conversion of pixels around the target pixel according to a predetermined procedure. Is converted into an identification signal for identifying whether it belongs to the black side or the white side and stored, and the amount of error generated by the binarization conversion is calculated based on the stored identification signal. Weighting coefficient generating means for generating a weighting coefficient that changes for each time, and correction for calculating a correction value for correcting the input multi-valued image signal using the error amount and the weighting coefficient generated by the weighting coefficient generating means A halftone image processing device, comprising: a value calculation means.