JP2691307B2 - Package for storing semiconductor elements - Google Patents

Package for storing semiconductor elements

Info

Publication number
JP2691307B2
JP2691307B2 JP1308605A JP30860589A JP2691307B2 JP 2691307 B2 JP2691307 B2 JP 2691307B2 JP 1308605 A JP1308605 A JP 1308605A JP 30860589 A JP30860589 A JP 30860589A JP 2691307 B2 JP2691307 B2 JP 2691307B2
Authority
JP
Japan
Prior art keywords
semiconductor element
oxide
glass
external lead
lid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1308605A
Other languages
Japanese (ja)
Other versions
JPH03167844A (en
Inventor
弘 松本
公明 井口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP1308605A priority Critical patent/JP2691307B2/en
Priority to US07/574,472 priority patent/US5168126A/en
Publication of JPH03167844A publication Critical patent/JPH03167844A/en
Application granted granted Critical
Publication of JP2691307B2 publication Critical patent/JP2691307B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は半導体素子を収容する半導体素子収納用パッ
ケージの改良に関するものである。
Description: TECHNICAL FIELD The present invention relates to an improvement in a semiconductor device housing package for housing a semiconductor device.

(従来の技術) 従来、半導体素子を収容するためのパッケージ、特に
ガラスの溶着によって封止するガラス封止型半導体素子
収納用パッケージは、絶縁基体と蓋体とから成り、内部
に半導体素子を収容する空所を有する絶縁容器と、該容
器内に収容される半導体素子を外部電気回路に電気的に
接続するための外部リード端子とから構成されており、
絶縁基体及び蓋体の相対向する主面に予め封止用のガラ
ス部材を被着形成すると共に、絶縁基体主面に外部リー
ド端子を固定し、半導体素子の各電極と外部リード端子
とをワイヤボンド接続した後、絶縁基体及び蓋体のそれ
ぞに被着させた封止用のガラス部材を溶融一体化させる
ことによって内部に半導体素子を気密に封止している。
(Prior Art) Conventionally, a package for accommodating a semiconductor element, particularly a package for accommodating a glass-encapsulated semiconductor element sealed by welding glass, includes an insulating base and a lid, and accommodates the semiconductor element inside. And an external lead terminal for electrically connecting a semiconductor element housed in the container to an external electric circuit,
A glass member for sealing is applied in advance on the opposing main surfaces of the insulating base and the lid, and external lead terminals are fixed on the main surface of the insulating base, and each electrode of the semiconductor element and the external lead terminal are wired. After the bond connection, the semiconductor element is hermetically sealed inside by fusing and integrating a sealing glass member attached to each of the insulating base and the lid.

(発明が解決しようとする課題) しかし乍ら、この従来のガラス封止型半導体素子収納
用パッケージは通常、外部リード端子がコバール(29Wt
% Ni−16Wt% Co−55Wt% Fe合金)や42Alloy(42Wt%
Ni−58Wt% Fe合金)の導電性材料から成っており、該
コバールや42Alloy等は導電率が低いことから以下に述
べる欠点を有する。
(Problems to be Solved by the Invention) However, this conventional package for housing a glass-sealed semiconductor element usually has an external lead terminal of Kovar (29 Wt).
% Ni-16Wt% Co-55Wt% Fe alloy) and 42Alloy (42Wt%
Ni-58Wt% Fe alloy), and Kovar and 42Alloy have the following disadvantages due to their low conductivity.

即ち、 コバールや42Alloyはその導電率が3.0〜3.5%(IAC
S)と低い。そのためこのコバールや42Alloy等から成る
外部リード端子に信号を伝搬させた場合、信号の伝搬速
度が極めて遅いものとなり、高速駆動を行う半導体素子
はその収容が不可となってしまう、 半導体素子収納用パッケージの内部に収容する半導体
素子の高密度化、高集積化の進展に伴い、半導体素子の
電極数が大幅に増大しており、半導体素子の各電極を外
部電気回路に接続する外部リード端子の線幅も極めて細
くなってきている。そのため外部リード端子は上記に
記載のコバールや42Alloyの導電率が低いことと相俊っ
て電気抵抗が極めて大きなものになってきており、外部
リード端子に信号を伝搬させると、該外部リード端子の
電気抵抗に起因して信号が大きく減衰し、内部に収容す
る半導体素子に信号を正確に入力することができず、半
導体素子に誤動作を生じさせてしまう、 等の欠点を有していた。
That is, Kovar and 42Alloy have a conductivity of 3.0 to 3.5% (IAC
S) and low. Therefore, when a signal is propagated to an external lead terminal made of Kovar or 42Alloy, the signal propagation speed becomes extremely slow, and semiconductor devices that perform high-speed driving cannot be accommodated. The number of electrodes of a semiconductor element has increased significantly with the progress of higher density and higher integration of semiconductor elements housed inside the semiconductor device, and wires of external lead terminals for connecting each electrode of the semiconductor element to an external electric circuit. The width has also become extremely narrow. For this reason, the external lead terminal has become extremely large in electrical resistance in tandem with the low conductivity of Kovar and 42 Alloy described above, and when a signal is propagated to the external lead terminal, the external lead terminal becomes The signal is greatly attenuated due to the electric resistance, and the signal cannot be accurately input to the semiconductor element housed therein, thereby causing a malfunction in the semiconductor element.

(発明の目的) 本発明は上記欠点に鑑み案出されたもので、その目的
は外部リード端子における信号の減衰を極小となし、内
部に収容する半導体素子への信号の入出力を確実に行う
ことを可能として半導体素子を長期間にわたり正常、且
つ安定に作動させることができる半導体素子収納用パッ
ケージを提供することにある。
(Object of the Invention) The present invention has been devised in view of the above-mentioned drawbacks, and an object of the present invention is to minimize signal attenuation at an external lead terminal and to reliably input and output a signal to a semiconductor element housed therein. It is therefore an object of the present invention to provide a semiconductor element storage package that enables the semiconductor element to operate normally and stably for a long period of time.

また本発明の他の目的は高速駆動を行う半導体素子を
収容することができる半導体素子収納用パッケージを提
供することにある。
Another object of the present invention is to provide a semiconductor element housing package capable of housing a semiconductor element which operates at high speed.

(課題を解決するための手段) 本発明は内部に半導体素子を収容するための空所を有
する絶縁容器に外部リード端子をガラス部材を介して取
着して成る半導体素子収納用パッケージにおいて、前記
絶縁容器を酸化アルミニウム質焼結体で、外部リード端
子を熱膨張係数65乃至75×10-7/℃、導電率25%(IAC
S)以上の金属で、ガラス部材を酸化鉛70.0乃至90.0Wt
%、酸化ホウ素10.0〜15.0Wt%、アルミナ及びシリカ0.
5乃至3.0Wt%、酸化亜鉛及び酸化ビスマス3.0Wt%以下
のガラス成分にフィラーとしてのチタン酸鉛、β−ユー
クリプタイト、コージライト、ジルコン、酸化錫、ウレ
マイト及びチタン酸錫の少なくとも1種を20乃至40Vol
%添加したガラスで形成したことを特徴とするものであ
る。
(Means for Solving the Problems) The present invention relates to a package for housing semiconductor elements, wherein external lead terminals are attached via a glass member to an insulating container having a space for housing a semiconductor element therein. The insulating container is made of aluminum oxide sintered body, and the external lead terminals are made of a thermal expansion coefficient of 65 to 75 × 10 -7 / ° C and a conductivity of 25% (IAC
S) or higher metal, glass oxide lead oxide 70.0 to 90.0Wt
%, Boron oxide 10.0-15.0 Wt%, alumina and silica 0.
At least one of lead titanate, β-eucryptite, cordierite, zircon, tin oxide, uremite and tin titanate as a filler is added to a glass component of 5 to 3.0 Wt%, zinc oxide and bismuth oxide of 3.0 Wt% or less. 20 to 40 Vol
It is characterized in that it is formed of glass to which% is added.

(実施例) 次に本発明を添付図面に基づき詳細に説明する。(Example) Next, the present invention will be described in detail with reference to the accompanying drawings.

第1図及び第2図は本発明の半導体素子収納用パッケ
ージの一実施例を示し、1は絶縁基体、2は蓋体であ
る。この絶縁基体1と蓋体2とにより絶縁容器3が構成
される。
1 and 2 show an embodiment of a package for accommodating a semiconductor element according to the present invention, wherein 1 is an insulating base and 2 is a lid. The insulating container 3 is constituted by the insulating base 1 and the lid 2.

前記絶縁基体1及び蓋体2はそれぞれの中央部に半導
体素子を収容する空所を形成するための凹部が設けてあ
り、絶縁基体1の凹部底面には半導体素子4が樹脂、ガ
ラス、ロウ剤等の接着剤を介し取着固定される。
The insulating base 1 and the lid 2 are each provided with a concave portion for forming a space for accommodating a semiconductor element at the center thereof, and the semiconductor element 4 is formed of resin, glass, brazing agent on the bottom surface of the concave portion of the insulating base 1. It is attached and fixed via an adhesive such as.

前記絶縁基体1及び蓋体2は酸化アルミニウム質焼結
体から成り、第1図に示すような絶縁基体1及び蓋体2
に対応した形状を有するプレス型内に、酸化アルミニウ
ム(Al2O3)、シリカ(SiO2)、マグネシア(MgO)等の
原料粉末を充填させるとともに一定圧力を印加して成形
し、しかる後、成形品を約1500℃の温度で焼成すること
によって製作される。
The insulating base 1 and the lid 2 are made of an aluminum oxide sintered body, and as shown in FIG.
A raw material powder such as aluminum oxide (Al 2 O 3 ), silica (SiO 2 ), magnesia (MgO), etc. is filled in a press mold having a shape corresponding to, and molded by applying a constant pressure, and then, It is manufactured by firing a molded article at a temperature of about 1500 ° C.

尚、前記絶縁基体1及び蓋体2を形成する酸化アルミ
ニウム質焼結体はその熱膨張係数が65乃至75×10-7/℃
であり、後述する封止用ガラス部材の熱膨張係数との関
係において絶縁基体1及び蓋体2と封止用ガラス部材間
に大きな熱膨張の差が生じることはない。
The thermal expansion coefficient of the aluminum oxide sintered body forming the insulating base body 1 and the lid body 2 is 65 to 75 × 10 -7 / ° C.
Therefore, a large difference in thermal expansion does not occur between the insulating substrate 1 and the lid 2 and the sealing glass member in relation to the thermal expansion coefficient of the sealing glass member described later.

また前記絶縁基体1及び蓋体2にはその相対向する主
面に封止用のガラス部材6が予め被着形成されており、
該絶縁基体1及び蓋体2の各々に被着されている封止用
ガラス部材6を加熱溶融させ一体化させることにより絶
縁容器3内の半導体素子4を気密に封止する。
Further, a glass member 6 for sealing is previously formed on the opposing main surfaces of the insulating base 1 and the lid 2.
The semiconductor element 4 in the insulating container 3 is hermetically sealed by heating and melting the sealing glass member 6 attached to each of the insulating base 1 and the lid 2 to be integrated.

前記絶縁基体1及び蓋体2の相対向する主面に被着さ
れる封止用ガラス部材6は、酸化鉛70.0乃至90.0Wt%、
酸化ホウ素10.0乃至15.0Wt%、アルミナ及びシリカ0.5
乃至3.0Wt%、酸化亜鉛及び酸化ビスマス3.0Wt%以下の
ガラス成分にフィラーとしてのチタン酸鉛、β−ユーク
リプタイト、コージライト、ジルコン、酸化錫、ウレマ
イト及びチタン酸錫の少なくとも1種を20乃至40Vol%
添加したガラスから成り、上記各成分を所定の値に秤量
混合すると共に、該混合粉末を950〜1100℃の温度で加
熱溶融させることによって製作される。このガラス部材
6はその熱膨張係数が50乃至70×10-7/℃である。
The sealing glass member 6 adhered to the main surfaces of the insulating base 1 and the lid 2 facing each other is made of lead oxide 70.0 to 90.0 Wt%,
Boron oxide 10.0 to 15.0 Wt%, alumina and silica 0.5
To 3.0 Wt%, zinc oxide and bismuth oxide of 3.0 Wt% or less, and at least one of lead titanate, β-eucryptite, cordierite, zircon, tin oxide, uremite and tin titanate as a filler in a glass component of 20% or less. To 40 Vol%
It is made of added glass, and is manufactured by weighing and mixing the above components to predetermined values and heating and melting the mixed powder at a temperature of 950 to 1100 ° C. The glass member 6 has a coefficient of thermal expansion of 50 to 70 × 10 -7 / ° C.

前記封止用ガラス部材6はその熱膨張係数が50乃至70
×10-7/℃であり、絶縁基体1及び蓋体2の各々の熱膨
張係数と近似することから絶縁基体1及び蓋体2の各々
に被着されている封止用ガラス部材6を加熱溶融させ一
体化させることにより絶縁容器3内の半導体素子4を気
密に封止する際、絶縁基体1及び蓋体2と封止用ガラス
部材6との間には両者の熱膨張係数の相違に起因する熱
応力が発生することは殆どなく、絶縁基体1及び蓋体2
とを封止用ガラス部材6を介し強固に接合することが可
能となる。
The glass member 6 for sealing has a coefficient of thermal expansion of 50 to 70.
Since it is × 10 -7 / ° C, which is close to the thermal expansion coefficient of each of the insulating substrate 1 and the lid body 2, the sealing glass member 6 attached to each of the insulating substrate 1 and the lid body 2 is heated. When the semiconductor element 4 in the insulating container 3 is hermetically sealed by melting and integrating, there is a difference in thermal expansion coefficient between the insulating base 1 and the lid 2 and the sealing glass member 6. Almost no thermal stress is generated due to the insulating base 1 and the lid 2.
Can be firmly joined via the sealing glass member 6.

尚、前記封止用ガラス部材6は酸化鉛(PbO)が70.0W
t%未満であるとガラスの熱膨張が小さくなって絶縁基
体1及び蓋体2の熱膨張と合わなくなり、また90.0Wt%
を越えるとガラスの耐薬品性が劣化して絶縁容器3の気
密封止の信頼性が大きく低下するため酸化鉛(PbO)は7
0.0乃至90.0Wt%の範囲に限定される。
The sealing glass member 6 contains 70.0 W of lead oxide (PbO).
If it is less than t%, the thermal expansion of the glass becomes small and it does not match the thermal expansion of the insulating substrate 1 and the lid 2, and 90.0 Wt%
If the temperature exceeds 1.0, the chemical resistance of the glass will deteriorate and the reliability of the hermetic sealing of the insulating container 3 will be greatly reduced.
It is limited to the range of 0.0 to 90.0 Wt%.

また酸化ホウ素(B2O3)が10.0Wt%未満であるとガラ
スの熱膨張が大きくなって絶縁基体1と蓋体2の熱膨張
と合わなくなり、また15.0Wt%を越えるとガラスの耐薬
品性が劣化して絶縁容器3の気密封止の信頼性が大きく
低下するため酸化ホウ素(B2O3)は10.0乃至15.0Wt%の
範囲に限定される。
Further, when the content of boron oxide (B 2 O 3 ) is less than 10.0 Wt%, the thermal expansion of the glass becomes large, and the thermal expansion of the insulating substrate 1 and the lid 2 does not match, and when it exceeds 15.0 Wt%, the chemical resistance of the glass is high. Boron oxide (B 2 O 3 ) is limited to the range of 10.0 to 15.0 Wt% because the reliability is deteriorated and the reliability of the airtight sealing of the insulating container 3 is significantly reduced.

またアルミナ(Al2O3)は0.5Wt%未満であるとガラス
の結晶化が進んで絶縁容器3の気密封止が困難となり、
また3.0Wt%を越えるとガラスの熱膨張が小さくなって
絶縁基体1と蓋体2の熱膨張と合わなくなることからア
ルミナ(Al2O3)は0.5乃至3.0Wt%の範囲に限定され
る。
Further, if the amount of alumina (Al 2 O 3 ) is less than 0.5 Wt%, the crystallization of the glass proceeds and the hermetic sealing of the insulating container 3 becomes difficult,
On the other hand, if it exceeds 3.0 Wt%, the thermal expansion of the glass becomes so small that it does not match the thermal expansion of the insulating substrate 1 and the lid 2. Therefore, alumina (Al 2 O 3 ) is limited to the range of 0.5 to 3.0 Wt%.

またシリカ(SiO2)が0.5Wt%未満であるとガラスの
結晶化が進んで絶縁容器3の気密封止が困難となり、ま
た3.0Wt%を越えるとガラスの溶融温度が上がり、絶縁
容器3内部に半導体素子を気密に封止する際、ガラスを
溶融させるための熱が内部に収容した半導体素子に作用
し半導体素子の特性に熱劣化を招来してしまうことから
シリカ(SiO2)は0.5乃至3.0Wt%の範囲に限定される。
If silica (SiO 2 ) is less than 0.5 Wt%, the crystallization of the glass will proceed and it will be difficult to hermetically seal the insulating container 3. If it exceeds 3.0 Wt%, the melting temperature of the glass will rise and the inside of the insulating container 3 will be increased. When the semiconductor element is hermetically sealed, the heat for melting the glass acts on the semiconductor element housed inside and causes thermal deterioration in the characteristics of the semiconductor element, so silica (SiO 2 ) is 0.5 to Limited to the range of 3.0Wt%.

また酸化亜鉛(ZnO)が3.0Wt%を越えるとガラスの結
晶化が進んで絶縁容器3の気密封止が困難となることか
ら酸化亜鉛(ZnO)は3.0Wt%以下に限定される。
If zinc oxide (ZnO) exceeds 3.0 wt%, crystallization of the glass proceeds and it becomes difficult to hermetically seal the insulating container 3. Therefore, zinc oxide (ZnO) is limited to 3.0 wt% or less.

また酸化ビスマス(Bi2O3)が3.0Wt%を越えるとガラ
スの耐薬品性が劣化して絶縁容器3の気密封止の信頼性
が大きく低下するため酸化ビスマス(Bi2O3)は3.0Wt%
以下に限定される。
The bismuth oxide (Bi 2 O 3) bismuth oxide because the reliability of the hermetic sealing of the chemical resistance of the glass is deteriorated insulating container 3 exceeds 3.0 wt% significantly decreases (Bi 2 O 3) is 3.0 Wt%
Limited to:

更に、フィラーとしてのチタン酸鉛、β−ユークリプ
タイト、コージライト、ジルコン、酸化錫、ウレマイト
及びチタン酸錫の少なくとも1種は20Vol%未満もしく
は40Vol%を越えるとガラスの熱膨張が絶縁基体1及び
蓋体2の熱膨張と合わなくなるためその添加量は20.0乃
至40.0Vol%の範囲に限定される。
Furthermore, when at least one of lead titanate, β-eucryptite, cordierite, zircon, tin oxide, uremite and tin titanate as a filler is less than 20 Vol% or more than 40 Vol%, the thermal expansion of the glass is an insulating substrate 1. In addition, since it does not match the thermal expansion of the lid body 2, its addition amount is limited to the range of 20.0 to 40.0 Vol%.

前記封止用ガラス部材6は前述した成分から成るガラ
スの粉末に適当な有機溶剤、溶媒を添加して得たガラス
ペーストを従来周知の厚膜手法を採用することによって
絶縁基体1及び蓋体2の相対向する主面に被着形成され
る。
The sealing glass member 6 is made of a glass paste obtained by adding a suitable organic solvent and a solvent to a glass powder composed of the above-described components by employing a conventionally well-known thick film method to form the insulating base 1 and the lid 2. Are formed on opposite main surfaces.

前記絶縁基体1と蓋体2との間には導電性材料から成
る外部リード端子5が配されており、該外部リード端子
5は半導体素子4の各電極がワイヤ7を介し電気的に接
続され、外部リード端子5を外部電気回路に接続するこ
とによって半導体素子4が外部電気回路に接続されるこ
ととなる。
An external lead terminal 5 made of a conductive material is disposed between the insulating base 1 and the lid 2. The external lead terminal 5 is electrically connected to each electrode of the semiconductor element 4 via a wire 7. By connecting the external lead terminal 5 to an external electric circuit, the semiconductor element 4 is connected to the external electric circuit.

前記外部リード端子5は絶縁基体1及び蓋体2の相対
向する主面に被着させた封止用ガラス部材6を溶融一体
化させ、絶縁容器3を気密封止する際に同時に絶縁基体
1と蓋体2との間に取着される。
The external lead terminal 5 is formed by melting and integrating the insulating substrate 1 and the sealing glass member 6 adhered to the opposing main surfaces of the lid body 2 at the same time when the insulating container 3 is hermetically sealed. And the lid body 2 are attached.

前記外部リード端子5は42Alloy(Ni−Co合金)から
成る芯体の外表面に非磁性体金属である銅(Cu)を被着
させたもの、非磁性体金属である銅(Cu)から成る芯体
の外表面にニッケル−コバルト−鉄合金(Ni−Co−Fe合
金)を被着させたもの、或いは板状の非磁性体金属であ
る銅(Cu)の上下面にニッケル−コバルト−鉄合金(Ni
−Co−Fe合金)を接合させたもの等から成り、その導電
率は25%(IACS)以上、熱膨張係数は64乃至75×10-7/
℃である。
The external lead terminals 5 are formed by depositing a non-magnetic metal copper (Cu) on the outer surface of a core body made of 42 Alloy (Ni-Co alloy), or made of non-magnetic metal copper (Cu). Nickel-cobalt-iron alloy (Ni-Co-Fe alloy) deposited on the outer surface of the core, or nickel-cobalt-iron on the top and bottom surfaces of copper (Cu), which is a plate-shaped non-magnetic metal Alloy (Ni
-Co-Fe alloy), etc., whose conductivity is 25% (IACS) or more, and coefficient of thermal expansion is 64 to 75 × 10 -7 /
° C.

前記外部リード端子5はその導電率が25.0%(IACS)
以上であり、電気を流し易いことから外部リード端子5
の信号伝搬速度を極めて速いものとなすことができ、絶
縁容器3内に収容した半導体素子4を高速駆動させたと
しても半導体素子4と外部電気回路との間における信号
の出し入れは常に安定、且つ確実となすことができる。
The external lead terminal 5 has a conductivity of 25.0% (IACS)
As described above, it is easy to conduct electricity.
Can be made extremely high, and even if the semiconductor element 4 accommodated in the insulating container 3 is driven at a high speed, the signal transfer between the semiconductor element 4 and the external electric circuit is always stable, and You can be sure.

また外部リード端子5の導電率が高いことから外部リ
ード端子5の線幅が細くなったとしても外部リード端子
5の電気抵抗を低く抑えることができ、その結果、外部
リード端子5における信号の減衰を極小として内部に収
容する半導体素子4に外部電気回路から供給される電気
信号を正確に入力することができる。
Further, since the electrical conductivity of the external lead terminal 5 is high, the electrical resistance of the external lead terminal 5 can be kept low even if the line width of the external lead terminal 5 is reduced, and as a result, signal attenuation at the external lead terminal 5 is achieved. The electric signal supplied from the external electric circuit can be accurately input to the semiconductor element 4 housed therein with the minimum value.

更に前記外部リード端子5はその熱膨張係数が65乃至
75×10-7/℃であり、封止用ガラス部材6の熱膨張係数
と近似することから外部リード端子5を絶縁基体1及び
蓋体2の間に封止用ガラス部材6を用いて固定する際、
外部リード端子5と封止用ガラス部材6との間には両者
の熱膨張係数の相違に起因する熱応力が発生することな
く、外部リード端子5を封止用ガラス部材6で強固に固
定することも可能となる。
Further, the external lead terminal 5 has a coefficient of thermal expansion of 65 to
75 × 10 −7 / ° C., which is close to the thermal expansion coefficient of the sealing glass member 6, so that the external lead terminal 5 is fixed between the insulating substrate 1 and the lid body 2 by using the sealing glass member 6. When doing
The external lead terminal 5 is firmly fixed by the sealing glass member 6 without causing thermal stress between the external lead terminal 5 and the sealing glass member 6 due to the difference in thermal expansion coefficient between them. It is also possible.

かくして、この半導体素子収納用パッケージによれば
絶縁基体1の凹部底面に半導体素子4を取着固定すると
ともに該半導体素子4の各電極をボンディングワイヤ7
により外部リード端子5に接続させ、しかる後、絶縁基
体1と蓋体2とを該絶縁基体1及び蓋体2の相対向する
主面に予め被着させておいた封止用ガラス部材6を溶融
一体化させることによって接合させ、これによって最終
製品としての半導体装置が完成する。
Thus, according to the package for accommodating the semiconductor element, the semiconductor element 4 is attached and fixed to the bottom surface of the concave portion of the insulating base 1 and each electrode of the semiconductor element 4 is connected to the bonding wire 7.
After that, the sealing glass member 6 in which the insulating substrate 1 and the lid 2 are previously adhered to the opposing main surfaces of the insulating substrate 1 and the lid 2 is removed. The semiconductor device as a final product is completed by joining by melting and integrating.

(発明の効果) 本発明の半導体素子収納用パッケージによれば、絶縁
基体及び蓋体を酸化アルミニウム質焼結体で、外部リー
ド端子を熱膨張係数65乃至75×10-7/℃、導電率25%(I
ACS)以上の金属で、ガラス部材を酸化鉛70.0乃至90.0W
t%、酸化ホウ素10.0〜15.0Wt%、アルミナ及びシリカ
0.5乃至3.0Wt%、酸化亜鉛及び酸化ビスマス3.0Wt%以
下のガラス成分にフィラーとしてのチタン酸鉛、β−ユ
ークリプタイト、コージライト、ジルコン、酸化錫、ウ
レマイト及びチタン酸錫の少なくとも1種を20乃至40Vo
l%添加して成るガラスで形成したことから外部リード
端子の信号伝搬速度を極めて速いものとなすことがで
き、絶縁容器内に収容した半導体素子を高速駆動させた
としても半導体素子と外部電気回路との間における信号
の出し入れを常に安定、且つ確実となすことが可能とな
る。
(Effect of the Invention) According to the package for housing a semiconductor element of the present invention, the insulating base and the lid are made of an aluminum oxide sintered body, the external lead terminals are made of a coefficient of thermal expansion of 65 to 75 × 10 −7 / ° C., and the conductivity is 25% (I
ACS) or higher metal, glass oxide lead oxide 70.0-90.0W
t%, boron oxide 10.0-15.0Wt%, alumina and silica
At least one of lead titanate, β-eucryptite, cordierite, zircon, tin oxide, uremite and tin titanate as a filler is added to glass components of 0.5 to 3.0 Wt% and zinc oxide and bismuth oxide of 3.0 Wt% or less. 20-40Vo
Since it is made of glass with l% added, the signal propagation speed of the external lead terminal can be made extremely fast, and even if the semiconductor element housed in the insulating container is driven at high speed, the semiconductor element and the external electric circuit can be driven. It is possible to always send and receive signals to and from Stable and reliable.

また外部リード端子の線幅が細くなったとしても外部
リード端子の電気抵抗を低く抑えることができ、その結
果、外部リード端子における信号の減衰を極小として内
部に収容する半導体素子に外部電気回路から供給される
電気信号を正確に入力することが可能となる。
Also, even if the line width of the external lead terminal is reduced, the electric resistance of the external lead terminal can be kept low. The supplied electric signal can be input accurately.

更に外部リード端子はその熱膨張係数が絶縁基体、蓋
体及び封止用ガラス部材の各々の熱膨張係数と近似し、
絶縁基体と蓋体との間に外部リード端子を挟み、各々を
封止用ガラス部材で取着接合したとしても絶縁基体及び
蓋体と封止用ガラス部材との間、外部リード端子と封止
用ガラス部材との間のいずれにも熱膨張係数の相違に起
因する熱応力は発生せず、すべてを強固に取着接合する
ことも可能となる。
Further, the thermal expansion coefficient of the external lead terminal is close to the thermal expansion coefficient of each of the insulating base, the lid and the sealing glass member,
Even when the external lead terminals are sandwiched between the insulating base and the lid, and each of them is attached and bonded by the sealing glass member, the external lead terminals and the sealing are provided between the insulating base and the lid and the sealing glass member. No thermal stress due to the difference in the coefficient of thermal expansion is generated between the glass member and the glass member, and it is possible to firmly attach and bond all of them.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の半導体素子収納用パッケージの一実施
例を示す断面図、第2図は第1図に示すパッケージの絶
縁基体上面より見た平面図である。 1……絶縁基体、2……蓋体 3……絶縁容器 5……外部リード端子 6……封止用ガラス部材
FIG. 1 is a cross-sectional view showing one embodiment of a package for housing a semiconductor element according to the present invention, and FIG. 2 is a plan view of the package shown in FIG. DESCRIPTION OF SYMBOLS 1 ... Insulating base 2 ... Lid 3 ... Insulating container 5 ... External lead terminal 6 ... Glass member for sealing

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】内部に半導体素子を収容するための空所を
有する絶縁容器に外部リード端子をガラス部材を介して
取着して成る半導体素子収納用パッケージにおいて、前
記絶縁容器を酸化アルミニウム質焼結体で、外部リード
端子を熱膨張係数65乃至75×10-7/℃、導電率25%(IAC
S)以上の金属で、ガラス部材を酸化鉛70.0乃至90.0Wt
%、酸化ホウ素10.0乃至15.0Wt%、アルミナ及びシリカ
0.5乃至3.0Wt%、酸化亜鉛及び酸化ビスマス3.0Wt%以
下のガラス成分にフィラーとしてのチタン酸鉛、β−ユ
ークリプタイト、コージライト、ジルコン、酸化錫、ウ
レマイト及びチタン酸錫の少なくとも1種を20乃至40Vo
l%添加したガラスで形成したことを特徴とする半導体
素子収納用パッケージ。
1. A semiconductor device housing package comprising an external lead terminal attached via a glass member to an insulating container having a space for accommodating a semiconductor element therein, wherein the insulating container is made of aluminum oxide. By bonding, the external lead terminals have a coefficient of thermal expansion of 65 to 75 × 10 -7 / ° C and a conductivity of 25% (IAC
S) or higher metal, glass oxide lead oxide 70.0 to 90.0Wt
%, Boron oxide 10.0 to 15.0 Wt%, alumina and silica
At least one of lead titanate, β-eucryptite, cordierite, zircon, tin oxide, uremite and tin titanate as a filler is added to glass components of 0.5 to 3.0 Wt% and zinc oxide and bismuth oxide of 3.0 Wt% or less. 20-40Vo
A package for housing a semiconductor element, which is formed of glass with 1% added.
JP1308605A 1989-08-25 1989-11-27 Package for storing semiconductor elements Expired - Fee Related JP2691307B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1308605A JP2691307B2 (en) 1989-11-27 1989-11-27 Package for storing semiconductor elements
US07/574,472 US5168126A (en) 1989-08-25 1990-08-27 Container package for semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1308605A JP2691307B2 (en) 1989-11-27 1989-11-27 Package for storing semiconductor elements

Publications (2)

Publication Number Publication Date
JPH03167844A JPH03167844A (en) 1991-07-19
JP2691307B2 true JP2691307B2 (en) 1997-12-17

Family

ID=17983051

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1308605A Expired - Fee Related JP2691307B2 (en) 1989-08-25 1989-11-27 Package for storing semiconductor elements

Country Status (1)

Country Link
JP (1) JP2691307B2 (en)

Also Published As

Publication number Publication date
JPH03167844A (en) 1991-07-19

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