JP2687510B2 - Manufacturing method of chip-shaped solid electrolytic capacitor - Google Patents

Description

The present invention relates to a chip solid electrolytic capacitor, and more particularly to a structure of a cathode layer and a cathode lead terminal connecting portion of the chip solid electrolytic capacitor.

[Conventional technology]

2. Description of the Related Art In recent years, as electronic devices have become lighter, thinner and smaller, and surface mounting technology has progressed, the market size of chip-shaped solid electrolytic capacitors featuring small size and large capacity has expanded remarkably, and they are used for various applications.

Conventionally, in this type of chip solid electrolytic capacitor, as shown in FIG. 4, an anode lead 2 and an anode lead terminal 4 of a capacitor element 1 having an anode lead 2 and a cathode layer 3 formed on the surface thereof are welded to each other. The cathode layer 3 and the cathode lead terminal 5 are connected with a conductive adhesive 13, and the positive and negative electrode leads 4 and 5 are covered with a resin 7 while leaving the exposed portions of the positive and negative leads 4 and 5 along the outer peripheral surface of the resin 7. -It is configured by bending the cathode lead terminals 4 and 5.

[Problems to be solved by the invention]

The above-mentioned conventional chip-shaped solid electrolytic capacitor has the following drawbacks because the cathode layer 3 and the cathode lead terminal 5 are connected by the conductive adhesive 13.

(1) The conductive adhesive 13 is generally composed of a metal powder and a resin having a strong adhesive force, but it is necessary to increase the content ratio of the metal powder in order to wait for high conductivity. become weak. Therefore, the connection may be insufficient due to mechanical stress during the process or thermal stress at the time of mounting, which may result in an open mode and loss of electrical characteristics.

(2) Further, the conductive lead 13 is generally applied to the cathode lead terminal 5 in a fixed amount by a dispenser, but since the applied area is small and the applied amount is very small,
It is difficult to make the coating amount constant. Therefore, there is a large variation in connection strength, and there is a high risk that the open mode will occur.

(3) Further, in the case of applying with a dispenser, it is difficult to increase the application speed because the application amount varies more, and the process is complicated, such as application amount management, curing state management and connection strength check. Therefore, the manufacturing cost becomes high.

An object of the present invention is to eliminate the drawbacks of the prior art, the cathode layer and the cathode lead terminal are electrically conductive and have excellent connection strength, good workability and uniformity, and a chip-shaped solid electrolytic capacitor which is easy in process control. To provide.

[Means for solving the problem]

The method for manufacturing the chip solid electrolytic capacitor of the present invention is
A step of forming a capacitor element comprising an anode lead set up on one end surface and a cathode layer formed on the surface; an anode lead terminal is electrically conductively fixed to the anode lead, and a cathode is formed on the cathode layer. In a method for manufacturing a chip solid electrolytic capacitor, including a step of electrically fixing lead terminals, and a step of resin-coating the capacitor element to which the anode lead terminal and the cathode lead terminal are fixed, the cathode layer and the cathode At the time of fixing with the lead terminal, the cathode layer is preliminarily plated with a high melting point solder having a melting point of 230 ° C. or more in the portion to be fixed with the cathode layer, and the high melting point solder is melted and resolidified to thereby form the cathode layer. And the cathode lead are fixed to each other. Further, as the cathode lead terminal, it is preferable to use a cathode lead terminal having a structure in which a base material is covered with a solder having a lower melting point than the high melting point solder, and the high melting point solder is formed on the low melting point solder. Characterize.

〔Example〕

Next, the present invention will be described with reference to the drawings. First
The drawing is a side sectional view of an embodiment of the present invention.

As shown in FIG. 1, the anode lead 2 of the capacitor element 1 having the anode lead 2 and the cathode layer 3 is connected to the anode lead terminal 4.
Are connected by welding, and the cathode layer 3 is placed on the high-melting-point solder 6 pre-plated on the step portion of the cathode lead terminal 5, and then the high-melting-point solder with the cathode layer 3 and the cathode lead terminal 5 being pressed together. The high-melting-point solder 6 is passed through a high-temperature furnace having a melting point higher than that of 6, and the high-melting-point solder 6 is left at room temperature to solidify to connect the cathode layer 3 and the cathode lead terminal 5, and then the anode lead terminal 4 and the cathode lead terminal 5 The exposed part of each of the lead terminals was covered with the resin 7 by transfer molding means, and the exposed part of each lead terminal was bent along the outer peripheral surface of the resin 7 to form a chip solid electrolytic capacitor.

Next, a means for plating the high melting point solder 6 on the cathode lead terminal 5 will be described with reference to FIGS. 2 and 3A to 3C.

FIG. 2 is a front view of the lead frame 8 in which the positive and negative electrode lead terminals of the present invention are continuously formed, and FIG.
(C) is a perspective view of the lead frame 8 before forming the positive and negative electrode lead terminals 4 and 5, (a) before plating, (b).
Is after low melting point solder plating, and (c) is after high melting point solder plating.

Explaining in the order of steps, the base material 10 is a strip plate made of an alloy of iron and nickel and having a width of 30 mm and a thickness of 0.1 mm. After the base material 10 is plated with nickel undercoat, for example, tin: lead has a weight ratio of 6 : 4 low melting point solder plating 11 was formed on both surfaces of the base material 10. Next, low melting point solder plating 11
Masking was performed excluding a part of the surface of, for example, tin: lead to form a high melting point solder plating 12 having a weight ratio of 5:95. Further, the masking material was removed to form a strip plate as shown in FIG. 3 (c). After that, this strip plate is punched by a predetermined die and has a support plate 9 as shown in FIG.
Was formed. The manufacturing method of the chip solid electrolytic capacitor thereafter is as described above.

When the connection strength between the cathode layer 3 and the cathode lead terminal 5 was examined for the chip-shaped solid electrolytic capacitor thus formed before the packaging, it was three times or more that of the conventional conductive adhesive. It has been confirmed that the connection strength of No. 1 was obtained and the variation was more than half.

Furthermore, when mechanical stress was applied by a drop test before packaging and packaging was performed and the electrical characteristics were examined, it was found that about 1% of the oven mode occurred in the products using the conventional conductive adhesive. None of the products of the invention occurred.

Further, according to the present invention, it is not necessary to apply a conductive adhesive, to dry it, and to check the connection strength, and a connection state of sufficient quality can be obtained only by the step of melting the solder plating. It was possible to simplify.

In the present invention, the high-melting-point solder plating is partially formed on the low-melting-point solder plating. However, the low-melting-point solder plating obtained by partially plating the high-melting-point solder plating directly on the base material is exposed after the exterior process with the resin. Needless to say, the same effect can be obtained by applying it to the cathode lead terminal.

Further, the high melting point solder referred to in the present invention means a solder having a melting point higher than the mounting temperature of the chip solid electrolytic capacitor, and usually a solder having a melting point of 230 ° C. or higher. On the contrary, the low melting point solder is a solder which is sufficiently melted at a mounting temperature or lower, and usually indicates a solder having a melting point of 220 ° C. or lower.

〔The invention's effect〕

As described above, the present invention has the following effects by using the high melting point solder for connecting the cathode layer and the cathode lead terminal and by preliminarily providing the high melting point solder on the lead frame by partial plating.

(1) The connection between the cathode layer and the cathode lead terminal can be strengthened.

(2) Similarly, variations in connection can be reduced.

(3) The process can be simplified and the cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a side sectional view of a chip solid electrolytic capacitor of one embodiment of the present invention, FIG. 2 is a front view of a lead frame in which positive and negative electrode lead terminals are continuously formed, and FIG.
(C) is a perspective view of the lead frame before forming the positive and negative electrode lead terminals, (a) is before plating, (b) is after low melting point solder plating, (c) is after high melting point solder plating FIG. 4 is a side sectional view of an example of a conventional chip solid electrolytic capacitor. 1 ... Capacitor element, 2 ... Anode lead, 3 ... Cathode layer, 4 ... Anode lead terminal, 5 ... Cathode lead terminal, 6
…… High melting point solder, 7 …… Resin, 8 …… Lead frame,
9 ... Support plate, 10 ... Base material, 11 ... Low melting point solder plating,
12 …… High melting point solder plating, 13 …… Conductive adhesive.

Claims (2)

(57) [Claims] 1. A step of forming a capacitor element comprising an anode lead set up on one end surface and a cathode layer formed on the surface, and an anode lead terminal is electrically conductively fixed to the anode lead, A method of manufacturing a chip solid electrolytic capacitor, comprising: a step of electrically fixing a cathode lead terminal to a cathode layer; and a step of resin-encapsulating the capacitor element with the anode lead terminal and the cathode lead terminal fixed, wherein the cathode When fixing the layer and the cathode lead terminal, by using a cathode lead terminal having a high melting point solder having a melting point of 230 ° C. or higher pre-plated in a portion to be fixed to the cathode layer, by melting and resolidifying the high melting point solder, A method for manufacturing a chip solid electrolytic capacitor, characterized in that the cathode layer and the cathode lead are fixed to each other. 2. A cathode lead terminal having a structure in which a base material is covered with a solder having a melting point lower than that of the high melting point solder, and the high melting point solder is formed on the low melting point solder as the cathode lead terminal. The method for producing a chip-shaped solid electrolytic capacitor according to claim 1, which is used.