JP2669780B2 - Silicon thin film transistor structure and active matrix type liquid crystal display device using the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polycrystalline silicon thin film transistor structure used in, for example, an active matrix type liquid crystal display device.

[0002]

2. Description of the Related Art In recent years, a polycrystalline silicon thin film transistor structure has been used in an active matrix type liquid crystal display device, an image sensor, etc. mainly because it can be formed on an insulating substrate. Of these,
FIG. 2 shows a basic configuration of an active matrix type liquid crystal display device.
It is shown in the block diagram. The active matrix type liquid crystal display device of FIG. 2 includes a source line driving circuit 201 and a gate line driving circuit 202 each including a thin film transistor circuit,
At least the pixel matrix 203 is formed on the same transparent insulating substrate 204. The pixel matrix 203 includes a plurality of source lines X1, X2, X3 ... Connected to the source line driving circuit 201 and a gate line driving circuit 2
, A plurality of gate lines Y1, Y2, Y3 ...
And a plurality of pixels P11, P12, ... Formed at each intersection of these gate lines and source lines, and each pixel P11, P12.
.. Have a thin film transistor 205 and a liquid crystal cell 206. The liquid crystal cell 206 has a thickness of several μm with the transparent insulating substrate 204.
The liquid crystal is sandwiched between the counter substrate and the counter substrate arranged at a distance of m.

A polycrystalline silicon thin film transistor provided in each pixel of an active matrix type liquid crystal display device is
Like a general semiconductor device, it is manufactured using a step of depositing a semiconductor thin film or a metal thin film, a patterning step, and an impurity introducing step. In each of these steps, in the patterning step, a photosensitive material is applied on the thin film formed in the deposition step, and after selective exposure, either the unexposed portion or the exposed portion of the photosensitive material is removed. By patterning the thin film by exposing the thin film and removing the thin film in the exposed portion. At this time, since a normal active matrix type liquid crystal display device has an extremely large area as compared with other semiconductor devices, it is known that it is difficult to perform selective exposure uniformly and accurately. for that reason,
There are used exposure methods such as a divided exposure method in which an area is divided into several areas and selective exposure is performed, and a printing method in which an ink that blocks light is printed on a photosensitive material and then collectively exposed. In particular, in the printing method, since it is possible to pattern the ink in a large area all at once, the throughput is good, and it is possible to handle the process with a relatively inexpensive device as compared with the divided exposure method. Research has been advanced in recent years because of its advantages.

[0004]

However, the greatest drawback of this printing method is that the pattern accuracy and the uniformity of the pattern are poor compared to the divided exposure method. FIG. 3 shows an example of a polycrystalline silicon thin film transistor structure patterned by applying this printing method. FIG. 3 shows a pixel transistor of an active matrix type liquid crystal display device using a polycrystalline silicon thin film transistor.
FIG. 3A is a diagram showing a pixel transistor that is ideally patterned. In the figure, reference numeral 301 denotes a gate electrode, and 302 denotes a polycrystalline silicon thin film forming the source portion 14 , the drain portion 16 and the channel portion 18 . Thus, the gate electrode 301 and the source
Section 14, a drain section 16 and a channel section 18.
Each of the polycrystalline silicon thin film transistors 20, 20 ,.
・ Multiple polycrystalline silicon thin film transistors are arranged in series.
By forming the transistor structure, it is possible to reduce the leakage current mainly from the liquid crystal cell through the polycrystalline silicon thin film transistor at the time of non-selection, and this is a commonly used design method. At this time, since each gate interval L is the closest packing, it is desirable to design it between the minimum lines that can be patterned by the printing method.

On the other hand, when the printing method is actually applied, patterning is performed on a large area at once, so that the uniformity of the pattern is destroyed depending on the location due to the problem of variation.
There will be some places where the minimum distance between lines cannot be reproduced.
FIG. 3B shows this state. Here, the minimum line spacing between the gates of the gate electrode 301 'is not maintained, and the channel portion under the gate electrode is short-circuited, which eventually results in one transistor. From this, it can be said that a general pixel transistor pattern design is not suitable for a patterning method in which the dimensional variation of the printing method is large.

It is an object of the present invention to provide a polycrystalline silicon thin film transistor structure which can be manufactured by a patterning method such as a printing method which has a large dimensional variation and can be applied to an active matrix type liquid crystal display device or the like.

[0007]

A silicon thin film transistor structure of the present invention comprises a plurality of thin film transistors each having a gate electrode and a polycrystalline silicon thin film forming a source part, a drain part and a channel part. , A silicon thin film transistor structure formed by connecting a gate line connecting each of the gate electrodes and a polycrystalline silicon thin film wiring connecting each of the source part and the drain part,

At least one of the gate line and the polycrystalline silicon thin film wiring has a wavy shape, and the gate line and the polycrystalline silicon thin film wiring intersect at a position (non-bent portion) excluding a bent portion of the waveform, A thin film transistor is formed at the intersection. At this time, the thin film transistor is formed
Bending parts are parallel to each other with the bending part in between.
Not formed.

The silicon thin film transistor structure of the present invention is used in an active matrix type liquid crystal display device as an active element of a pixel portion.

The silicon thin film transistor structure of the present invention is used as a drive circuit in an active matrix type liquid crystal display device.

[0011]

In the polycrystalline silicon thin film transistor structure using the present invention, even if the minimum patterning line spacing varies depending on the location, the channel portions of a plurality of adjacent thin film transistors are hardly short-circuited. Therefore, the polycrystalline silicon thin film transistor can be reliably formed regardless of the patterning accuracy. Further, even if some short circuit occurs, the channel width of the short circuit portion can be suppressed to the minimum, so that the resistance value of this short-circuited channel portion is larger than the resistance value of the source portion and the drain portion. It operates the same as the one that is not short-circuited.

[0012]

Embodiments of the present invention will be described below. FIG.
FIG. 3 is a diagram illustrating an embodiment in which the present invention is applied to a pixel transistor of an active matrix type liquid crystal display device. FIG. 1A is a diagram showing a case where ideal patterning is completed. FIG. 1B is a diagram showing a case where the minimum distance between the gate electrodes cannot be maintained due to variation in dimensional accuracy.
In the figure, reference numerals 101 and 101 'denote gate lines, and 102 denotes a source portion 14, a drain portion 16 and a channel portion 18.
2 shows a polycrystalline silicon thin film wiring composed of a polycrystalline silicon thin film that constitutes a. The gate line 101 functions as a gate electrode at the intersection 12, and the source part 14, the drain part 16 and the channel part 18 form a polycrystalline silicon thin film transistor 20. Each gate electrode is connected by one gate line, and each source portion 14 and drain portion 16 is connected to the polycrystalline silicon thin film wiring 10.
By connecting the plurality of polycrystalline silicon thin film transistors 20 in series, one polycrystalline silicon thin film transistor structure is formed. Also, L
Is the intersection of the gate line 101 and the polycrystalline silicon thin film wiring 102, and the bent portion 10 of the polycrystalline silicon thin film wiring 102.
It shows the distance to.

In this embodiment, as shown in FIG. 1A, the gate line 101 and the polycrystalline silicon thin film wiring 102 are formed in a wavy shape, and the positions ( excluding the bent portions 10, 10, ... non-bent portions 22 and 22, the gate line 10 in ...)
1 and the polycrystalline silicon thin film wiring 102 intersect, and thin film transistors are formed at the intersections 12, 12, ....
Further, each non-bent portion 2 adjacent to each other with the arbitrary bent portion 10 interposed therebetween.
The two are formed so as not to be parallel. For example, figure
In 1 (a), the non-bending portion 22b extends over the non-bending portion 22a.
It is not parallel to the non-bent portion 22c. A printing method or the like can be applied to the patterning step of this formation. Now, this thin film
In order to turn on the transistor structure, the gate line 101 is turned on.
And current direction arrow 103 for charging, and its
The direction of the current flowing through the polycrystalline silicon thin film wiring 102 at this time is indicated by an arrow 104. Here, the leftmost thin film transistor 2
0a, the current direction 10 of the gate line 101 is different from the current direction 104 of the polycrystalline silicon thin film wiring 102.
3 runs from right to left. Similarly, regarding the second thin film transistor 20b from the left end, the current direction 103 of the gate line 101 runs from left to right with respect to the current direction 104 of the polycrystalline silicon thin film wiring 102. That is, in the adjacent thin film transistors, the current direction 103 of the gate line is opposite to the current direction 104 of the polycrystalline silicon thin film wiring. Similarly, this relationship holds between the thin film transistors. At this time, the distance of each intersection each other between the gate electrode lines 101 polycrystalline silicon thin-film wiring 102 takes a larger distance than at least between patterning the minimum line.

With the structure of this embodiment, the polycrystalline silicon thin film transistor can be surely formed even in the case of using the manufacturing process having the patterning process in which it is difficult to make the dimensional accuracy uniform. . Here, the case where the dimensional accuracy is poor and the minimum distance between lines cannot be maintained will be described with reference to FIG. Reference numeral 1 in FIG.
01 'represents a gate line as in (a). In the pattern of the gate line 101 'in which the minimum line spacing cannot be maintained, the portion where the pattern exists is formed in the narrow angle portion of the mountain and valley, and the portion where the pattern does not exist is formed in the wide angle portion. In other words, the pattern is rounded to eliminate sharp corners. At this time, since the shortest distance between the channel portions of the thin film transistors adjacent to each other, that is, the intersection portion 12 between the gate line 101 ′ and the polycrystalline silicon thin film wiring 102 is (√2 × L), it is at least larger than the minimum distance between the lines. There is almost no short circuit between the channels. Therefore, the thin film transistors are not short-circuited and can function reliably. Here, by forming the gate line 101 and the polycrystalline silicon thin film wiring 102 in a corrugated shape, the narrow-angle portion becomes about 90 degrees, so the gate line 10
It is possible to configure a plurality of thin film transistors connected in series with a minimum area without reducing the distance between the lines.

It will be described below that the polycrystalline silicon thin film transistor structure using the present invention sufficiently functions even when the minimum line spacing locally becomes larger than the originally designed value. For example, the minimum line interval at the narrow angle portion is
It is assumed that the channel portion is shorted by becoming larger than (√2 × L). In this case, when the resistance value of the short-circuited portion is larger than the resistance values of the source portion and the drain portion of the thin film transistor, the short-circuited portion does not substantially function as a short circuit, and eventually the thin film transistors are separated from each other. It works without any change.

Further, as shown in FIG. 4, the gate line 101
It is also possible to form the polycrystal silicon thin film wiring 102 in a straight line shape by forming a wavy shape. In this case, the gate line 101 and the polycrystalline silicon thin film wiring 102 intersect at a position other than the bent portions 10, ... Of the gate line 101, and a thin film transistor is formed at this intersection 12. With this structure, since the polycrystalline silicon thin film wiring 102 is linear, its design and manufacture can be further facilitated. In addition,
In this example, the gate line 101 has a wavy shape and the polycrystalline silicon thin film wiring 102 has a straight line. However, the gate line 101 can have a linear shape and the polycrystalline silicon thin film wiring 102 can also have a wavy shape.

As described above, even in the manufacturing process including the patterning process in which the dimensional accuracy varies greatly,
The polycrystalline silicon thin film transistor structure can be surely obtained. In addition, by using this embodiment for an active matrix type liquid crystal display device using a polycrystalline silicon thin film transistor as a pixel transistor, it is possible to reliably reduce the leak current of the pixel transistor and to escape the voltage applied to the liquid crystal cell. It is possible to obtain a high-quality liquid crystal display device without crosstalk or pixel unevenness.

Although the embodiment in which the present invention is applied to the pixel transistor of the active matrix type liquid crystal display device has been described above, the present invention relates to a polycrystalline silicon thin film transistor device which constitutes a drive circuit of the active matrix type liquid crystal display device. Can also be applied. Similarly, it can be easily applied to a drive circuit of an image sensor using a polycrystalline silicon thin film transistor device, a static RAM, or the like. Further, by using the present invention, it is possible to realize a large-area polycrystalline silicon thin film transistor structure of 20 inches or more in a research stage.

[0019]

In the polycrystalline silicon thin film transistor structure using the present invention, defects due to patterning in the thin film transistor portion can be eliminated, so that a polycrystalline silicon thin film transistor structure with high yield and high reliability can be realized. You can Further, in the active matrix type liquid crystal display device using the silicon thin film transistor structure of the present invention, since the leak current of the pixel transistor provided in each pixel can be made substantially uniform, there is no crosstalk or display unevenness. It is possible to obtain a quality image.

[Brief description of the drawings]

1A and 1B are diagrams for explaining an embodiment of the present invention, FIG. 1A is a schematic plan view showing ideal patterning, and FIG. 1B is a patterning when dimensional accuracy varies. It is a schematic plan view showing.

FIG. 2 is a schematic diagram for explaining the configuration of an active matrix type liquid crystal display device using a conventional polycrystalline silicon thin film transistor structure.

FIG. 3 shows a part of a conventional polycrystalline silicon thin film transistor structure, FIG. 3 (a) is a schematic plan view showing ideal patterning, and FIG. 3 (b) shows a case where dimensional accuracy varies. FIG. 3 is a schematic plan view showing patterning of the first embodiment.

FIG. 4 is a schematic view showing a part of a silicon thin film transistor structure according to an embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Bending part 12 Intersection part 101, 101 'Gate line 102 Polycrystalline silicon thin film wiring 103 Current direction of gate line 101 104 Current direction of polycrystalline silicon thin film wiring 102 Line distance between gate lines 201 Source line driving circuit 202 Gate line Drive circuit 203 Pixel matrix 204 Transparent insulating substrate 205 Thin film transistor 206 Liquid crystal cell X1, X2, X3 Source line Y1, Y2, Y3 Gate line P11, P12, P13 to P33 Pixel 301, 301 'Gate electrode 302 Polycrystalline silicon thin film wiring

Claims (3)

(57) [Claims] 1. A plurality of thin film transistors, each having a gate electrode and a polycrystalline silicon thin film forming a source part, a drain part and a channel part, are provided with a gate line connecting each gate electrode and a plurality of gate lines. In a silicon thin film transistor structure in which a source portion and a drain portion are connected by a polycrystalline silicon thin film wiring, at least one of the gate line and the polycrystalline silicon thin film wiring is corrugated, and the bent portion of the waveform is Except for non-bent portions, the gate line and the polycrystalline silicon thin film wiring intersect, a thin film transistor is formed at the intersecting portion, and adjacent non-bent portions are not parallel to each other. body. 2. An active matrix type liquid crystal display device, wherein the silicon thin film transistor structure according to claim 1 is used as an active element of a pixel portion. 3. An active matrix type liquid crystal display device using the silicon thin film transistor structure according to claim 1 in a drive circuit.