JP2656303B2 - Digital protection relay - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial application field) The present invention relates to a digital protection relay for detecting an accident in a power system and protecting the power system.

(Prior Art) In a digital protection relay for protecting a power system, an electric quantity of the power system is sampled and digitized, and an accident is detected by performing a predetermined operation based on the digitized data. ing. FIG. 6 is a diagram showing a configuration of a conventional digital protection relay device.

In FIG. 6, the amount of electricity in the system is sampled at regular intervals (hereinafter referred to as one sampling period). Therefore, the predetermined operation needs to be completed within one sampling. For this reason, the following method has conventionally been used as a method of measuring the execution time of a predetermined operation (hereinafter, referred to as an operation time).

From the end of a given operation to the start of the next operation,
The counter is incremented by software, and the remaining time from the end of the operation to the start of the next operation is measured. FIG. 7 is a diagram showing the remaining time. When the time 72 of the arithmetic unit is selected as shown in the figure within one sampling time, the remaining time is a period indicated by 73.

FIG. 8 is a diagram showing software processing for measuring the remaining time. As shown in the figure, a predetermined calculation is performed in step 81, and after completion of the calculation, the counter for measuring the remaining time is cleared in step 82, and 1 is set in steps 83 and 84.
Counting is performed until the sampling time is completed, and after completion, the value is stored in step 85. The surplus time in this case can be obtained by multiplying the counter value by an appropriate constant.

(Problem to be Solved by the Invention) In the case of the conventional device described above, the CPU performs the count-up process of the counter during the remaining time. Therefore, it is not possible to perform another process, for example, a process such as a self-diagnosis unrelated to the sampling data.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to provide a digital protection relay device capable of measuring an operation time and efficiently operating a CPU.

[Configuration of the Invention] (Means for Solving the Problems) The configuration for achieving the above object will be described. The present invention takes a sine wave AC of an electric power system as an input and samples the sine wave AC at predetermined time intervals. Then, after converting the sampled value into digital data, in a digital protection relay device which performs a predetermined protection operation in the central processing unit, when the central processing unit starts the operation, a signal for stopping externally is provided. A stop signal output means for outputting a start signal output means for outputting a signal for starting to the outside at the end of the operation, and a timer that counts at a predetermined cycle triggered by the reception of the start signal, A counter that stops a timer upon receipt of the stop signal and counts the number of counts in between, and a display unit that calculates the sum of the plurality of counts and displays the sum to the outside Configuration was.

(Operation) First, the timer is reset by a start signal output when the central processing unit finishes the operation, and starts counting. This counting is performed until the central processing unit starts calculation and outputs a stop signal. Therefore, the remaining time is determined by the count number of the timer. In addition,
In the case of a digital protection relay, the sum of a plurality of count numbers is calculated and displayed externally in consideration of the case where a predetermined relay operation is divided into a plurality of samplings and processed.

(Example) Hereinafter, an example is described with reference to drawings.

FIG. 1 is a configuration diagram of an embodiment of a CPU board applied to a digital protection relay device according to the present invention.

In FIG. 1, reference numeral 11 denotes a CPU board to which a CPU 12, a timer 13, and a memory 14 are connected via a bus 15. Timer 13
Is a hardware timer that counts up at regular intervals, and clears the counter and starts and stops counting up according to a control signal 16 from the CPU 12. Once the timer 13 receives the command signal for starting counting up, the timer 13 continues counting up until receiving the next command signal for stopping.

Therefore, while the timer 13 is operating, the CPU 12 can perform another process other than the timer process. It should be noted that the surplus time of the predetermined calculation can be measured by the start and stop processing of the timer 13.

FIG. 2 is a flowchart showing a time measurement procedure.
First, when the conversion of the electric quantity of the system into digital data is completed, the CPU starts a predetermined relay operation. At the beginning of this operation, a count-up stop signal is sent to the timer. The timer receiving this signal stops counting up (step 21). Thereafter, the count value of the timer is read (step 22), and the sum of the count values is obtained (described later) and stored in a memory (steps 23 and 24).
Thereafter, when the CPU completes the predetermined relay operation processing (step 25), the count of the timer is cleared (step 26), and then a count-up start signal is sent to the timer. In response to this signal, the timer continues counting up at regular intervals irrespective of the operation of the CPU (step 27).

FIG. 3 is a diagram showing the relationship between the arithmetic processing and the count value of the timer. The point A in the figure is the start point of the relay operation processing,
The point B is the end point of the relay operation processing. The counter starts counting up at time B and stops counting at time A. Therefore, the count value of the counter becomes a value proportional to the time from the time point B to the time point A, that is, the remaining time for calculation. The actual remaining time is obtained by multiplying the count value by the time required for the timer to count up. For example, when the timer counts up every 0.5 μs, if the count value is 100, the operation time is 1
It is calculated as 00 × 0.5 = 50 μs.

The calculation time over is detected based on the remaining time calculated according to the above procedure. In a digital protection relay, a predetermined relay operation is divided into a plurality of samplings and processed.

FIG. 4 is a diagram showing the concept of the operation time when the relay operation is performed by dividing into a plurality of samplings. The figure shows a case where the predetermined calculation is performed in three samplings. As a criterion for determining that the calculation time is over, even if the relay calculation in one sampling during three samplings exceeds one sampling time, the predetermined relay calculation is not performed. If it is completed within three samplings, it indicates that there is no problem. That is, it is considered that the remaining time between the three samplings should not be zero. Therefore, the sum of the three counts of the count value of the timer is calculated and stored in the memory. This sum can be added to an external display device (eg, LE
D display), it is possible to easily determine whether the calculation time is over.

When the predetermined relay operation is divided into N samplings, the same effect can be obtained by calculating the sum of the count values for N samplings.

According to the above-described embodiment, the CPU can perform another process (for example, a self-diagnosis process or the like) within the remaining time until the relay calculation for one sampling is completed and the next relay calculation is started. An efficient program can be created.

FIG. 5 is a block diagram of another embodiment of the present invention. In this embodiment, there are three CPU boards. Each CPU board 51, 52, 53
Has a surplus time measuring function similarly to the above embodiment, and stores a count value of the surplus time in a memory.
Each CPU can read the contents of the memory on another CPU board.

Therefore, the CPU of the CPU board 51 reads the remaining time count value stored in the memories of the other CPU boards 52 and 53, and calculates the sum between predetermined samplings. The sum is displayed on an external display device (for example, an LED display) as necessary. Also,
If the sum of the remaining time is zero, it is determined that the calculation time is over, and an external display or the like is performed. Thus, in a protective relay device in which a plurality of CPUs operate simultaneously, one CPU can monitor the operation time of another CPU. Note that the same effect can be obtained even when the number of CPU boards is two or four or more. The timer for measuring the remaining time is CP
The same function as that of the above embodiment can be obtained by using not only a timer provided outside but also a timer built in the CPU chip and counting with the same clock as the CPU.

[Effects of the Invention] As described above, according to the present invention, a timer separate from the CPU is provided on the CPU board, and the counter is cleared and count-up is started and stopped by a signal from the CPU. As a result, the operation time can be measured and the operation time can be monitored without stopping the function of the protective relay, and the CPU performs another process within the remaining time, thereby increasing the number of operations. A function can be provided, and an efficient protective relay device can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of a CPU board applied to a digital protection relay device according to the present invention, FIG. 2 is a diagram showing software processing for measuring a remaining time, and FIG. FIG. 4 is a diagram showing the relationship between the calculation time and the count value, FIG. 4 is a diagram showing the concept of the operation time when the relay operation is performed by dividing the sampling into a plurality of samplings, FIG.
FIG. 6 is a diagram showing a configuration example of a conventional digital protection relay device, FIG. 7 is a diagram showing a relationship between one sampling time and an extra time, and FIG. 8 is a diagram showing software processing for measuring operation time according to the prior art. FIG. 11 CPU board, 12 CPU 13 Timer, 14 Memory 15 Bus

Claims (2)

(57) [Claims] 1. A sine wave alternating current of a power system is input, the sine wave alternating current is sampled at predetermined time intervals, and this sampled value is converted into digital data. Then, a predetermined protection operation is performed by a central processing unit. In the digital protection relay, a stop signal output means for outputting a stop signal to the outside when the central processing unit starts the calculation, and a start signal to the outside at the end of the calculation. A start signal output means for outputting, a counter for starting a timer that counts at a predetermined cycle upon receiving the start signal, stopping the timer upon receiving the stop signal, and counting a count during the counter; And a calculating means for calculating the operation time or the remaining time based on the count number of the digital protection relay device. 2. The digital protection relay device according to claim 1, wherein said calculating means calculates an operation time or a remaining time based on a sum of a plurality of count numbers of said counter.