JPH02267642A - Measuring device for time exclusive for cpu - Google Patents

Measuring device for time exclusive for cpu

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Publication number
JPH02267642A
JPH02267642A JP1088010A JP8801089A JPH02267642A JP H02267642 A JPH02267642 A JP H02267642A JP 1088010 A JP1088010 A JP 1088010A JP 8801089 A JP8801089 A JP 8801089A JP H02267642 A JPH02267642 A JP H02267642A
Authority
JP
Japan
Prior art keywords
time
cpu
task
exclusive
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1088010A
Other languages
Japanese (ja)
Inventor
Kimio Sato
佐藤 公夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP1088010A priority Critical patent/JPH02267642A/en
Publication of JPH02267642A publication Critical patent/JPH02267642A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To easily and accurately measure the time exclusive for a CPU for an optional module of an optional task by excluding an interrupted period of execution of the CPU when the integrated time is calculated. CONSTITUTION:A present time register 1 counts the time T1 in a unit sufficiently shorter than the CPU time of a task to be measured. A task switch detecting device 2 detects the switch exclusive for a CPU for a task working under the control of a multi-operating system and produces the interruptions in response to the interruption and the restart of execution respectively. A measurement start register 4 holds the CPU exclusive start time T2, and a measured time integrating register 5 integrates and holds the measured time T3. A CPU exclusive time measurement processing part 3 performs the measurement processes while using the registers 1, 4 and 5 in each prescribed timing. As a result, the time exclusive for CPU can be easily and accurately measured for an optional module of an optional task.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) この発明は計算機のリアルタイムオペレーティングシス
テム化で動作する任意のタスクの任意のモジュールのC
PU専有時間を測定するCPU専有時間?fPl定装置
に関する。
[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) This invention provides a C
CPU exclusive time to measure PU exclusive time? This invention relates to an fPl constant device.

(従来の技術) リアルタイムオペレーティングシステムのCPUを利用
して種々の情報制御処理システムを構築する場合、CP
U負荷予測及び負荷対策のために任意モジュールの実行
時間(CPU専有時間)を正確に知る必要がある。
(Prior art) When constructing various information control processing systems using the CPU of a real-time operating system, the CPU
In order to predict the U load and take countermeasures against the load, it is necessary to accurately know the execution time (CPU exclusive time) of any module.

従来、このためには、下記の2通りの方法があった。Conventionally, there have been two methods for this purpose:

(1)該当モジュールのステップ数と命令語の実行時間
により算出する。
(1) Calculated based on the number of steps of the relevant module and the execution time of the instruction word.

(2)該当モジュールの実行時間をn回実測し、その平
均値を求める。
(2) Measure the execution time of the relevant module n times and find the average value.

(発明が解決しようとする課題) しかしながら、上述した(1)の方法の場合には、該当
モジュールのステップ数を求めるために膨大な時間を必
要とし、事実上不可能に近いものであった。
(Problem to be Solved by the Invention) However, in the case of the method (1) described above, it takes an enormous amount of time to obtain the number of steps of the corresponding module, and it is virtually impossible.

また、(2)の方法の場合には、該当モジュール実行中
に入力/出力及びその他の理由でタスク切換が発生する
と、実行時間は測定できても、CPU専有時間を測定す
ることができなかった。
In addition, in the case of method (2), if a task switch occurs due to input/output or other reasons during the execution of the corresponding module, although the execution time can be measured, the CPU exclusive time cannot be measured. .

この発明は、上述の問題点に鑑みなされたものであり、
その目的とするところは、任意タスクの任意モジュール
のCPU専有時間を容易かつ高精度に計測することがで
きるCPU専有時間1pl定装置を提供することにある
This invention was made in view of the above problems,
The purpose is to provide a CPU exclusive time 1pl determination device that can easily and accurately measure the CPU exclusive time of any module of any task.

[発明の構成] (課題を解決するための手段) この発明は上記の目的を達成するために、測定対象タス
クのCPU専有時間よりも充分に短い単位で時刻(T1
)を計時する現時刻レジスタと、前記タスクのCPUに
よる実行中断及び実行再開に応答して割込みを発生する
手段と、前記タスクにおける測定開始命令の実行により
起動され、積算時間レジスタの内容(T3)を初期化す
るとともに、測定開始レジスタの内容(T2)を現時刻
レジスタの内容(T1)で書き替える手段と、 前記実行再開割込みが発生する毎に起動され、積算時間
レジスタの内容(T3)を((T1.−T2)+T31
で書き替える手段と、 前記実行再開割込みが発生する毎に起動され、測定開始
レジスタの内容(T2)を現時刻レジスタの内容(T1
)で書き替える手段と、前記タスクにおける測定終了命
令の実行により起動され、積算時間レジスタの内容(T
3)を{(T1−72)+T3)で書き替えると共に、
書き替え後の積算時間レジスタの内容(T3)を当該タ
スクのCPU専有時間として出力する手段とを具備する
ことを特徴とするものである。
[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, the present invention calculates time (T1) in units sufficiently shorter than the CPU exclusive time of the task to be measured.
), a means for generating an interrupt in response to execution interruption and resumption of execution by the CPU of the task, and a means for generating an interrupt in response to execution of a measurement start instruction in the task, and the contents of the cumulative time register (T3); and a means for rewriting the contents of the measurement start register (T2) with the contents of the current time register (T1); ((T1.-T2)+T31
means for rewriting the contents of the measurement start register (T2) with the contents of the current time register (T1), which is activated every time the execution restart interrupt occurs, and
) and the execution of the measurement end instruction in the task, and the contents of the cumulative time register (T
3) is rewritten as {(T1-72)+T3), and
The present invention is characterized by comprising means for outputting the content (T3) of the accumulated time register after rewriting as the CPU exclusive time of the task.

(作用) このような構成によればタスク切換に関係なく任意のタ
スクの任意のモジュールのCPU専有時間を高精度に計
測することができる。
(Operation) According to such a configuration, the CPU exclusive time of any module of any task can be measured with high precision regardless of task switching.

(実施例)第2図は、本発明に係るCPU専有時間測定
装置の一実施例を示すブロック図である。
(Embodiment) FIG. 2 is a block diagram showing an embodiment of the CPU exclusive time measuring device according to the present invention.

同図において、現時刻レジスタ1は測定対象タスクのC
PU時間よりも充分に短い単位(この例では10μs)
で時刻(T1)を計時するものである。
In the figure, current time register 1 is C of the task to be measured.
Unit that is sufficiently shorter than the PU time (10 μs in this example)
This is to measure the time (T1).

タスク切換検出装置2は、マルチオペレーティングシス
テム下で動作するタスクのCPU専有切換を検出し、実
行中断及び実行再開にそれぞれ応答して割込みを発生す
るものである。
The task switching detection device 2 detects CPU exclusive switching of tasks operating under a multi-operating system, and generates interrupts in response to execution interruption and execution resumption, respectively.

測定開始レジスタ4は、CPU専有開始時刻(T2)を
保持するものである。
The measurement start register 4 holds the CPU exclusive start time (T2).

測定時間積算レジスタ5は、計測時間(T3)を積算及
び保持するものである。
The measurement time integration register 5 integrates and holds the measurement time (T3).

CPU専有時間測定処理部3は、所定のタイミングで上
記各レジスタ1,4.5を使用しつつ測定処理を行なう
ものである。
The CPU exclusive time measurement processing unit 3 performs measurement processing using each of the registers 1, 4.5 at predetermined timings.

尚、CPU専有時間測定処理部3は、独立したマイクロ
プロセッサ、ハードウェア等で構成してもよいし、専有
時間測定対象となるCPUの一部を使用して構成しても
よい。
Note that the CPU exclusive time measurement processing section 3 may be configured with an independent microprocessor, hardware, etc., or may be configured using a part of the CPU that is the subject of the exclusive time measurement.

次に、第2図はCPU専有時間測定処理部3の動作を示
すフローチャートであり、以下、このフローチャート及
び第3図のタイムチャートを参照しながら、本実施例装
置の動作を系統的に説明する。
Next, FIG. 2 is a flowchart showing the operation of the CPU exclusive time measurement processing section 3. Hereinafter, the operation of the apparatus of this embodiment will be systematically explained with reference to this flowchart and the time chart of FIG. .

いま仮に、リアルタイムオペレーティングシステム下で
動作するタスクAの被計測モジュールのCPU専有時間
の測定を行なうものと仮定する。
Assume now that the CPU exclusive time of a measured module of task A operating under a real-time operating system is to be measured.

タスクAによる計測開始命令の実行が行なわれると、第
2図(a)に示されるように、積算時間゛レジスタ5の
内容(T3)を初期化するとともに(ステップ201)
、測定開始レジスタ4の内容(T2)を現時刻レジスタ
1の内容(T1)で書き替える処理が行なわれる(ステ
ップ202)。
When the measurement start command is executed by task A, as shown in FIG. 2(a), the contents of the cumulative time register 5 (T3) are initialized (step 201).
, a process is performed in which the contents (T2) of the measurement start register 4 are rewritten with the contents (T1) of the current time register 1 (step 202).

その後、タスク切換検出装置2において実行中断割込み
が発生する毎に、第2図(b)に示されるように、積算
時間レジスタ5の内容(T3)を{(T1−T2)+7
31で書き替える処理が行なわれる(ステップ203)
Thereafter, each time an execution interruption interrupt occurs in the task switching detection device 2, the contents (T3) of the cumulative time register 5 are changed to {(T1-T2)+7 as shown in FIG. 2(b).
31, the rewriting process is performed (step 203)
.

また、タスク切換検出装置2で実行再開割込みが発生す
る毎に、第2図(C)に示されるように、測定開始レジ
スタ4の内容(T2)を現時刻レジスタ1の内容(T1
)で書き替える処理が行なわれる(ステップ204)。
Furthermore, each time an execution restart interrupt occurs in the task switching detection device 2, the contents (T2) of the measurement start register 4 are changed to the contents (T1) of the current time register 1, as shown in FIG. 2(C).
) is performed (step 204).

そして、前記タスクにおける測定終了命令が実行される
と、第2図(d)に示されるように、積算時間レジスタ
5の内容(T3)を{(T1−T2)+T31で書き替
えるとともに(ステップ205)、書き替え後の積算時
間レジスタ5の内容(T3)を当該タスクのCPU専有
時間として出力する処理が行なわれる(ステップ206
)。
Then, when the measurement end instruction in the task is executed, as shown in FIG. ), a process is performed to output the content (T3) of the accumulated time register 5 after rewriting as the CPU exclusive time of the task (step 206).
).

このようにして得られた積算時間は、第3図において斜
線で示された部分の積算結果となり、すなわち、CPU
の実行中断期間は除外され、真にCPU専有時間と一致
することとなる。
The cumulative time obtained in this way is the cumulative result of the shaded part in FIG.
Excluding the execution suspension period, this truly matches the CPU exclusive time.

[発明の効果] 以上の説明で明らかなように、本発明装置によれば、タ
スク切換の有無に関係なく任意のタスクの任意のモジュ
ールのCPU専有時間を容易かつ高精度に計測すること
ができる。
[Effects of the Invention] As is clear from the above explanation, according to the device of the present invention, the CPU exclusive time of any module of any task can be easily and highly accurately measured regardless of whether or not task switching is performed. .

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係るCPU専有時間測定装置の一実施
例を示すブロック図、第2図は同装置の動作を示すフロ
ーチャート、第3図はCPUの実行状態を示すタイムチ
ャートである。 1・・・現時刻レジスタ 2・・・タスク切換検出装置 3・・・CPU専有時間測定処理部 4・・・測定開始時刻レジスタ 5・・・測定時間積算レジスタ 代二′人1′ゴー : J[’ 第1図
FIG. 1 is a block diagram showing an embodiment of the CPU exclusive time measuring device according to the present invention, FIG. 2 is a flowchart showing the operation of the device, and FIG. 3 is a time chart showing the execution state of the CPU. 1...Current time register 2...Task switching detection device 3...CPU exclusive time measurement processing unit 4...Measurement start time register 5...Measurement time integration register fee 2'Person 1'Go: J ['Figure 1

Claims (1)

【特許請求の範囲】[Claims] (1)測定対象タスクのCPU専有時間よりも充分に短
い単位で時刻(T1)を計時する現時刻レジスタと、 前記タスクのCPUによる実行中断及び実行再開に応答
して割込みを発生する手段と、 前記タスクにおける測定開始命令の実行により起動され
、積算時間レジスタの内容(T3)を初期化するととも
に、測定開始レジスタの内容(T2)を現時刻レジスタ
の内容(T1)で書き替える手段と、 前記実行再開割込みが発生する毎に起動され、積算時間
レジスタの内容(T3)を{(T1−T2)+T3}で
書き替える手段と、 前記実行再開割込みが発生する毎に起動され、測定開始
レジスタの内容(T2)を現時刻レジスタの内容(T1
)で書き替える手段と、 前記タスクにおける測定終了命令の実行により起動され
、積算時間レジスタの内容(T3)を{(T1−T2)
+T3}で書き替えると共に、書き替え後の積算時間レ
ジスタの内容(T3)を当該タスクのCPU専有時間と
して出力する手段と、 を具備することを特徴とするCPU専有時間測定装置。
(1) a current time register that measures time (T1) in units sufficiently shorter than the CPU exclusive time of the task to be measured; and means for generating an interrupt in response to interruption and resumption of execution by the CPU of the task; Means is activated by execution of a measurement start instruction in the task, and initializes the contents (T3) of the cumulative time register, and rewrites the contents (T2) of the measurement start register with the contents (T1) of the current time register; means for rewriting the contents (T3) of the cumulative time register with {(T1-T2)+T3}, which is activated each time an execution resumption interrupt occurs; The contents (T2) of the current time register (T1
), and is activated by the execution of the measurement end instruction in the task, and changes the contents of the cumulative time register (T3) to {(T1-T2)
+T3}, and means for outputting the content (T3) of the accumulated time register after rewriting as the CPU exclusive time of the task.
JP1088010A 1989-04-10 1989-04-10 Measuring device for time exclusive for cpu Pending JPH02267642A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1088010A JPH02267642A (en) 1989-04-10 1989-04-10 Measuring device for time exclusive for cpu

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1088010A JPH02267642A (en) 1989-04-10 1989-04-10 Measuring device for time exclusive for cpu

Publications (1)

Publication Number Publication Date
JPH02267642A true JPH02267642A (en) 1990-11-01

Family

ID=13930857

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1088010A Pending JPH02267642A (en) 1989-04-10 1989-04-10 Measuring device for time exclusive for cpu

Country Status (1)

Country Link
JP (1) JPH02267642A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5206171A (en) * 1990-12-17 1993-04-27 Her Majesty The Queen In Right Of Canada Programmable automated inoculator/replicator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5206171A (en) * 1990-12-17 1993-04-27 Her Majesty The Queen In Right Of Canada Programmable automated inoculator/replicator

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