JP2654565B2 - Driving circuit of liquid crystal device using nonlinear resistive film - Google Patents

Driving circuit of liquid crystal device using nonlinear resistive film

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Publication number
JP2654565B2
JP2654565B2 JP61165741A JP16574186A JP2654565B2 JP 2654565 B2 JP2654565 B2 JP 2654565B2 JP 61165741 A JP61165741 A JP 61165741A JP 16574186 A JP16574186 A JP 16574186A JP 2654565 B2 JP2654565 B2 JP 2654565B2
Authority
JP
Japan
Prior art keywords
signal
liquid crystal
drive circuit
circuit
display data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP61165741A
Other languages
Japanese (ja)
Other versions
JPS6321697A (en
Inventor
浩三 横山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP61165741A priority Critical patent/JP2654565B2/en
Publication of JPS6321697A publication Critical patent/JPS6321697A/en
Application granted granted Critical
Publication of JP2654565B2 publication Critical patent/JP2654565B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は表示装置、オプティカル・シャッタ等に用い
られる非線形抵抗膜による液晶素子の駆動回路に関し、
TNタイプの液晶素子駆動回路を利用した簡単な構成によ
る非線形抵抗膜による液晶素子の駆動回路に関する。
The present invention relates to a driving circuit for a liquid crystal element using a non-linear resistive film used in a display device, an optical shutter, and the like.
The present invention relates to a liquid crystal element driving circuit using a nonlinear resistance film with a simple configuration using a TN type liquid crystal element driving circuit.

〔発明の概要〕[Summary of the Invention]

非線形抵抗膜を用いた液晶素子の駆動回路において、
通常のTNタイプの液晶素子の駆動回路をそのまま利用し
て駆動したものであり、TNタイプの液晶素子の駆動回路
に表示データの反転回路と、1走査時間の半分を非選択
にする為の非選択信号発生回路を追加することにより構
成される。
In a driving circuit of a liquid crystal element using a non-linear resistance film,
It is driven using the drive circuit of a normal TN type liquid crystal element as it is. The drive circuit of the TN type liquid crystal element has a display data inversion circuit and a non-selection circuit for deselecting half of one scanning time. It is configured by adding a selection signal generation circuit.

〔従来の技術〕[Conventional technology]

非線形抵抗膜を利用した液晶素子の駆動方法は二通り
あり、すなわちTN液晶素子の駆動方法をそのまま利用し
た電圧平均化法と、表示等の状態により液晶層間電圧が
変動することを抑制した位相変調法とがある。従来はTN
液晶素子の駆動回路を利用してそのまま電圧平均化法で
駆動するか、コントローラ側の表示メモリに点灯データ
と点灯データの反転データを格納しておき、選択期間の
1/2期間に点灯データを、残り1/2期間を非選択期間にし
て点灯データの反転データを信号電極側の駆動回路より
出力して表示する位相変調法により非線形抵抗膜を用い
た液晶素子を駆動していた。前記位相変調法による駆動
方法では、表示メモリが増えるとともに、コントローラ
側の回路構成が大きくなりコストアップの原因になって
いた。
There are two methods of driving a liquid crystal device using a non-linear resistive film: a voltage averaging method that uses the driving method of a TN liquid crystal device as it is, and phase modulation that suppresses fluctuations in the liquid crystal interlayer voltage due to display and other conditions. There is a law. Conventionally TN
Drive by the voltage averaging method as it is using the liquid crystal element drive circuit, or store the lighting data and the inverted data of the lighting data in the display memory on the controller side, and
A liquid crystal element using a non-linear resistance film by the phase modulation method, in which the lighting data is output in the half period, and the inverted data of the lighting data is output from the drive circuit on the signal electrode side and displayed while the remaining half period is a non-selection period. Was driving. In the driving method based on the phase modulation method, the number of display memories is increased, and the circuit configuration on the controller side is increased, resulting in an increase in cost.

第3図に従来技術による非線形抵抗膜の液晶表示素子
の駆動回路を示す。10は信号電極駆動回路,20は走査電
極駆動回路,30は非線形抵抗膜による液晶表示素子,40は
駆動電源回路,50は表示データ,60はコントロール線,70
は電源である。
FIG. 3 shows a driving circuit for a liquid crystal display device having a nonlinear resistive film according to the prior art. 10 is a signal electrode drive circuit, 20 is a scan electrode drive circuit, 30 is a liquid crystal display element using a non-linear resistive film, 40 is a drive power supply circuit, 50 is display data, 60 is a control line, 70
Is the power supply.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

本発明は、非線形抵抗膜を用いた液晶素子の駆動回路
においてコントローラ側の表示メモリの増大及びコスト
アップ増の問題点を解決しようするものである。
An object of the present invention is to solve the problems of an increase in the number of display memories on the controller side and an increase in cost in a drive circuit of a liquid crystal element using a nonlinear resistance film.

〔問題点を解決するための手段〕[Means for solving the problem]

コントローラ側と非線形抵抗膜を用いた液晶素子の駆
動回路間に、表示データを反転させる表示データ反転回
路及び、上記表示データを反転させる信号を発生する非
選択信号発生回路を設ける。
A display data inverting circuit for inverting display data and a non-selection signal generating circuit for generating a signal for inverting the display data are provided between the controller and a driving circuit of a liquid crystal element using the non-linear resistance film.

〔実施例〕〔Example〕

非線形抵抗膜を用いた液晶素子を駆動表示する場合、
実効電圧の変動によるコントラストが変動してしまい表
示品質の劣化が問題とされていた。
When driving and displaying a liquid crystal element using a nonlinear resistance film,
The contrast fluctuates due to the fluctuation of the effective voltage, and deterioration of display quality has been a problem.

本発明は、実効電圧の変動を抑制させた液晶素子の駆
動回路を提供するものである。
The present invention provides a driving circuit for a liquid crystal element in which the fluctuation of the effective voltage is suppressed.

第1図に本発明による非線形抵抗膜を用いた液晶素子
の駆動回路の構成を示す。信号電極駆動回路は例えば、
SED1600FOA(諏訪精工舎製)を、走査電極駆動回路はSE
D1610FOA(諏訪精工舎製)をそれぞれ使用する。第2図
に第1図のタイムチャートを載せる。信号電極側ラッチ
信号(LOAD)は、一水平ラインごとに信号電極駆動回路
に表示データ(D3〜Dφ)をラッチさせると同時に、非
選択信号発生回路のJ/Kフリップフロップ2をトリガー
する。J/Kフリップフロップ2はJ,K端子をVccレベルに
接続されているためトグルフリップフロップとして動作
し、信号電極側ラッチ信号(LOAD)の立下り毎に第2図
のタイムチャートの非選択信号(1)を発生する。非選
択信号(1)が“L"レベルの時に、走査電極駆動回路の
非選択信号端子(▲▼)を駆動し、走査電極駆動
回路の出力(7)を非選択波形にする。又非選択信号
(1)は、表示データ反転回路へ行き非選択信号(1)
が“H"レベルの時に表示データ(D3〜Dφ)を反転させ
て信号電極駆動回路に行く。J/Kフリップフロップの反
転出力端子()と信号電極側ラッチ信号(LOAD)と
を、アンドゲート(3)に入力して走査電極側ラッチ信
号(5)を発生させ、走査電極駆動回路のシフトクロッ
ク端子(YSCL)を駆動する。フレーム信号(FRM)と走
査電極側ラッチ信号(5)が重なり合った時に、走査電
極側ラッチ信号(5)の立下り時点から、非線形抵抗膜
を用いた液晶表示素子(MSIパネル)のコモン電極Y1
ら順にYmまで駆動して行く。信号電極側ラッチ信号(LO
AD)は信号電極駆動回路のラッチ端子(LP)を駆動し、
信号電極側ラッチ信号(LOAD)の立下り時点で、クロッ
ク信号(CP)でシフトされた表示データ(D3〜Dφ)の
ラッチをして、MSIパネルのセグメント電極X1〜Xnを駆
動する。信号電極側ラッチ信号(LOAD)は、MSIパネル
の一水平ドット数(nドット)毎に発生する。他方走査
電極側ラッチ信号(5)は二水平ドット数毎に発生す
る。二水平ドット数の最初の一水平ドット期間は、第2
図のタイムチャートより明らかなように、非選択信号
(1)が“H"レベルなので信号電極表示データ(4)は
反転されて信号電極駆動回路に入力され二水平ドット数
の後半の期間に(非選択信号(1)が“L"レベルの時、
すなわち走査電極駆動回路の出力(7)が非選択波形の
期間)信号電極駆動回路の出力(6)に表れ、非選択信
号波形をMSIパネルに印加する。二水平ドット数の後半
の期間は、表示データ(D3〜Dφ)は反転されずにその
まま、信号電極駆動回路に入力されるので次の二水平ド
ット数の前半の期間(第2図タイムチャートの2より)
から正しく表示される。以後、非選択,選択状態を繰り
返して表示する。
FIG. 1 shows a configuration of a driving circuit of a liquid crystal element using a non-linear resistance film according to the present invention. The signal electrode drive circuit is, for example,
SED1600FOA (Suwa Seikosha) and scanning electrode drive circuit SE
Use D1610FOA (Suwa Seikosha). FIG. 2 shows the time chart of FIG. The signal electrode side latch signal (LOAD) causes the signal electrode drive circuit to latch the display data (D3 to Dφ) for each horizontal line and, at the same time, triggers the J / K flip-flop 2 of the non-selection signal generation circuit. The J / K flip-flop 2 operates as a toggle flip-flop because the J and K terminals are connected to the Vcc level, and each time the signal electrode side latch signal (LOAD) falls, the non-selection signal in the time chart of FIG. (1) is generated. When the non-selection signal (1) is at the “L” level, the non-selection signal terminal (▼) of the scan electrode drive circuit is driven, and the output (7) of the scan electrode drive circuit has a non-select waveform. The non-selection signal (1) goes to the display data inverting circuit and the non-selection signal (1)
Is at "H" level, the display data (D3 to Dφ) is inverted and goes to the signal electrode drive circuit. The inverted output terminal () of the J / K flip-flop and the signal electrode side latch signal (LOAD) are input to the AND gate (3) to generate the scan electrode side latch signal (5), and the shift of the scan electrode drive circuit is performed. Drive the clock terminal (YSCL). When the frame signal (FRM) and the scan electrode side latch signal (5) overlap, the common electrode Y of the liquid crystal display element (MSI panel) using the non-linear resistive film starts from the falling point of the scan electrode side latch signal (5). going to drive in order from 1 to Y m. Signal electrode side latch signal (LO
AD) drives the latch terminal (LP) of the signal electrode drive circuit,
In the fall time of the signal electrode side latch signal (LOAD), and the latch on the display data shifted by the clock signal (CP) (D3~Dφ), drives the segment electrode X 1 to X n of the MSI panel. The signal electrode side latch signal (LOAD) is generated for each horizontal dot number (n dots) of the MSI panel. On the other hand, the scanning electrode side latch signal (5) is generated every two horizontal dots. The first horizontal dot period of the two horizontal dots is the second horizontal dot period.
As is clear from the time chart of FIG. 7, since the non-selection signal (1) is at the "H" level, the signal electrode display data (4) is inverted and input to the signal electrode drive circuit, and during the latter half of the two horizontal dot count ( When the non-selection signal (1) is at “L” level,
That is, the output (7) of the scan electrode driving circuit appears in the output (6) of the signal electrode driving circuit during the period of the non-selection waveform, and the non-selection signal waveform is applied to the MSI panel. In the latter half period of the two horizontal dot numbers, the display data (D3 to Dφ) is input to the signal electrode drive circuit without being inverted, so the first half period of the next two horizontal dot numbers (the time chart in FIG. 2). 2)
Correctly displayed from. Thereafter, the non-selection and selection states are repeatedly displayed.

この様な駆動回路でMSIパネルを駆動することによ
り、画素状態により画素の実効電圧が変動することを抑
制し、コントラストムラの無いMSIパネルの駆動回路が
できる。又通常のTNタイプの駆動回路をそのまま使用出
来、特別に複雑な回路を必要としない等の利点がある。
By driving the MSI panel with such a driving circuit, it is possible to suppress the fluctuation of the effective voltage of the pixel due to the state of the pixel, and to provide a driving circuit of the MSI panel free from uneven contrast. Further, there is an advantage that a normal TN type drive circuit can be used as it is, and no specially complicated circuit is required.

〔発明の効果〕〔The invention's effect〕

本発明によれば、表示メモリの増加なく通常のTN駆動
回路で位相変調法によるMSIパネルの駆動回路を構成で
き、又、コントローラ側のコストアップの防止もでき
る。本発明は表示装置、プリンタ用シャッタ等のオプテ
ィカル・シャッタなど、種々の液晶素子に用いることが
できる。
According to the present invention, it is possible to configure a drive circuit for an MSI panel by a phase modulation method using a normal TN drive circuit without increasing the display memory, and it is also possible to prevent an increase in cost on the controller side. The present invention can be used for various liquid crystal elements such as a display device and an optical shutter such as a printer shutter.

【図面の簡単な説明】[Brief description of the drawings]

第1図は非線形抵抗膜による液晶表示素子の駆動回路の
構成図、第2図は第1図のタイムチャート、第3図は従
来技術による非線形抵抗膜の液晶表示素子の駆動回路。 Dφ〜D3……表示データ CP……クロック信号 DF……交流反転信号 FRM……フレーム信号 LOAD……信号電極側ラッチ信号 MSIパネル……非線形抵抗膜による液晶表示素子 1……非選択信号 2……J/Kフリップフロップ 3……アンドゲート 6……信号電極駆動回路の出力 7……走査電極駆動回路の出力
FIG. 1 is a block diagram of a liquid crystal display element driving circuit using a non-linear resistance film, FIG. 2 is a time chart of FIG. 1, and FIG. 3 is a driving circuit of a conventional non-linear resistance liquid crystal display element. Dφ to D3 Display data CP Clock signal DF AC inversion signal FRM Frame signal LOAD Signal electrode side latch signal MSI panel Liquid crystal display element with non-linear resistive film 1 Non-selection signal 2 ... J / K flip-flop 3 ... AND gate 6 ... Output of signal electrode drive circuit 7 ... Output of scan electrode drive circuit

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】非線形抵抗膜を用いた液晶素子の駆動回路
において、 信号電極側ラッチ信号が入力され、非選択信号を発生す
るJ/Kフリップフロップと、 前記J/Kフリップフロップの反転出力と信号電極側ラッ
チ信号が入力され、走査電極側ラッチ信号を出力するア
ンドゲートと、 前記非選択信号に応じて表示データを反転させる表示デ
ータ反転回路と、 前記表示データ反転回路からの信号電極表示データを受
け信号電極を駆動する信号電極駆動回路と、 前記非選択信号が入力される入力端子と前記走査電極側
ラッチ信号が入力される入力端子を有する走査電極駆動
回路と、 非線形抵抗膜を用いた液晶素子と、 前記信号電極駆動回路と走査電極駆動回路へ電圧を供給
する駆動電源回路と、を備えることを特徴とする非線形
抵抗膜を用いた液晶素子の駆動回路。
1. A drive circuit for a liquid crystal element using a non-linear resistive film, comprising: a J / K flip-flop to which a signal electrode side latch signal is input and which generates a non-selection signal; An AND gate receiving a signal electrode side latch signal and outputting a scan electrode side latch signal; a display data inverting circuit for inverting display data according to the non-selection signal; and signal electrode display data from the display data inverting circuit. A signal electrode drive circuit for receiving and driving a signal electrode; a scan electrode drive circuit having an input terminal to which the non-selection signal is input and an input terminal to which the scan electrode side latch signal is input; A liquid crystal element using a non-linear resistance film, comprising: a liquid crystal element; and a drive power supply circuit for supplying a voltage to the signal electrode drive circuit and the scan electrode drive circuit. Child drive circuit.
JP61165741A 1986-07-15 1986-07-15 Driving circuit of liquid crystal device using nonlinear resistive film Expired - Fee Related JP2654565B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61165741A JP2654565B2 (en) 1986-07-15 1986-07-15 Driving circuit of liquid crystal device using nonlinear resistive film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61165741A JP2654565B2 (en) 1986-07-15 1986-07-15 Driving circuit of liquid crystal device using nonlinear resistive film

Publications (2)

Publication Number Publication Date
JPS6321697A JPS6321697A (en) 1988-01-29
JP2654565B2 true JP2654565B2 (en) 1997-09-17

Family

ID=15818193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61165741A Expired - Fee Related JP2654565B2 (en) 1986-07-15 1986-07-15 Driving circuit of liquid crystal device using nonlinear resistive film

Country Status (1)

Country Link
JP (1) JP2654565B2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5814890A (en) * 1981-07-20 1983-01-27 セイコーエプソン株式会社 Driving of liquid crystal display

Also Published As

Publication number Publication date
JPS6321697A (en) 1988-01-29

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