JP3752875B2 - Control device for liquid crystal element and control method for liquid crystal element - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  The present invention relates to a liquid crystal element control apparatus and a liquid crystal element control method, and more particularly to a liquid crystal element control apparatus and a liquid crystal element control method for writing while erasing pixels formed by the liquid crystal elements when displaying an image. .
[0002]
[Prior art]
  Conventionally, a two-pulse method and a four-pulse method are known as typical examples of a method for driving a dot matrix type liquid crystal optical element using a ferroelectric liquid crystal material. However, the four-pulse method usually has a problem that the scanning time for one screen is longer than that in the two-pulse method because one line is selected and written while erasing the selected line. On the other hand, the two-pulse method requires a period for erasing the screen in addition to the scanning time for writing the screen. Normally, screen erasure in this case erases all pixels at once.
[0003]
  In this two-pulse method, the entire screen is erased by providing a whole-surface batch erasing period that is 10 times or more of the one-line selection period in the writing period, thereby completely erasing the image and preventing unevenness in the background. There has been proposed a technique for improving so as to increase (see Japanese Patent Laid-Open No. 5-297349). In addition, in order to improve image deterioration due to ambient temperature and elapsed time, a technique has been proposed in which the erase pulse width given to the liquid crystal display element is varied depending on the ambient temperature and the elapsed time after displaying the image (Japanese Patent Laid-open No. Hei. 10-123486).
[0004]
  In these conventional techniques, the voltage of the entire batch erase pulse is applied with the same value as the voltage of the write pulse in the line selection period. With these conventional techniques, it is conceivable to select all lines on the common side in order to erase the entire surface using a driver IC that can be easily obtained. However, there is a problem that the control becomes complicated. .
[0005]
  By the way, a ferroelectric liquid crystal can be easily obtained using a driver IC that can be easily obtained.PaA technique for driving a channel has been proposed (see Japanese Patent No. 2807070). In this technology, ferroelectric liquid crystalPaWhen driving the channel, the entire surface is erased when the driver IC for TN liquid crystal is used, and a non-connected electrode that does not connect a part of the output electrode of the common driver IC to the ferroelectric liquid crystal panel is provided. Is selected, the inverted liquid crystal drive output AC signal is applied to the segment side and the common side.
[0006]
[Problems to be solved by the invention]
  However, when a non-connection electrode (dummy electrode) is used, one or more output terminals of the driver IC must be wasted. In order to reduce the cost, it is common to use the common divisor of the number of pixels of the panel as the number of output terminals of the driver IC. However, when a non-connection electrode is provided, the number of display pixels on the panel can be reduced, It must not be set to a common divisor, resulting in performance reduction and cost increase.
[0007]
  In view of the above-described facts, an object of the present invention is to provide a liquid crystal element control device and a liquid crystal element control method capable of easily driving a ferroelectric liquid crystal element using a readily available driver IC. To do.
[0008]
[Means for Solving the Problems]
  In order to achieve the above object, a control device for a liquid crystal element according to a first aspect of the present invention includes a scan electrode group including a plurality of scan electrodes for displaying an image on a ferroelectric liquid crystal element, and a plurality of information electrodes. An information electrode group, a driving means for driving, an alternating signal for driving the ferroelectric liquid crystal element,In the entire batch erase periodGenerating means for generating an inverted signal obtained by inverting the alternating signal, setting means for setting the scanning electrode group to be in a non-selected state, and setting the information electrode group to be in a selected state, and the setting When the scanning electrode group is set to the non-selected state and the information electrode group is set to the selected state by the means,To erase the entire areaControl means for inputting the alternating signal and the inverted signal generated by the generating means to the driving means.
[0009]
  The control device for a liquid crystal element of the present invention is for displaying an image on a ferroelectric liquid crystal element. The liquid crystal element control device drives the scanning electrode group and the information electrode group by the driving means. A ferroelectric liquid crystal element generally applies an alternating signal for stabilization. In the present invention, the generating means generates an alternating signal and an inverted signal obtained by inverting the alternating signal. Arbitrary scan electrodes and information electrodes are set to the selected state when displaying an image, but all the scan electrodes, that is, the scan electrode group, must be set to a non-selected state when erasing the entire screen. Therefore, the setting means sets the scanning electrode group to the non-selected state and sets the information electrode group to the selected state. When the scanning electrode group is set to the non-selected state and the information electrode group is set to the selected state by the setting means, the control means inputs an alternating signal and an inverted signal to the driving means. Thus, when the scanning electrode group is set to the non-selected state and the information electrode group is set to the selected state, the ferroelectric liquid crystal element, that is, the screen can be set to an erasable state. Further, by inputting the alternating signal and the inverted signal to the driving means, a relative difference, for example, a voltage difference can be increased, and a signal input sufficient to erase the screen can be performed.
[0010]
  According to a second aspect of the present invention, in the liquid crystal element control device according to the first aspect, the setting means outputs an instruction signal for the next scan without activating the first scan on the screen after the image display is completed. Then, the scanning electrode group is set to a non-selected state.
[0011]
  An example of a standard driving means is a driver IC. The driver IC is a display deviceSetThe liquid crystal element is used for driving in which data is written or erased by scanning, that is, sequentially selecting lines. In general, a so-called common-side scanning electrode group and a so-called segment-side information electrode group are used independently. In the present invention, after the image display is completed, that is, in a state where data remains in the last line, the first scan on the screen is deactivated, that is, the first line is not selected. In this state, an instruction signal for the next scan is output. The output of this instruction signal is preferably a clock input for shifting to the next line. Since the next line of the last line does not exist, all the lines on the common side are in a non-selected state by instructing the next scan from the last line. Then, by selecting all the information electrodes on the segment side, it is possible to perform all line selection on the segment side and non-selection on all lines on the common side. In this state, the entire surface can be erased collectively by inputting inverted AC signals to the information electrode group and the scan electrode group (common side and segment side). Therefore, the control can be easily performed without generating the output terminal of the non-selected driver IC.
[0012]
  According to a third aspect of the present invention, there is provided a control method for a liquid crystal element comprising: a scan electrode group including a plurality of scan electrodes for displaying an image on a ferroelectric liquid crystal element; and an information electrode group including a plurality of information electrodes. A driving method for driving, wherein an alternating signal for driving the ferroelectric liquid crystal element;In the entire batch erase periodGenerating an inverted signal obtained by inverting the alternating signal, setting the scan electrode group to a non-selected state, and setting the information electrode group to a selected state,To erase the entire areaThe generated AC signal and inverted signal are input to the set scan electrode group and the information electrode group.
[0013]
  In this way, an inverted AC signal is obtained by using an inexpensive STN liquid crystal driver IC that can be used as a standard, especially by driving a simple matrix ferroelectric liquid crystal device by the two-pulse method. The entire surface can be easily erased simply by adding.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
  Hereinafter, an example of an embodiment of the present invention will be described in detail with reference to the drawings. In this embodiment, the present invention is applied to a liquid crystal display device.
[0015]
  As shown in FIG. 1, a liquid crystal display device according to an embodiment of the present invention includes a liquid crystal optical element 10, a segment driver 12, a common driver 14, an LCD signal generation circuit 16, a voltage generation circuit 18, and a frame such as a video RAM. A memory 20 is provided. The liquid crystal optical element 10, the segment driver 12, and the common driver 14 constitute a liquid crystal panel. The liquid crystal optical element 10 is a dot matrix type liquid crystal optical element using a ferroelectric liquid crystal material. For example, a ferroelectric liquid crystal is sandwiched between film substrates, and a polarizing plate with a reflector is attached to one side thereof, and the opposite side is provided. A polarizing plate is attached. The number of pixels is 640 × 480 pixels on the segment side (information line side) × common side (scanning line side).
[0016]
  The segment driver 12 is a segment side liquid crystal driving IC, and for example, HD66110 manufactured by Hitachi, Ltd. can be used. The common driver 14 is a common-side liquid crystal driving IC, and for example, HD66113 manufactured by Hitachi, Ltd. can be used. Both the segment driver 12 and the common driver 14 are driver ICs for driving an STN liquid crystal.
[0017]
  The input side of the segment driver 12 is connected to the LCD signal generating circuit 16 so that signals CL1, MS, DO to D3, and CL2 among the liquid crystal driving signals are inputted. Further, the input side of the segment driver 12 is connected to the voltage generation circuit 18 so that the power supply voltage for logic VCC and the power supply voltages of the liquid crystal drive levels V1, V2, V3, and V4 are input. The segment driver 12 outputs a signal Ys as a liquid crystal drive output, and the output side of the segment driver 12 is connected to one terminal group of the liquid crystal optical element 10.
[0018]
  As shown in FIG. 2, the output level of the signal Ys as the liquid crystal drive output in the segment driver 12 is determined by the combination of the AC signal M and the display data D. Specifically, the AC signal M(Here MS is entered)And the display data D are expressed as (D, M), the AC signal M is “1” at the high level, “0” at the low level, and the display data D is “1” or “0”. Is defined as follows.
When (D, M) = (1, 1), the output level V1
When (D, M) = (1, 0), the output level V2
When (D, M) = (0, 1), the output level V3
When (D, M) = (0, 0), the output level V4
[0019]
  The input side of the common driver 14 is connected to the LCD signal generating circuit 16 so that the signals FLM, CL1, MC, DISP among the liquid crystal driving signals are inputted. The input side of the common driver 14 is connected to the voltage generation circuit 18 so that the power supply voltage for logic VCC and the power supply voltages of the liquid crystal drive levels V1, V2, V5, and V6 are input. The common driver 14 outputs a signal Yc as a liquid crystal drive output, and the output side of the common driver 14 is connected to the other terminal group of the liquid crystal optical element 10.
[0020]
  As shown in FIG. 3, the signal Yc as the liquid crystal drive output in the common driver 14 is the alternating signal M.(MC is input here)And the display data D are used to determine the output level. The details are defined as follows.
When (D, M) = (1, 1), the output level V2
When (D, M) = (1, 0), the output level V1
When (D, M) = (0, 1), the output level V6
When (D, M) = (0, 0), the output level V5
  The internal block diagram and signal terminal functions of these driver ICs are also described in detail in the data book Hitachi LCD controller / driver LSI '96 .3 edition.
[0021]
  The LCD signal generation circuit 16 is a circuit for generating a signal for driving a liquid crystal, and is a logic circuit formed into one chip using a PLD (programmable logic device). The voltage generation circuit 18 is a circuit that generates a drive voltage applied to the liquid crystal panel. The voltage generation circuit 18 is configured by combining a transistor, a resistor R, and an operational amplifier. In this embodiment, one end of a resistor group in which five resistors are connected in series is grounded, and the other end is connected to a predetermined via a transistor. It is connected to the power supply voltage (40V). In the present embodiment, the resistance R of the voltage generation circuit 18 is set to 10 kΩ. Both ends of the resistor group function as terminals for obtaining outputs of the output levels V1 and V2, the connection ends between the resistors are connected to the operational amplifier, and the output ends of the operational amplifier are output levels V3, V4, V5, and V6.TheFunctions as a terminal to obtain. These output levels are set to V2 <V5 <V4 <V3 <V6 <V1.
[0022]
  The LCD signal generating circuit 16 generates liquid crystal driving signals FLM, CLl, MC, MS, DISP, and CL2, and D0 to D3 are supplied from the frame memory 20 to the LCD signal generating circuit 16 to be segmented. The driver 12 and the common driver 14 are input.
[0023]
  FLM is a frame signal, which is a signal representing screen switching or the like. CL1 is a latch signal for segment side display data and a common side shift clock signal. MC is the common side LCD drive voltage AC signal(Including an inverted signal obtained by inverting the AC signal MS during the entire batch erase period.)MS is a segment side liquid crystal drive voltage alternating signal. DISP is a liquid crystal drive output off signal. CL2 is a display data capturing signal, and the driver IC captures display data by CL2.
[0024]
  D0 to D3 are display data to be displayed on the liquid crystal optical element 10 and are supplied from the frame memory 20. The display data D0 to D3 are “1”, and the segment driver 12 is set to the selection level to turn on the liquid crystal display. Further, the display data D0 to D3 is “0”, and the segment driver 12 is set to the non-selection level to turn off the liquid crystal display.
[0025]
  Further, in the LCD signal generating circuit 16, at least a part of the normal liquid crystal driving voltage alternating signal is inverted.InversionIt has a function to generate a signal.
[0026]
  Next, the operation of the liquid crystal display device according to the present embodiment will be described.First, the general whole-surface batch erasing method will be described.
[0027]
  First, as an operation of the liquid crystal display device, a case where the same drive voltage AC signal is input to the driver IC will be described. In this case, the same signal of one of the alternating signals (for example, MS) may be input to both the segment driver and the common driver.
[0028]
  In this configuration, when performing the entire surface batch erase, all the information electrodes on the segment side must be selected, and all the lines on the scanning side must be selected. In this case, erasing is performed with the same voltage value as the writing voltage.
[0029]
  FIG. 7 shows a driving flow of the liquid crystal display device using only the same alternating signal, and FIG. 8 shows a timing chart thereof. In step 200 of FIG. 7, all lines on the common side of the liquid crystal optical element 10 are selected. Normally, the driver IC on the common side, that is, the common driver 14 sets data for line selection by the shift register. Therefore, in step 200, all lines are selected, that is, data “1” is input to all lines of the common driver 14. In order to set “1”, it is necessary to send data “1” by the number of scanning lines by a clock (479 pulses in the whole line selection period in FIG. 8).
[0030]
  In the next step 202, display data on the segment side is selected. That is, all “1” data is set in the segment driver 12 on the data line side. After all lines have been selected in this way, in step 204, an erase pulse for batch erase of the entire surface is applied to erase the screen. This erasing pulse is an alternating signal M. In this case, the segment side output voltage Ys is V1 when M = 1 and V2 when M = 0, and the common side output voltage Yc is V2 when M = 1 and V when M = 0.1It becomes. At this time, the combined voltage applied to the liquid crystal optical element 10 is + V1 when M = 1 and −V1 when M = 0 (see FIG. 8).
[0031]
  In the next step 206, the data of the shift register remaining by selecting all lines on the common side is cleared (that is, all lines are not selected). In other words, since the entire line must be erased one line at a time, the data of the driver IC on the common side of the selected line is once set to “0”. In this step 206, “0” data is output to all lines again with a clock. For this reason, clocks must be output for the number of lines (479 pulses during the selection period of the first line). In the next step 208, the common side is selected one line at a time and the display data is written to scan and write the screen. When the entire screen is finished (after the final line writing), the Disp signal is turned off in the next step 210. To stop and end writing.
[0032]
  As described above, in order to collectively erase the entire surface, it is usually necessary to perform clock input for the total number of lines twice.
[0033]
  As aboveNaConsidering the case where the common side data is not replaced, all the common side data before driving is normally “0”. In this case, as shown in FIG. 9, when the AC signal M is input to both the segment side and the common side, a large voltage difference occurs in the liquid crystal optical element 10 regardless of which data is set on the segment side. Absent. With such a small voltage difference, erasing is possible, but erasing takes a huge amount of time. This is because changing the transmission state of the ferroelectric liquid crystal optical element 10 depends on both the voltage and the pulse width.5In the case of a fraction, the application time is about 5 times longer. In the case of complete erasure, application time of 5 to 10 times is required. For this reason, as described above, the data on the common side needs to be taken in and out, and the control related to the batch entire surface erasure becomes complicated and the time is also increased.
[0034]
  Therefore, in this embodiment, since the entire surface is erased collectively, the selection of the first line is not performed, that is, all the information electrodes on the segment side are selected with the data remaining in the final line, and the frame signal is obtained. By selecting the common side clock without setting it to the high level, all the lines on the segment side are selected and all the lines on the common side are not selected. In this state, the liquid crystal drive output that is input to the common side and segment sideExchangeWhen the common signal is set from “1” to “0” on the common side, the entire block is erased by setting the segment side from “0” to “1”. It should be noted that the time required for the entire surface erasing is preferably set to five times the print line cycle.
[0035]
  That is, normally, when the screen display is completed, the data on the common side is in the last line. In general, a common driver IC for STN that is commercially available shifts data when a clock is input. When the first line is selected, a frame signal is input and a clock is input synchronously when the frame signal is at a high level, so that the data on the first line is selected as 1, and the data remaining on the last line is clocked. This is because the line is final and the line is final, that is, because there is no shift destination, the data is not left in the IC on the common side.
[0036]
  FIG. 4 shows a driving flow of the liquid crystal display device based on alternating signals inverted from each other, and FIG. 5 shows a timing chart thereof. First, specific signals in the liquid crystal display device will be described. When the LCD signal generation circuit 16 is in a state where output to the liquid crystal optical element 10 is stopped, each signal is fixed at a low level. When a print trigger (image writing instruction) is received to the LCD signal generation circuit 16, each signal is generated at the timing of the schematic timing chart shown in FIG.
[0037]
  In the present embodiment, the line cycle is set to 2 ms, and the entire batch erase period is set to 10 ms, which is five times the line cycle. The liquid crystal driving voltage (V1) was 35V. In the screen scanning writing period, the drive voltage AC signal is input to the segment driver 12 and the common driver 14 in the same phase as usual, but in the entire batch erasing period, an inverted signal waveform (AC signalMS,Inverted signal of AC signal MSMC). The combined voltage waveform applied to the segment, common, and liquid crystal drive output values and the liquid crystal based on the AC signal M, the segment side electrode data, and the common side electrode data from the batch erase period to the screen scan writing period is shown in FIG. become that way.
[0038]
  More specifically, when a trigger for printing to the LCD signal generation circuit 16 is received, the driving flow of FIG. 4 is executed, and in order to select all the display data on the segment side, the data D0 to D3 are set to the high level in step 100. In the next step, a predetermined number of clocks (160 in the present embodiment) are applied by the display data capture signal CL2, and one pulse is applied by the segment side display data latch signal CL1 in the next step 104. .
[0039]
  Next, in order to erase the screen, the DISP signal is set to the high level in step 106, and in the next step 108, the alternating signal MS having a duty of 50% for the entire surface erase period and the inverted signal MC are applied. (Erase pulse). In this case, the output voltage Ys on the segment side is V1 when MS = 1 and V2 when MS = 0. The output voltage Yc on the common side is V5 when MC = 0 and V6 when MC = 1. At this time, the combined voltage applied to the liquid crystal optical element 10 is + V6 when MS = 1 (MC = 0) and −V6 when MS = 0 (MC = 1) (see FIG. 5).
[0040]
  Next, in order to perform screen scanning writing, that is, writing according to display data by selecting the common side line by line, the following driving is performed. In step 110, data for one line is read from the frame memory and output as data D0 to D3 in synchronization with the signal CL2. In the next step 112, the FLM signal is set to a high level and the signal CL1 is input. In the next step 114, data for one line is read from the frame memory within the line cycle period, the data D0 to D3 are output in synchronization with the signal CL2, and the alternating signals MS and MC having a duty of 50% are applied. . In the next step 116, the signal CL1 is input, and steps 110 to 116 are repeated a predetermined number of times (479 times in the present embodiment) (step 118). In this way, scanning is written on the screen by selecting the common side line by line and writing display data. When the entire screen is finished (after the final line writing), the Disp signal is turned off in the next step 120 ( (Low level) to stop and end writing.
[0041]
  As described above, the AC signal M is inverted between the segment side and the common side.(AC signal MS and inverted signal MC of AC signal MS)(See FIG. 6), a large voltage difference is generated in the liquid crystal optical element 10, and the entire surface can be erased easily and in a short time. Therefore, the data on the common side is not required to be taken in and out, and the control related to the batch erasure can be simplified in a short time.
[0042]
  As shown in FIG. 6, the outputs of the segment driver 12 and the common driver 14 in the entire surface-finger erasing period according to the present embodiment and the combined output applied to the liquid crystal thereby are selected for one line in the entire erasing period. The potential is 4/5 times the writing voltage of the period. That is, the voltage applied to the liquid crystal optical element 10 during the entire batch erase period is 2 in the present embodiment.8V.
[0043]
  The pulse threshold for changing the transmittance of the ferroelectric liquid crystal optical element is determined by the voltage and the pulse width. Therefore, it can be seen that if the pulse width is long even if the voltage is low, the threshold value is exceeded. In this case, the voltage value in the screen scanning writing period is Vl, that is, 35 V, and the applied pulse width is 2 ms. Therefore, the pulse width necessary for erasing is approximately 2.5 ms. The pulse width of the entire surface batch erase was set to 5 times the width of the write pulse in one line selection period. That is, it is 10 ms, which is sufficiently longer than 2.5 ms.
[0044]
  In the technique described in Japanese Patent Laid-Open No. 5-297349, in order to improve display quality, the width of the write pulse in one line selection period is set to 10 times or more. Even at 28V, which is 4/5 times the write pulse voltage, the entire batch erase period is 10 ms, which is five times the line selection period, and the display quality is sufficient, and erasing can be performed in a shorter time. Have confirmed.
[0045]
  As described above, in this embodiment, when a liquid crystal optical element is driven using a standard liquid crystal optical element drive IC, that is, a common side drive IC and a segment side drive IC, data is transferred to the last line. Is left, the next line is selected without selecting the first scan on the screen, that is, the first line. Thereby, since the next line of the last line does not exist, all the lines on the common side are in a non-selected state. Then, all the lines on the segment side are selected, and the AC signals are inverted on the common side and the segment side.(AC signal MS and inverted signal MC of AC signal MS)By entering, the entire surface is erased. Thus, the output terminal of the dummy driver IC is not generated, and the clock input for the total number of lines is not performed twice.
[0046]
  Although the embodiments of the present invention have been described above, the present embodiments include embodiments of the following various technical matters in addition to the requirements described in the claims. That is, in the embodiment of the present invention, in order to change the transmission state of the ferroelectric liquid crystal element, the property depending on both the voltage and the pulse width is used to oppose the information electrode group (segment side). Driving means for driving the scan electrode group (common side) intersecting with each other, and for the driving means, information is set in the information electrode group, and the alternating signals (AC signal MS and inverted signal MC of AC signal MSAnd control means for providing
[0047]
  In addition, the embodiment of the present invention includes the following method. Specifically, using a drive IC for driving a simple matrix type liquid crystal for STN that is commercially available, display data DC and an alternating current for liquid crystal drive output are used.ConversionAccording to the combination of two digital control signals of signal MC,
(DC, MC) =
V1 when (1, 1), Vl when (1, 0),
V6 when (0,1), V5 when (0,0)
A common driving IC that has input terminals Vl, V2, V5, and V6 selected as described above and outputs a voltage input to the input terminal to an output terminal;
According to the combination of two digital control signals of the display data DS and the alternating signal MS for liquid crystal drive output,
(DS, MS) =
V1 when (1, 1), V2 when (1, 0),
V3 when (0,1), V4 when (0,0)
A method of driving a ferroelectric liquid crystal element using a segment driving IC having input terminals Vl, V2, V3, and V4 selected as described above and outputting a voltage input to the input terminal to an output terminal Because
  Each voltage is
  V2 <V5 <V4 <V3 <V6 <V1
In the entire batch erase period, the common drive IC data DC is all bits 0, the segment drive IC data DS is all 1, and the alternating current signals MC and MS for liquid crystal drive output are inverted. Signal.
[0048]
  By doing so, it is not necessary to replace data with the common IC on the selected line side in the case of batch erasing of the entire surface.
[0049]
  By doing this,liquidBy using an inexpensive STN liquid crystal driver IC that can be purchased as a standard product from a crystal driver IC manufacturer, it is necessary to add only one AC signal, especially when driving a simple matrix ferroelectric liquid crystal device using the 2-pulse method. There is no need to replace data on the common side, and the time required to erase the entire image can be shortened, thereby increasing the printing speed.
[0050]
  Therefore, it is possible to erase the entire surface of a dot matrix type display using ferroelectric liquid crystal using a simple matrix driver IC for STN liquid crystal that is commercially available as a standard product without adding a complicated sequence and time. This can be done without sacrificing.
[0051]
  In the above embodiment, the case where the present invention is applied to a liquid crystal display device has been described. However, the present invention is not limited to a liquid crystal display, and can be applied to various control devices that drive liquid crystal elements. It is.
[0052]
【The invention's effect】
  As described above, according to the present invention, when erasing the image displayed on the ferroelectric liquid crystal element, when the scan electrode group is set to the non-selected state and the information electrode group is set to the selected state, Since the AC signal and inverted signal are input to the drive means, there is no need to set a non-connected electrode (dummy electrode), and the entire screen of the ferroelectric liquid crystal device is erased at once using a standard drive circuit. To doButThere is an effect that can be done.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a schematic configuration of a liquid crystal display device according to an embodiment of the present invention.
FIG. 2 is an explanatory diagram for explaining an output level of a segment driver for driving a liquid crystal element;
FIG. 3 is an explanatory diagram for explaining an output level of a common driver for driving a liquid crystal element;
FIG. 4 is a flowchart showing a flow of a driving process of the liquid crystal display device according to the embodiment of the present invention.
FIG. 5 is a timing chart showing signals in the liquid crystal display device.
FIG. 6 is an explanatory diagram for explaining a process of collectively erasing a screen using an inverted AC signal at a voltage level.
[Fig. 7] Erase the screen at once using the same AC signalNormalIt is a flowchart which shows the flow of the drive process of the liquid crystal display device containing a process.
[Figure 8] Erasing the screen all at once using the same AC signalNormalIt is a timing chart which shows the signal in the liquid crystal display device containing a process.
FIG. 9 is an explanatory diagram for explaining, in voltage level, a process of collectively erasing a screen using the same alternating signal.
[Explanation of symbols]
        10 Liquid crystal optical elements
        12 segment driver
        14 Common driver
        16 LCD signal generation circuit
        18 Voltage generator
        20 frame memory

Claims (3)

Drive means for driving a scan electrode group comprising a plurality of scan electrodes for displaying an image on the ferroelectric liquid crystal element, and an information electrode group comprising a plurality of information electrodes;
Generating means for generating an alternating signal for driving the ferroelectric liquid crystal element, and an inverted signal obtained by inverting the alternating signal in the entire batch erase period ;
Setting means for setting the scanning electrode group to be in a non-selected state and setting the information electrode group to be in a selected state;
When the scanning electrode group is set to the non-selected state and the information electrode group is set to the selected state by the setting means, the alternating signal and the inverted signal generated by the generating means are used to erase the entire surface. Control means for inputting to the drive means;
A liquid crystal element control device.   The setting means outputs an instruction signal for the next scan without activating the first scan on the screen after the image display is completed, and sets the scan electrode group to a non-selected state. The control apparatus for liquid crystal elements as described. A driving method for driving a scanning electrode group composed of a plurality of scanning electrodes for displaying an image on a ferroelectric liquid crystal element and an information electrode group composed of a plurality of information electrodes,
Generating an alternating signal for driving the ferroelectric liquid crystal element and an inverted signal obtained by inverting the alternating signal in the entire batch erase period ;
Set the scan electrode group to the non-selected state and set the information electrode group to the selected state,
A control method for a liquid crystal element, wherein the generated alternating signal and inverted signal are input to the set scan electrode group and the information electrode group in order to erase the entire surface at once.

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