JP2653926B2 - Integrated circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit for performing a reliability test such as burn-in.

[0002]

2. Description of the Related Art FIG. 5 shows an operation state of a conventional integrated circuit 1 during a burn-in test. The burn-in test is performed in order to select and remove an initial defective product of the integrated circuit after manufacturing, and use only a good product. The purpose of this test is to bring the integrated circuit 1 into a predetermined operating state, reveal and remove unstable elements of the integrated circuit 1 under accelerated environmental conditions, and improve reliability. For this reason,
The integrated circuit 1 is not only connected to a DC power supply from a DC power supply 2 but also supplied with a start signal from a start signal source 3 for starting a test and a clock signal for a test operation from a clock signal source 4. There must be. The power supply voltage from the DC power supply 2 is connected to the VDD terminal 5 of the integrated circuit 1,
It is provided between the terminal and the GND terminal 6. A start signal from the start signal source 3 is provided between the start input terminal 7 and the GND terminal 6 as a start pulse (SP).
The clock signal (CK) from the clock signal source 4 is provided between the clock input terminal 8 and the GND terminal 6.

When a start signal (SP) is supplied, an integrated circuit 1 performs a predetermined operation in synchronization with a clock signal (CK). The start signal (SP) is provided so that the integrated circuit 1 repeatedly performs a series of test operations determined in advance. The integrated circuit 1 has many input / output terminals.
In many cases, it is necessary to supply a signal for a test to input terminals other than the input terminal shown in FIG. Such a burn-in test needs to be performed on a relatively large number of integrated circuits 1 at the same time. The start signal source 3 and the clock signal source 4 need to supply signals to such a large number of integrated circuits 1. Also, when more input signals are needed, more signal sources are required.

[0004]

SUMMARY OF THE INVENTION A conventional integrated circuit 1
, It is necessary to supply a large number of signals to input terminals as shown in FIG. Since the burn-in test is performed at a high temperature for a certain period of time, it is stored in a thermostat. The DC power source 2 shown in FIG.
4 and the like need to be installed outside the thermostat and connected to the integrated circuit 1 by a conductive wire. For this reason, there is a problem in that connection between the conductive line and the integrated circuit 1 is very troublesome before and after the burn-in test.

An object of the present invention is to provide an integrated circuit which solves the above-mentioned problem and can easily perform a test such as a burn-in process.

[0006]

According to the present invention, there is provided an integrated circuit having a function of performing a predetermined series of operations in response to a start pulse supplied from a signal input terminal, wherein the integrated circuit performs a predetermined series of operations. A start signal generation circuit that repeatedly generates a start pulse for detecting a rising edge of a power supply voltage, a detection circuit that derives a signal indicating the detection, and a selection input terminal, and a signal from the detection circuit. In response to the above, when a predetermined terminal voltage of the power supply is given as a selection signal to the selection input terminal at the time of the rise of the power supply voltage, a predetermined series of integrated circuits are started using the start pulse from the start signal generation circuit. Is repeated, and when a predetermined selection signal is not given to the selection input terminal, a start pulse from the signal input terminal is There are integrated circuits which is an integrated circuit which comprises the a control circuit for controlling to perform a series of operations the predetermined.

Further, the present invention has a shift register and a logic circuit for activating the shift register in response to a start pulse given from a signal input terminal, wherein the logic circuit synchronizes with a clock signal given from a clock input terminal. In accordance with the shift clock of, in the integrated circuit that performs a predetermined series of operations based on signals sequentially shifted in the shift register, a clock signal generation circuit that generates a clock signal, and when the rising of the power supply voltage is detected,
A detection circuit that derives a signal indicating that the signal has been detected; and a selection input terminal. In response to a signal from the detection circuit, a predetermined terminal voltage of the power supply is supplied to the selection input terminal when the power supply voltage rises. The clock signal from the clock signal generation circuit is supplied to the logic circuit, and the output from the last stage of the shift register is supplied to the logic circuit as the start pulse to provide a cyclic circuit for the reliability test of the integrated circuit. And a control circuit that controls not to perform a cyclic operation for the reliability test when the predetermined terminal voltage of the power supply is not applied to the selection input terminal. Integrated circuit.

According to the present invention, a plurality of the integrated circuits are mounted on a tape carrier package, and in each integrated circuit, a connection terminal to a power supply and the selection input terminal are led out to at least one end of the tape carrier package. And are mutually connected.

Further, according to the present invention, the integrated circuit can be individually subjected to an operation test in a state of being mounted on the tape carrier package by disconnecting the connection terminal to the power supply and the selection input terminal. There is a feature.

[0010]

According to the present invention, the integrated circuit includes a start signal generation circuit and a control circuit having a selection input terminal. The start signal generation circuit repeatedly generates a start pulse for performing a predetermined series of operations. The detection circuit detects a rise of the power supply voltage. The control circuit repeats a series of operations of the integrated circuit using the start pulse from the start signal generation circuit when the predetermined selection signal is given to the selection input terminal at the time of the rise of the power supply voltage. When a predetermined selection signal is not supplied to the terminal, a series of predetermined operations as an integrated circuit are performed using a start pulse supplied from the signal input terminal. Therefore, the integrated circuit can perform a series of operations for the test only by applying a predetermined terminal voltage of the power supply to the selected input terminal, thereby reducing the number of wirings required in a reliability test such as a burn-in test. be able to.

According to the invention, an integrated circuit has a shift register, operates based on a signal shifted in the shift register by a clock signal, and generates a clock signal generation circuit, a detection circuit, a logic circuit, and A control circuit having a selection input terminal. The clock signal generation circuit generates a clock signal to be supplied to the shift register via the logic circuit to shift a signal into the shift register. The detection circuit detects a rise of the power supply voltage. When a predetermined terminal voltage of the power supply is applied to the selected input terminal when the power supply voltage rises, the control circuit supplies a clock signal to the shift register via the logic circuit to perform a predetermined series of operations. When the predetermined terminal voltage of the power supply is not applied to the selected input terminal, the operation for the reliability test is not performed. The operation for the reliability test is performed cyclically by giving the output from the last stage of the shift register to the input of the control circuit. In order to apply a predetermined terminal voltage of the power supply to the selection input terminal, the operation for testing the integrated circuit can be cyclically performed by connecting the selection input terminal to, for example, a predetermined terminal of the power supply.

Further, according to the present invention, a plurality of integrated circuits are mounted on a tape carrier package, and connection terminals and input terminals from each integrated circuit to a power source are drawn out to at least one end of the tape carrier package and connected to each other. Therefore, a reliability test such as burn-in can be extremely easily performed on a plurality of integrated circuits.

Further, according to the present invention, after a reliability test such as burn-in is completed, an input terminal and a connection terminal to a power supply are disconnected, and an operation test of each integrated circuit is performed. Since the operation test can be performed while a plurality of tapes are mounted on the tape carrier package, the test of the integrated circuit can be efficiently performed.

[0014]

FIG. 1 shows an integrated circuit 9 according to one embodiment of the present invention.
FIG. 3 is a block diagram showing a schematic electrical configuration of FIG. The integrated circuit 9 is formed in a monolithic structure on a semiconductor substrate such as silicon, and has a logic circuit 10 and a shift circuit 1.
1 has a function of driving a liquid crystal display element (hereinafter abbreviated as “LCD”). Such an integrated circuit 9 is mounted on various electronic devices such as a laptop computer and a liquid crystal television receiver together with the LCD. After mounting on such an electronic device, it is very difficult to find a defect in the integrated circuit 9. Therefore, a burn-in test is performed immediately after the manufacture of the integrated circuit 9 in order to remove defective products in advance. A semiconductor device such as the integrated circuit 9 can be used in a very stable state for a relatively long period of time by removing an initial failure based on an unstable element during manufacturing. The burn-in test is performed for the purpose of applying a power supply voltage to the integrated circuit 9 to perform a certain operation under an environmental condition at a high temperature for a certain period of time, so that a defect caused by an unstable element becomes apparent. After the burn-in test, the integrated circuit 9
An operation test such as an electrical characteristic based on the product specification is performed, and the defective integrated circuit 9 is removed.

For the operation of the burn-in test as described above, the integrated circuit 9 is provided with a clock circuit 12 which is a clock signal generation circuit for generating a clock signal which is a source of the shift operation in the shift circuit 11. A start signal for starting the operation for the burn-in test is provided by detecting the rise of the power supply voltage by the detection circuit 13. The logic circuit 10 and the shift circuit 11
Whether to perform an operation based on a predetermined function or to perform an operation for a burn-in test is performed according to a mode selection signal (MODE) which is a selection signal supplied to a selection input terminal 14 which is an input terminal. The mode selection signal is provided to first and second selection circuits 15 and 16. One input of the first selection circuit 15 is supplied with an output from the activation circuit 17. The activation circuit 17 supplies an output from the detection circuit 13 or the last stage of the shift circuit 11 to the first selection circuit 15. A start pulse (SP) from a start input terminal 18 is applied to the other input of the first selection circuit 15. A clock signal from the clock circuit 12 is supplied to one input of the second selection circuit 16. Second selection circuit 1
The clock signal (CK) from the clock input terminal 19 is supplied to the other input of the clock signal 6. When a ground potential, which is one level of the power supply, is applied to the selection input terminal 14, the first and second selection circuits 15 and 16 output the output from the activation circuit 17 and the output from the clock circuit 12 to the line 2.
0 and 21 are given to the logic circuit 10 respectively. Such an input voltage to the selection input terminal 14 is provided by connecting the selection input terminal 14 to the ground potential.
When the selection input terminal 14 is in the open state and is not connected to another potential, a predetermined potential is applied to the selection input terminal 14 from inside the integrated circuit 9. At this time, the start input terminal 1 is supplied from the first and second selection circuits 15 and 16.
8 and a signal supplied to clock input terminal 19 are selected and supplied to logic circuit 10. Such first and second selection circuits 15 and 16 and start-up circuit 1
7 constitutes a control circuit having a selection input terminal 14.
The logic circuit 10 starts an operation synchronized with the clock signal via the line 21 in response to the start signal via the line 20. A signal is sequentially supplied from the logic circuit 10 to the first stage of the shift circuit 11 via a line 22, and is shifted in synchronization with a shift clock via a line 23. The output from the last stage of the shift circuit 11 is
When the burn-in test is performed, this signal is used as a start pulse to restart the logic circuit 10 to perform a cyclic operation. That is, the shift circuit 1
The last stage of 1 also operates as a start signal generation circuit.

FIG. 2 is a block diagram showing a more detailed electrical configuration of the integrated circuit 9 shown in FIG. Parts corresponding to those in FIG. 1 are denoted by the same reference numerals.

The shift circuit 11 includes a shift register 24
And an output circuit 25. The shift register 24
The signal applied to the first stage from the logic circuit 10 via the line 22 is sequentially shifted in synchronization with the shift clock signal applied via the line 23, and the output from each stage is output via the output circuit 25. Output terminal 26 to integrated circuit 9
Lead out. This shift clock is a clock circuit 1
2 is generated in the logic circuit 10 based on the clock signal generated by the logic circuit 2.

The clock circuit 12 includes an inverting circuit 27, a NO
An oscillation circuit including an R circuit 28, an inversion circuit 29, a capacitor 30, and a resistor 31 is provided. A mode selection signal from the selection input terminal 14 is applied to one input of the NOR circuit 28, and the oscillation circuit operates only when the mode selection signal is at a low level.

The voltage detecting circuit 13 includes an inverting circuit 32, a resistor 33, and a capacitor 34. The series circuit of the resistor 33 and the capacitor 34 is connected to both ends VD
It is connected between D and GND. The connection point between the resistor 33 and the capacitor 34 is connected to the input of the inverting circuit 32. When the power supply voltage is applied to the integrated circuit 9, the capacitor 34 is charged by the current through the resistor 33, and the inverting circuit 32
Input voltage rises. This input voltage is applied to the inverting circuit 32
Until the threshold value is exceeded, the output voltage of the inverting circuit 32 is at the high level. When the input voltage of the inverting circuit 32 exceeds the threshold value, the output voltage of the inverting circuit 32 goes low. In this way, the detection circuit 13 derives a high-level signal when the power supply voltage rises, and derives a low-level signal after the power supply voltage rises.

The first and second selection circuits 15 and 16 are composed of first and second AND circuits 35 and 36; 38 and 39 and NOR circuits 37 and 40. 1st AND
A signal from the selection input terminal 14 is supplied to one input of the circuits 35 and 38 via an inversion circuit 41. 2nd AN
One input of the D circuits 36 and 39 is connected to the selection input terminal 14.
Is provided. In the first selection circuit 15,
The other input of the first AND circuit 35 is supplied with an output from the activation circuit 17. Second AND of first selection circuit 15
A signal from the start input terminal 18 is supplied to the other input of the circuit 36. The output from the clock circuit 12 is supplied to the other input of the first AND circuit 38 of the second selection circuit 16. The second AND circuit 39 of the second selection circuit 16
A signal from the clock input terminal 19 is supplied to the other input of the control circuit. In the first and second selection circuits 15 and 16, first and second AND circuits 35 and 36;
Are supplied to NOR circuits 37 and 40, respectively. The output of the NOR circuit 37 of the first selection circuit 15 is supplied to the logic circuit 10 via the line 20. The output from the NOR circuit 40 of the second selection circuit 16 is supplied to the logic circuit 10 via the line 21. The activation circuit 17
R circuit 42 is included. An output from the detection circuit 13 is provided to one input of the OR circuit 42. The output from the last stage of the shift register 24 is given to the other input of the OR circuit 42. Therefore, the output from the OR circuit 42 is supplied from the detection circuit 13 or the last stage of the shift register 24 to the other of the first AND circuit 35 of the first selection circuit 15.

FIG. 3 shows an electrical connection state necessary for performing a burn-in test on the integrated circuit 9 of FIG. The integrated circuit 9 includes a DC power supply 43 and a VDD terminal 44 and a G terminal.
Connect the ND terminal 45. The selection input terminal 14 is connected to a GND terminal which is one terminal of the DC power supply 43. FIG.
By providing the selection input terminal 14 adjacent to the GND terminal 45 as described above, this connection becomes extremely easy.

FIG. 4 is a diagram showing a connection state when performing a burn-in test using an integrated circuit 46 according to another embodiment of the present invention. Parts corresponding to the embodiment of FIGS. 1 and 2 are denoted by the same reference numerals. It should be noted that the integrated circuit 46 is a tape carrier package (abbreviated as “TCP”).
Is implemented in multiple. The tape carrier package is formed by, for example, attaching a copper foil to a base film of a polyimide resin-based material with an epoxy resin-based adhesive, patterning the copper foil, and electroless tin plating.

The integrated circuit 46 has an input terminal 48 and an output terminal 49 provided in different directions.
On the input terminal 48 side, a VDD terminal 44 and a GND terminal 45, which are power supply voltage terminals, are also provided. The output from the DC power supply 43 is connected to a common VDD line 50 and a common GND line 51 provided in the tape carrier package 47. The selection input terminal 14 is also connected to a GND line 51 which is a predetermined power supply so as to enter a processing mode such as burn-in. By turning on the power supply 43 to the common lines 50 and 51 from one end of such a tape carrier package, a large number of integrated circuits 46 can be efficiently and collectively very easily burn-in tested in a tape carrier package mounted state. can do.

After completion of the burn-in test, the individual integrated circuits 4
6 is mounted on a base film, and
The connection of the element 44, the GND terminal 45 and the selection input terminal 14 to the common lines 50 and 51 is made by punching holes 52 and 53, respectively, by punching. After the separation, a test (final test) for the function inherent in each integrated circuit 46 is performed. In this test, for example, it is determined whether or not electrical specifications are satisfied, and a defective product that has been revealed by the burn-in test is removed.
After the completion of these tests, the tape carrier package 4 is cut along the cutting line 54 shown in FIG.
7 is separated.

In each of the above embodiments, the integrated circuits 9 and 46 are subjected to a reliability test such as burn-in while the semiconductor chips are housed in a package. Of course, the present invention can be similarly applied to the state of the previous wafer.

[0026]

As described above, according to the present invention, if a predetermined terminal voltage of a power supply is given to a selection input terminal as a selection signal, a predetermined reliability test operation of the integrated circuit can be performed from the time when the power supply voltage is turned on. Can be done. Since there is no need to supply a signal for a reliability test from outside the integrated circuit, a reliability test such as burn-in can be easily performed, and a highly reliable high-quality integrated circuit can be obtained.

Further, according to the present invention, by connecting the selection input terminal to one of the connection terminals to the power supply, an operation for a reliability test such as burn-in can be performed from the rise of the power supply voltage. Can be. Therefore, a reliability test such as burn-in can be easily performed, and a high-quality integrated circuit can be obtained. Further, a cyclic operation for a test can be performed using a shift register included in the integrated circuit, so that the cyclic test can be easily performed.

Further, according to the present invention, a plurality of integrated circuits are mounted on a tape carrier package, and in each integrated circuit, a connection terminal to a power supply and an input terminal are drawn out to at least one end of the tape carrier package and mutually connected. Because of the connection, a reliability test such as burn-in can be performed while the integrated circuit is mounted on the tape carrier package. This allows a large number of integrated circuits to be tested efficiently. Further, according to the present invention, an operation test of an individual integrated circuit can be easily performed while the integrated circuit is mounted on the tape carrier package.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an electrical configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a more detailed electrical configuration of the embodiment of FIG.

FIG. 3 is a diagram showing electrical connections when performing a burn-in test using the integrated circuit 9 according to the embodiment shown in FIG. 1;

FIG. 4 is a diagram showing electrical connections for a burn-in test by an integrated circuit according to another embodiment of the present invention.

FIG. 5 is a diagram showing an electrical connection for a burn-in test by a conventional integrated circuit 1.

[Explanation of symbols]

 9, 46 Integrated circuit 10 Logic circuit 11 Shift circuit 12 Clock circuit 13 Detection circuit 14 Select input terminal 24 Shift register 25 Output circuit 43 DC power supply 44 VDD terminal 45 GND terminal 47 Tape carrier package

Claims (4)

(57) [Claims] An integrated circuit having a function of performing a predetermined series of operations in response to a start pulse supplied from a signal input terminal, wherein the integrated circuit repeatedly generates a start pulse for performing a predetermined series of operations. A start signal generation circuit, a detection circuit that derives a signal indicating the detection of the rise of the power supply voltage when detecting the rise of the power supply voltage, and a selection input terminal, and in response to a signal from the detection circuit, At the time of the rise, when a predetermined terminal voltage of the power supply is given as a selection signal to the selection input terminal, a series of predetermined operations of the integrated circuit are repeatedly performed by using a start pulse from the start signal generation circuit, and the selection is performed. When a predetermined selection signal is not given to the input terminal, the integrated circuit uses the start pulse from the signal input terminal to A control circuit for performing control so as to perform a predetermined series of operations. 2. A shift clock from a logic circuit having a shift register and a logic circuit for activating the shift register in response to a start pulse given from a signal input terminal, wherein the shift circuit is synchronized with a clock signal given from a clock input terminal In the integrated circuit performing a predetermined series of operations based on the signals sequentially shifted in the shift register, a clock signal generating circuit for generating a clock signal, and a detection of a rise in the power supply voltage, A detection circuit that derives a signal representing the signal, and a selection input terminal, in response to a signal from the detection circuit, when a predetermined terminal voltage of the power supply is given to the selection input terminal when the power supply voltage rises. , A clock signal from the clock signal generation circuit to the logic circuit, and an output from the last stage of the shift register. When the predetermined pulse is supplied to the logic circuit as a start pulse to perform a cyclic operation for the reliability test of the integrated circuit, and the predetermined terminal voltage of the power supply is not supplied to the selected input terminal, the reliability test is performed. And a control circuit for controlling so as not to perform the cyclic operation of the integrated circuit. 3. A plurality of the integrated circuits are mounted on a tape carrier package. In each integrated circuit, a connection terminal to a power supply and the selection input terminal are drawn out to at least one end of the tape carrier package and mutually connected. The integrated circuit according to claim 1, wherein the integrated circuit is connected. 4. The operation test of the integrated circuit can be individually performed in a state where a plurality of the integrated circuits are mounted on the tape carrier package by disconnecting a connection terminal to the power supply and the selection input terminal. 4. The integrated circuit according to claim 3, wherein: