JP2641404B2 - Semiconductor circuit module - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor circuit module, and more particularly to a semiconductor circuit module including a high power consumption type semiconductor element and mounted on a mounting substrate.

[0002]

2. Description of the Related Art A semiconductor circuit module including a high power consumption type semiconductor element and mounted on a mounting board is usually provided with a through hole at a predetermined position on a multilayer wiring board, and the semiconductor element is arranged on the multilayer wiring board. A heat sink is provided on one surface side of the wiring board via a high thermal conductive member that adheres to the semiconductor element, and on the other surface side of the multilayer wiring board, a plurality of heat sinks for connecting to the wiring of the mounting board are provided. (See, for example, JP-A-61-256748).
Reference). In many cases, ordinary electronic components are provided on the multilayer wiring board in addition to the high power consumption type semiconductor elements.

FIG. 5 shows an example (first example) of such a semiconductor circuit module.

In this semiconductor circuit module, a semiconductor element mounting portion 11x having a central portion penetrating from one surface to the other surface and having an inner surface portion formed in a step shape, a multilayer internal wiring 12x having a predetermined pattern, and one end. A plurality of connection pins 13x for connecting to the internal wiring 12x, protruding at a predetermined position on one surface and connecting to the mounting board, and a predetermined surface of a step-like inner surface portion of the semiconductor element mounting portion 11x. And a plurality of pads 15 connected to the internal wiring 12x and connected to the opening of the semiconductor element mounting portion 11x on the other surface side of the multilayer wiring substrate 1X. A heat dissipating metal plate 2x of a high heat conductive member to be an element mounting surface, and a heat dissipating member joined to the other surface of the heat dissipating metal plate 2x and provided at a predetermined distance from the other surface of the multilayer wiring board 1X. Click 3x and, mounted fixedly bonded to the semiconductor element mounting surface of the radiating metal plate 2x semiconductor device 4x
And a bonding wire 5 connecting each electrode (pad) of the semiconductor element 4x to a plurality of pads 15 on the side surface of the semiconductor element mounting portion 11x, and an opening on one surface side of the semiconductor element mounting portion 11x. It has a metal cap 6x and various electronic components 7 arranged on the other surface of the multilayer wiring board 1X so as to connect lead terminals to predetermined positions of the internal wiring 12x.

[0005] The semiconductor circuit module of the first example includes:
Various electronic components 7 together with the high power consumption type semiconductor element 4x
Can be mounted as a single module on a mounting board, and thus is suitable for the configuration of a semiconductor circuit having a predetermined function including a high power consumption type semiconductor element.

There is also a semiconductor circuit module using a multi-stage package as disclosed in Japanese Patent Application Laid-Open No. 63-107146.

FIGS. 6A to 6C are a plan view, a side view, and an enlarged cross-sectional view of a package for a multi-stage configuration.
FIG. 4B is a plan view and a side view showing an example (second example) of a semiconductor circuit module having a multi-stage configuration using this package.

The package 100 of the second example includes an electronic component mounting surface on one surface on which the electronic component 7 is mounted, and a plurality of wirings 81 connected to each lead terminal of the electronic component 7 around the electronic component mounting surface. A disk-shaped package body 8 provided is connected to the periphery of the package body 8, one end face of which is substantially coincident with the surface of the wiring 81 on one surface of the package body 8, and the other end face is connected to the package body 8. A cylindrical sleeve 9 protruding from the other surface of the sleeve 8 by a predetermined dimension and having a predetermined thickness, and is provided on the sleeve 9 in parallel with the central axis of the sleeve 9 and corresponding to each of the plurality of wirings 81. A pin insertion hole 14y having a predetermined depth is formed from one end, and the opening surface of the pin insertion hole 14y is
A plurality of connection pins 13y projecting from the other end face of the sleeve 9 by a predetermined length so as to be inserted into and engageable with the pin insertion hole 14y, and connected to the corresponding wiring 81. And a structure having:

Then, the electronic component 7 is bonded and fixed to the electronic component mounting surface of the package body 8, and the electronic component 7 is mounted.
A plurality of packages 100 in which the respective lead terminals are connected to the corresponding wirings 81 are inserted into the pin insertion holes 14y of the other package 100 by mating the connection pins 13y of one package 100 and joined in multiple stages to form a semiconductor circuit. The module is configured to be mounted on the mounting board 200.

The second example is suitable for high-density mounting because a plurality of electronic components can be arranged in a predetermined position on the component mounting surface of the mounting board 200.

[0011]

However, the demands for multifunctional, high-density, high-integration, and miniaturized semiconductor devices are increasing, and the above-described conventional semiconductor circuit module has a semiconductor element 4x in the first example. In addition, the mounting area of the electronic component 7 is limited to limit the number of mounting, and the arrangement area of the connection pins 13x is also limited. For example, since the pin arrangement of the full grip array type cannot be performed, the number of connection pins is limited. In addition, there is a problem that it is difficult to achieve multi-functionality and high density and high integration. Further, since the electronic component 7 is arranged outside the semiconductor element mounting portion 11x,
There is a problem that the area occupied by the mounting becomes large and it is difficult to reduce the size. In the second example, the mounting area of the electronic component 7 and the arrangement area of the connection pins 13y are similarly limited, and the number thereof is limited. Therefore, there are problems that it is difficult to achieve multifunction, high density and high integration, and that a high power consumption type semiconductor element cannot be mounted.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor circuit module which can mount a high power consumption type semiconductor element and can easily be multifunctional, high density, high integration, and miniaturized.

[0013]

According to the semiconductor circuit module of the present invention, a plurality of first pads penetrate a predetermined portion from one surface to the other surface, and a plurality of first pads are provided at predetermined positions on an inner surface portion of the penetrating portion. The formed semiconductor element mounting part, at least one first internal wiring having a predetermined pattern, and one end respectively connected to the first internal wiring, and a predetermined part of the one surface outside the semiconductor element mounting part. And a first multilayer wiring board having a plurality of first connection pins protrudingly arranged at a position, and an opening of a semiconductor element mounting portion on the other surface side of the first multilayer wiring board. A high heat conductive member having a surface on the semiconductor element mounting portion side as a semiconductor element mounting surface, a heat sink joined to the other surface of the high heat conductive member, and a plurality of heat conductive members mounted on the semiconductor element mounting portion of the high heat conductive member. For each electrode A semiconductor element to be connected to the first pad, and a first connection pin disposed at a position corresponding to each of the plurality of first connection pins on one surface side, and the corresponding first connection pin is inserted to be engaged and connected. A plurality of first pin insertion holes, at least one second internal wiring connected to the plurality of first pin insertion holes and having a predetermined pattern, and the plurality of first pin insertion holes on one surface side A plurality of second pads for connecting electronic components, which are arranged at predetermined positions outside the arrangement region and are connected to the second internal wiring, and one ends respectively connected to the second internal wiring, and A second multilayer wiring board having a plurality of second connection pins protrudingly arranged in a predetermined region, and at least one first electron mounted by connecting a lead terminal to the plurality of second pads; Parts and
A plurality of second pin insertion holes which are arranged at positions corresponding to the plurality of second connection pins on one surface side, respectively, and insert and engage and connect the corresponding second connection pins; At least one layer of the third internal wiring connected to the second pin insertion hole and having a predetermined pattern, the third internal wiring being arranged at a predetermined position on one surface outside an area where the plurality of second pin insertion holes are arranged. A plurality of third pads for connecting electronic components connected to the third internal wiring, and a plurality of third connection pins each having one end connected to the third internal wiring and protruding from the entire surface on the other surface side. And a at least one second electronic component mounted with lead terminals connected to the plurality of third pads.

Also, a plurality of sets of intermediate stages including the second multilayer wiring board and the first electronic component are provided, and a plurality of second multilayer wiring boards of one set of the plurality of sets are provided. Are inserted into a plurality of first pin insertion holes of another set of second multi-layer wiring boards and sequentially stacked so as to be engaged and connected, and the outermost one of the sets is connected. Second
Inserting the first connection pins of the first multilayer wiring board into the plurality of first pin insertion holes of the multilayer wiring board, and connecting and connecting the first connection pins;
The plurality of second connection pins of the other second multilayer wiring board are inserted into the plurality of second pin insertion holes of the third multilayer wiring board to be engaged and connected, and the first A plurality of uppermost sets including a multilayer wiring board, a high thermal conductive member, a heat sink, and a semiconductor element are provided, and a plurality of first connection pins of each of the plurality of first multilayer wiring boards are connected to one second. The multi-layer wiring board is configured to be inserted into a plurality of first pin insertion holes to be engaged and connected. Furthermore, a predetermined conductive bonding member is used to connect the first connection pin and the first pin insertion hole and the second connection pin and the second pin insertion hole that have been inserted and connected to each other. It is configured so that

[0015]

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a cross-sectional view showing a first embodiment of the present invention, and FIGS. 2A and 2B are first and second planes of a third multilayer wiring board of this embodiment and the periphery thereof. FIG. 3 is an enlarged sectional view of a connection pin and a pin insertion hole portion of this embodiment.

In this embodiment, a semiconductor element mounting portion 11 having a central portion, which penetrates from one surface to the other surface and has an inner surface portion formed in a stepped shape, has at least one layer having a predetermined pattern. The first internal wiring 12a has one end connected to the first internal wiring 12a.
A plurality of first connection pins 13a respectively connected to the internal wiring 12a of the semiconductor element mounting portion 11 and protruding from a predetermined position in a region outside the semiconductor element mounting portion 11 on one surface; A first multilayer wiring board 1A including a plurality of pads 15 arranged at predetermined positions on the side surface and connected to the first internal wiring 12a, and a semiconductor on the other surface side of the first multilayer wiring board 1A A heat-dissipating metal plate 2 of a high thermal conductive member which is coupled to the opening of the element mounting portion 11 and has a surface on the semiconductor element mounting portion side as a semiconductor element mounting surface; 3, a semiconductor element 4 mounted on the semiconductor element mounting portion of the heat-dissipating metal plate 2 and connecting each of the plurality of electrodes to a corresponding pad 15 via a bonding wire 5, and one surface side of the semiconductor element mounting portion 11. Open the opening A plurality of first connection pins 13a which are arranged at positions corresponding to the metal cap 6 and the plurality of first connection pins 13a on one surface side, respectively, and are inserted and engaged with and connected to the corresponding first connection pins 13a. Pin insertion hole 14a, at least one second internal wiring 12b having a predetermined pattern connected to the plurality of first pin insertion holes 14a, and an arrangement area of the plurality of first pin insertion holes 14a on one surface side A plurality of second pads 15 for connecting electronic components, which are arranged at predetermined outside positions and are connected to the second internal wiring 12b, and a predetermined area on the other surface side, one end of which is connected to the second internal wiring 12b, respectively. Plurality of second connection pins 13b protruding from
A second multilayer wiring board 1B having at least one first electronic component 7 mounted with lead terminals connected to a plurality of second pads 15 for connecting electronic components; A plurality of second pin insertion holes 14b which are arranged at positions corresponding to the plurality of second connection pins 13b, respectively, and are inserted and engaged with and connected to the corresponding second connection pins 13b, and the plurality of second pin insertion holes 14b. At least one layer of the third internal wiring 12c connected to the pin insertion hole 14b and having a predetermined pattern, the third internal wiring 12c being arranged at a predetermined position outside the area where the plurality of second pin insertion holes 14b are arranged on one surface side. A plurality of third pads 15 for connecting electronic components connected to the internal wiring 12c, and a plurality of third pads 15 each having one end connected to the third internal wiring 12c and projecting over the entire surface on the other surface side and arranged in a full grid array shape. Third connection pin 13 Third multilayer wiring substrate 1C having the
And at least one second electronic component 7 mounted by connecting a lead terminal to a plurality of third pads 15 for electronic component connection.

In this embodiment, the third connection pins 13c to be connected to the mounting board can be arranged in a full grid array to increase the number of connection pins. Since it can be mounted on the three multi-layer wiring boards 1B and 1C, the number of mounted electronic components can be increased, so that multi-functionality and high density and high mounting can be easily achieved. The first multilayer wiring board 1A has a semiconductor element 4 of high power consumption type.
Further, since the electronic component 7 is not mounted in a region outside the semiconductor element mounting portion 11 of the first multilayer wiring board 1A as in the first conventional example shown in FIG. Accordingly, the area occupied by the mounting is reduced, and the miniaturization is facilitated.

FIG. 4 is a sectional view showing a second embodiment of the present invention.

In this embodiment, the first multilayer wiring board 1Aa
And a first set of uppermost layers including a heat dissipating metal plate 2a, a heat sink 3a, a semiconductor element 4a, a bonding wire 5, and a metal cap 6a having high thermal conductivity, and a first multilayer wiring board 1A
b, a heat dissipating metal plate 2b, a heat sink 3b, a semiconductor element 4b, a bonding wire 5, and a metal cap 6b. The second multi-layer wiring board 1Ba includes the uppermost second set. First multilayer wiring board 1 for each set
A plurality of first pin insertion holes 14a corresponding to the plurality of first connection pins 13a of Aa, 1Ab are arranged, and the plurality of first connection pins 13a of these first multilayer wiring boards 1Aa, 1Ab are respectively connected. Corresponding first pin insertion hole 14
a to be connected and connected.

In this embodiment, a plurality of high power consumption type semiconductor elements (4a, 4b) can be mounted.
Multifunctionality and high-density and high-integration are facilitated accordingly.

In this embodiment, the semiconductor elements (4a, 4a, 1a) are respectively provided on the two first multilayer wiring boards 1Aa, 1Ab.
4b) Although one semiconductor device is mounted one by one,
It can also be mounted on one first multilayer wiring board. Further, in these embodiments, the set of the intermediate stage including the second multilayer wiring board and the electronic components mounted thereon is one set.
A plurality of sets of intermediate stages including the second multilayer wiring board and the first electronic component are provided, and the second set of one of the plurality of sets is provided.
The plurality of second connection pins of the multi-layered wiring board are inserted into the plurality of first pin insertion holes of another set of second multi-layered wiring boards and sequentially stacked so as to be engaged and connected. The first connection pins of the first multilayer wiring board are inserted into the plurality of first pin insertion holes of the outermost one of the plurality of sets of the second multilayer wiring boards, and are mated and connected. A plurality of second connection pins of the second multilayer wiring board may be inserted into the plurality of second pin insertion holes of the third multilayer wiring board to be engaged and connected, and this may be achieved. Thereby, it is possible to further increase the number of functions and the density and integration.

Further, a predetermined conductive joint is provided between the first connection pin and the first pin insertion hole, and between the second connection pin and the second pin insertion hole, which are inserted and mated and connected. If the members are joined by, for example, solder, the vibration resistance and the shock resistance can be further improved.

Further, in these embodiments, at least a three-stage structure including the first to third multilayer wiring boards is used. However, when the number of mounted electronic components is small, the first multilayer wiring board and the high heat An uppermost set including a conductive member, a heat sink, and a semiconductor element, and a lowermost set including a third multilayer wiring board and a second electronic component, wherein a plurality of first multilayer wiring boards are provided. One connection pin is inserted into the plurality of second pin insertion holes of the third multilayer wiring board to be engaged and connected, thereby reducing the overall volume and further reducing the size.

[0025]

As described above, according to the present invention, a plurality of multilayer wiring boards are connected to each other by a plurality of connection pins and a plurality of pin insertion holes which are engaged with and connected to these connection pins to form a multi-stage structure. A high power consumption type semiconductor element is mounted on the multilayer wiring board with a heat sink, and other ordinary electronic components are mounted on the multilayer wiring board other than the top layer, and mounted on one entire surface of the bottom multilayer wiring board By arranging a plurality of connection pins for connecting to the board in a full grid array, normal electronic components are not mounted on the uppermost multilayer wiring board. In addition, ordinary electronic components can be mounted on multilayer wiring boards other than the uppermost one, and the number of these multilayer wiring boards can be increased or decreased according to the number of electronic components. The connection pin for mounting the wiring substrate is disposed like a full grid array, multifunctional, there is an effect that can be easily density and high integration.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a first embodiment of the present invention.

FIG. 2 is a plan view of a third multilayer wiring board of the embodiment shown in FIG. 1 and first and second surfaces around the third multilayer wiring board;

FIG. 3 is an enlarged sectional view of a connection pin and a pin insertion hole portion of the embodiment shown in FIG. 1;

FIG. 4 is a sectional view showing a second embodiment of the present invention.

FIG. 5 is a cross-sectional view showing a first example of a conventional semiconductor circuit module.

FIG. 6 is a plan view, a side view, and a partially enlarged sectional view of a package used in a second example of the conventional semiconductor circuit module.

7 is a plan view and a side view of a second example of a conventional semiconductor circuit module using the package shown in FIG.

[Explanation of symbols]

1A, 1B, 1C, 1Aa, 1Ab, 1Ba, 1Ca,
1X multilayer wiring board 2, 2a, 2b, 2x heat dissipation metal plate 3, 3a, 3b, 3x heat sink 4, 4a, 4b, 4x semiconductor element 5 bonding wire 6, 6a, 6b, 6x metal cap 7 electronic component 8 package body 9 Sleeve 11, 11a, 11b, 11x Semiconductor element mounting portion 12a to 12c, 12x Internal wiring 13a to 13c, 13x, 13y Connection pin 14a, 14b, 14y Pin insertion hole 15 Pad 81 Wiring 100 Package 200 Mounting substrate

Claims (5)

(57) [Claims] A first portion penetrating a predetermined portion from one surface to the other surface, and a plurality of first portions disposed at predetermined positions on an inner surface portion of the penetrating portion;
A semiconductor element mounting portion on which pads are formed, at least one layer of a first internal wiring having a predetermined pattern, and one end connected to the first internal wiring, the one surface being outside the semiconductor element mounting portion. A first multilayer wiring board having a plurality of first connection pins protrudingly arranged at a predetermined position in the region; and an opening of a semiconductor element mounting portion on the other surface side of the first multilayer wiring board. A high heat conductive member that is bonded and the semiconductor element mounting portion side surface is a semiconductor element mounting surface, and a heat sink that is joined to the other surface of the high heat conductive member,
A semiconductor element mounted on the semiconductor element mounting portion of the high thermal conductive member and connecting each of the plurality of electrodes to the corresponding first pad; and a position corresponding to each of the plurality of first connection pins on one surface side A plurality of first pin insertion holes that are arranged in the corresponding first connection pins to be inserted and mated and connected to each other, and that at least one layer having a predetermined pattern connected to the plurality of first pin insertion holes and having a predetermined pattern. 2 internal wiring, and a plurality of second pads for connecting electronic components, which are arranged at predetermined positions on one surface side outside the area where the plurality of first pin insertion holes are arranged and are connected to the second internal wiring. And a second multilayer wiring board having a plurality of second connection pins each having one end connected to the second internal wiring and protruding from a predetermined area on the other surface side; Connected to the second pad of A plurality of at least one first electronic component, which are arranged at positions corresponding to each of the plurality of second connection pins on one surface side, and which are fitted and connected by inserting the corresponding second connection pins; A second pin insertion hole, at least a third internal wiring connected to the plurality of second pin insertion holes and having a predetermined pattern, and an arrangement area of the plurality of second pin insertion holes on one surface side A plurality of third pads for connecting electronic components, which are arranged at predetermined outside positions and are connected to the third internal wiring, and one ends are respectively connected to the third internal wiring and protrude to the entire surface on the other surface side. A third multilayer wiring board having a plurality of third connection pins arranged therein, and at least one second electronic component mounted by connecting a lead terminal to the plurality of third pads; A semiconductor circuit module characterized by the above-mentioned. 2. A plurality of intermediate stage sets each including a second multilayer wiring board and a first electronic component, and a plurality of second multilayer wiring boards of one set of the second multilayer wiring board among the plurality of sets are provided. Are inserted into a plurality of first pin insertion holes of another set of second multi-layer wiring boards and sequentially stacked so as to be engaged and connected, and the outermost one of the sets is connected. The first connection pins of the first multi-layer wiring board are inserted into the plurality of first pin insertion holes of the second multi-layer wiring board to be engaged and connected, and the plurality of first connection pins of the other second multi-layer wiring board are connected. 2. The semiconductor circuit module according to claim 1, wherein the second connection pins are fitted into and connected to the plurality of second pin insertion holes of the third multilayer wiring board. 3. A plurality of uppermost sets each including a first multilayer wiring board, a high thermal conductive member, a heat sink and a semiconductor element, and a plurality of first multilayer wiring boards of each of the plurality of sets. 2. The semiconductor circuit module according to claim 1, wherein the connection pins are fitted into and connected to a plurality of first pin insertion holes of one second multilayer wiring board. 4. A predetermined conductive joint is provided between the first connection pin and the first pin insertion hole, and between the second connection pin and the second pin insertion hole, which are inserted, mated and connected. 2. The semiconductor circuit module according to claim 1, wherein said semiconductor circuit module is joined by a member. 5. An uppermost set including a first multilayer wiring board, a high thermal conductive member, a heat sink, and a semiconductor element;
And a lowermost set including a second electronic component and a plurality of first connection pins of the first multilayer wiring substrate and a plurality of second connection pins of the third multilayer wiring substrate. 2. The semiconductor circuit module according to claim 1, wherein the semiconductor circuit module is inserted into the pin insertion hole to be engaged and connected.