JP2601232B2 - IC lead displacement inspection equipment - Google Patents

IC lead displacement inspection equipment

Info

Publication number
JP2601232B2
JP2601232B2 JP3823695A JP3823695A JP2601232B2 JP 2601232 B2 JP2601232 B2 JP 2601232B2 JP 3823695 A JP3823695 A JP 3823695A JP 3823695 A JP3823695 A JP 3823695A JP 2601232 B2 JP2601232 B2 JP 2601232B2
Authority
JP
Japan
Prior art keywords
lead
image
circuit
inspection
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP3823695A
Other languages
Japanese (ja)
Other versions
JPH08233526A (en
Inventor
弘幸 寺井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3823695A priority Critical patent/JP2601232B2/en
Publication of JPH08233526A publication Critical patent/JPH08233526A/en
Application granted granted Critical
Publication of JP2601232B2 publication Critical patent/JP2601232B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Length Measuring Devices By Optical Means (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、ICリードずれ検査装
置に関し、特にQFP等のICリードの曲がりによる先
端位置の不良の検出を行うICリードずれ検査装置に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC lead deviation inspection apparatus, and more particularly, to an IC lead deviation inspection apparatus for detecting a defect in a leading end position due to bending of an IC lead such as a QFP.

【0002】[0002]

【従来の技術】ICリードは搬送時等に折れ曲がり、リ
ード先端が位置ずれし易すく、このようなICリードの
ずれを検査する必要がある。
2. Description of the Related Art An IC lead is bent at the time of transportation or the like, and the leading end of the lead is easily displaced. Therefore, it is necessary to inspect such displacement of the IC lead.

【0003】従来のICリードずれ検査装置では、例え
ば、特開昭63−161635に示される表面実装部品
のリード検査方法によるものがある。
[0003] A conventional IC lead displacement inspection apparatus is based on, for example, a method for inspecting lead of a surface mounted component disclosed in Japanese Patent Application Laid-Open No. 63-161635.

【0004】図3は、従来のICリードずれ検査装置の
画像処理工程を説明するためのICリードの撮像画像を
示す図である。4側辺にリードを備えたICを照明し、
その反射光を撮像カメラに入射し、撮像カメラからの信
号を2値化することにより、図3のようにリードの光学
像B1〜Bnを得ることができる。この撮像画像におい
て、各XY方向の列毎に光学像B1〜Bnの領域幅内で
軸線中心L1〜Lnを求める。次に各軸線中心L1〜L
n毎に順次にピッチ間隔P1〜Pnを求めるとともに、
これらのピッチ間隔P1〜Pnの平均値を算出する。そ
の平均値と各ピッチ間隔P1〜Pnを比較演算すること
によりリードピン夫々に曲がりがあるかを判断する。
FIG. 3 is a view showing a picked-up image of an IC lead for explaining an image processing step of a conventional IC lead displacement inspection apparatus. Illuminate an IC with leads on four sides,
The reflected light is incident on an imaging camera, and a signal from the imaging camera is binarized, so that optical images B1 to Bn of the lead can be obtained as shown in FIG. In this captured image, axis centers L1 to Ln are obtained within the area width of the optical images B1 to Bn for each column in the XY directions. Next, each axis center L1-L
While sequentially obtaining pitch intervals P1 to Pn for each n,
An average value of these pitch intervals P1 to Pn is calculated. By comparing the average value with each of the pitch intervals P1 to Pn, it is determined whether each of the lead pins has a bend.

【0005】[0005]

【発明が解決しようとする課題】この従来のICリード
ずれ検査装置では、被検査ICの画像のリードの間隔等
を検出する場合、XY方向の光学像の並びを検出し、そ
の連続性を位置及び間隔を測定しているため、撮像した
被検査画像に傾きが生じた場合、測定値に誤差が生じ正
確な検査が出来ず、またその補正のために別の手段を設
けなければならないという問題点があった。
In this conventional IC lead deviation inspection apparatus, when detecting the interval between leads of an image of an IC to be inspected, the arrangement of optical images in the X and Y directions is detected, and the continuity thereof is determined. And measurement of the interval, if the image to be inspected is tilted, an error will occur in the measured value, making it impossible to perform an accurate inspection, and another means must be provided for correction. There was a point.

【0006】[0006]

【課題を解決するための手段】本発明のICリードずれ
検査装置は、ICのリードを撮像する検査画像入力回路
と、この検査画像入力回路で撮像した画像を2値化した
検査2値画像を作成する2値化回路と、前記検査2値画
像を細線化処理し前記リードの画像を線画とした線画像
を作成する細線化回路と、前記線画の端点を検出する端
点検出回路と、前記端点を中心とし設定された大きさの
円領域のマスクを発生させる円形マスク発生回路と、前
記マスクどうしの重なりを検出する円マスク重なり検出
回路とを備えている。
SUMMARY OF THE INVENTION An IC lead displacement inspection apparatus according to the present invention includes a test image input circuit for picking up an IC lead, and a test binary image obtained by binarizing an image picked up by the test image input circuit. A binarization circuit to be created; a thinning circuit to thin the inspection binary image to create a line image using the image of the lead as a line image; an endpoint detection circuit to detect an endpoint of the line image; A circular mask generation circuit for generating a mask of a circular area of a set size centered on a circle, and a circular mask overlap detection circuit for detecting the overlap between the masks.

【0007】[0007]

【実施例】次に、本発明について図面を参照し説明す
る。
Next, the present invention will be described with reference to the drawings.

【0008】図1は、本発明の一実施例のICリードず
れ検査装置のブロック図である。
FIG. 1 is a block diagram of an IC lead deviation inspection apparatus according to one embodiment of the present invention.

【0009】検査画像入力回路1においてリードを備え
た被検査ICを撮像した被検査画像aを出力する。被検
査画像aは、2値化回路2で2値化され2値画像bが作
成される。次に、2値画像を細線化回路3でリード部分
の画像が幅1画素となるように細線化処理し線画像cを
作成する。線画像cの先端の点を端点検出回路4で求
め、求めた各端点の位置を端点位置dとして出力する。
検出した各端点位置dを中心とし、リード間隔の許容値
に応じた大きさの円領域eをそれぞれ、円点マスク発生
回路5で発生させる。各円領域eの重なりが発生した場
合、円マスク重なり検出回路6で欠陥7として出力す
る。
An inspection image input circuit 1 outputs an inspection image a obtained by imaging an inspection target IC having leads. The inspection image a is binarized by the binarization circuit 2 to create a binary image b. Next, the binary image is thinned by the thinning circuit 3 so that the image of the lead portion has a width of one pixel, and a line image c is created. The end point detection circuit 4 obtains a point at the tip of the line image c, and outputs the obtained position of each end point as an end point position d.
The circular point mask generation circuit 5 generates a circular area e having a size corresponding to the allowable value of the lead interval with each detected end point position d as the center. When the overlapping of the respective circular areas e occurs, the circular mask overlapping detecting circuit 6 outputs it as a defect 7.

【0010】次に、図2を用いて、本実施例の処理過程
を説明する。
Next, the processing steps of this embodiment will be described with reference to FIG.

【0011】図2は被検査画像dを2値化した2値画像
bを示し、10はIC本体の画像であり、11はリード
の画像である。この2値画像bを細線化することによ
り、リード11の部分は、線画12となる。この線画1
2の端点13それぞれを通常行われるマスク処理等を用
いて検出し、その各端点13を中心とし、設計上のリー
ドの間隔によって規定される大きさの円マスク14をそ
れぞれ発生させる。ICのリードが正常な場合は円マス
ク14どうしは重なることはないが、リードの曲がりが
生じた場合、円マスク14の重なり15が発生し、その
重なり15を検出することにより、リード曲がりによる
欠陥が生じているかを判定できる。また、円マスクの大
きさを変化させることにより、欠陥を検出するリードの
まがり許容値を規定することができる。
FIG. 2 shows a binary image b obtained by binarizing the image to be inspected d, reference numeral 10 denotes an image of the IC body, and reference numeral 11 denotes a lead image. By thinning the binary image b, the portion of the lead 11 becomes a line image 12. This line drawing 1
Each of the two end points 13 is detected by using a mask process or the like which is usually performed, and a circular mask 14 having a size defined by the designed lead interval is generated around each of the end points 13. When the leads of the IC are normal, the circular masks 14 do not overlap with each other. However, when the leads are bent, the overlapping 15 of the circular masks 14 is generated. Can be determined. In addition, by changing the size of the circular mask, it is possible to define an allowable value of a turn of a lead for detecting a defect.

【0012】[0012]

【発明の効果】以上説明したように、本発明のICリー
ド検査装置は、ICのリード先端を検出し、その各点を
中心とし、リード間隔に対応した大きさの円マスクを発
生させ、その円マスクの重なりにより、リードの曲がり
により生じるリード接近の欠陥を検出しているため、I
Cのリードの方向が傾いていても、傾き補正等の手段を
用いることなく、直接欠陥を検出できる。また、リード
の位置情報を入力する必要がない。
As described above, the IC lead inspection apparatus of the present invention detects the leading end of an IC and generates a circular mask having a size corresponding to the lead interval with each point as the center. Since the defect of the approach of the lead caused by the bending of the lead due to the overlap of the circular mask is detected,
Even if the direction of the lead C is inclined, the defect can be detected directly without using any means such as inclination correction. Further, there is no need to input lead position information.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のICリードずれ検査装置の一実施例を
示すブロック図である。
FIG. 1 is a block diagram showing an embodiment of an IC lead deviation inspection apparatus according to the present invention.

【図2】図1中の2値画像bの一例を示す図である。FIG. 2 is a diagram showing an example of a binary image b in FIG.

【図3】従来のICリードずれ検索装置での検査方法を
説明する図である。
FIG. 3 is a diagram illustrating an inspection method in a conventional IC lead deviation search device.

【符号の説明】[Explanation of symbols]

1 検査画像入力回路 2 2値化回路 3 細線化回路 4 端点検出回路 5 円形マスク発生回路 6 円マスク重なり検出回路 7 欠陥 10 IC 11 リード 12 線画 13 端点 14 円マスク 15 欠陥 a 被検査画像 b 2値画像 c 線画像 d 端点位置 e 円領域 DESCRIPTION OF SYMBOLS 1 Inspection image input circuit 2 Binarization circuit 3 Thinning circuit 4 Endpoint detection circuit 5 Circular mask generation circuit 6 Circular mask overlap detection circuit 7 Defect 10 IC 11 Lead 12 Line drawing 13 Endpoint 14 Circle mask 15 Defect a Image to be inspected b 2 Value image c-line image d Endpoint position e circular area

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 ICのリードを撮像する検査画像入力回
路と、この検査画像入力回路で撮像した画像を2値化し
た検査2値画像を作成する2値化回路と、前記検査2値
画像を細線化処理し前記リードの画像を線画とした線画
像を作成する細線化回路と、前記線画の端点を検出する
端点検出回路と、前記端点を中心とし設定された大きさ
の円領域のマスクを発生させる円形マスク発生回路と、
前記マスクどうしの重なりを検出する円マスク重なり検
出回路とを備えることを特徴とするICリードずれ検査
装置。
1. An inspection image input circuit for imaging an IC lead, a binarization circuit for generating an inspection binary image obtained by binarizing an image captured by the inspection image input circuit, A thinning circuit that performs thinning processing to create a line image using the image of the lead as a line image, an end point detection circuit that detects an end point of the line drawing, and a mask of a circular area having a set size centered on the end point. A circular mask generating circuit for generating,
An IC lead misalignment inspection apparatus, comprising: a circle mask overlap detection circuit for detecting the overlap between the masks.
JP3823695A 1995-02-27 1995-02-27 IC lead displacement inspection equipment Expired - Lifetime JP2601232B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3823695A JP2601232B2 (en) 1995-02-27 1995-02-27 IC lead displacement inspection equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3823695A JP2601232B2 (en) 1995-02-27 1995-02-27 IC lead displacement inspection equipment

Publications (2)

Publication Number Publication Date
JPH08233526A JPH08233526A (en) 1996-09-13
JP2601232B2 true JP2601232B2 (en) 1997-04-16

Family

ID=12519673

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3823695A Expired - Lifetime JP2601232B2 (en) 1995-02-27 1995-02-27 IC lead displacement inspection equipment

Country Status (1)

Country Link
JP (1) JP2601232B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010099211A (en) * 2001-09-12 2001-11-09 성우테크론 주식회사 Structure of lead frame pattern inspection product

Also Published As

Publication number Publication date
JPH08233526A (en) 1996-09-13

Similar Documents

Publication Publication Date Title
US7466854B2 (en) Size checking method and apparatus
KR960013357B1 (en) Image data inspecting method and apparatus
JP2006276454A (en) Image correcting method and pattern defect inspecting method using same
KR100719712B1 (en) Bump checking apparatus and method
US6965687B2 (en) Size checking method and apparatus
JP2601232B2 (en) IC lead displacement inspection equipment
JP3272998B2 (en) Bump height pass / fail judgment device
JPH09147107A (en) Method and device for evaluating image position
JP4357666B2 (en) Pattern inspection method and apparatus
KR20070045057A (en) Method of teaching for electronic parts information in chip mounter
JP4029975B2 (en) Measuring method of shoulder arc radius of notch of semiconductor wafer
JPS61193007A (en) Inspecting method for rod type projection body
JPH10105719A (en) Optical measurement method for hole position
JPH06204700A (en) Chip component mount inspecting apparatus
JPH10105718A (en) Optical measurement method for hole position
JPH06281411A (en) Measuring method for hole position
JP2701872B2 (en) Surface inspection system
JPH05231842A (en) Shape pattern inspection method and device
JPH0619252B2 (en) Soldering inspection device for printed wiring boards
JPH10105720A (en) Optical measurement method for hole position
JPS59171199A (en) Device for inspecting ultrafine part mounting position
JP2803427B2 (en) Surface mount IC lead displacement inspection equipment
JPH07104136B2 (en) Terminal tilt detection method
JPH0894332A (en) Device for inspecting mounted parts on electronic substrate
JPH0651014A (en) Flaw inspecting device

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19961126