JP2595975B2 - Signal processing circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a sequential signal of a first color component signal and a second color component signal having different levels in a pedestal period appearing sequentially in a predetermined cycle. The present invention relates to a signal processing circuit for limiting an amplitude.

[Conventional technology]

In the color / video signal processing circuit, when performing color difference line-sequential signal processing to perform color signal component signal processing, amplitude compensation is performed to compensate for a shortage of the dynamic range of signal processing after line sequential processing. That is, in a conventional video signal circuit, two color difference signals are clamped to respective predetermined potentials by separate clamp circuits, and then line-sequentialized by a switch, and the color difference line-sequential signal is subjected to amplitude limitation or amplitude compression by an amplitude limiting circuit. I was The conventional amplitude limiting circuit,
A basic configuration in which a predetermined divided voltage is applied to two series-connected diodes and a color difference line-sequential signal is applied to a connection point of the two diodes, the color difference line-sequential signal is kept within a predetermined range with respect to a predetermined constant potential. Voltage was limited.

[Problems to be solved by the invention]

However, the line-sequentialized color difference signal is composed of the RY signal and the B-
Since the clamp level is different from that of the Y signal, if the reference potential for limiting the amplitude is set to be vertically symmetrical with respect to the center potential of one of the color difference signals, it is asymmetric with respect to the other color difference signal. The amplitude is limited. Further, when the reference potential of the amplitude limit is set to an intermediate potential between the center potentials of the two color difference signals, and when the upper and lower balances of the respective color difference signals are to be maintained, the amplitude limit becomes insufficient and necessary. When the amplitude is limited, the upper and lower balance of the two color difference signals is lost.

In response to this, a circuit configuration has been proposed in which each color difference signal is clamped by a clamp circuit, the amplitude is limited by an individual amplitude limit circuit, and then line-sequentialization is performed. In this circuit configuration, two amplitude limit circuits are used. As a result, the circuit scale and the number of elements are increased, and furthermore, there is a disadvantage that the circuit components such as transistors are easily affected by variations in characteristics.

Such a situation is generally observed in a sequential signal including a plurality of types of signals having different clamp levels.

Accordingly, the present invention provides a simple configuration for reducing the amplitude of a sequential signal in which a first color component signal and a second color component signal having different levels in a pedestal period appear in a predetermined cycle within a predetermined amplitude range. It is an object of the present invention to provide a signal processing circuit capable of performing a well-balanced restriction.

[Means for solving the problem]

The signal processing circuit according to the present invention includes: a first color component signal;
A second color component signal having a different level in a pedestal period from the first color component signal is input, and the first color component signal and the second color component signal input according to a switching signal whose level changes in a predetermined cycle. An output means for sequentially outputting any one of the color component signals; and a signal sequentially output from the output means, and an amplitude of the input signal, the amplitude being changed in accordance with a change in the level of the switching signal. And amplitude control means for outputting the output within a limited range.

[Action]

With the above configuration, the amplitude of the sequential signal in which the first color component signal and the second color component signal having different levels in the pedestal period appear sequentially in a predetermined cycle is well-balanced within a predetermined amplitude range. Will be able to

〔Example〕

 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.
10 is an RY signal input terminal, and 12 is a BY signal input terminal. 14 and 16 are clamp capacitors, 18 and 20 are clamp circuits, 22 is a power supply for applying a reference potential E _REF to the clamp circuit 20, and 24 is a potential applied to the clamp 18 from the reference potential E _REF to the clamp circuit 20. E Power supply for applying a reference potential larger by _OFFSET , CP is the clamp circuit of clamp circuits 18 and 20
This is a clock pulse that defines timing. 26 is 2
A switch for line-sequencing the two color difference signals, and the output side of the switch 26 is connected to an amplitude limiting circuit 28. LA
LT is a pulse that transitions from one of the two potentials to the other for each horizontal scanning line, and the switch 26 switches according to the LALT pulse.

The amplitude limiting circuit 28 limits the amplitude of the color difference line-sequential signal from the switch 26 to a predetermined potential range from the reference potential for each color difference signal. 30 gives the input impedance of the amplitude limiting circuit 28 resistance, 32 and 34 diodes for limiting the signal amplitude, 36 and 38 resistors for bias potential setting diodes 32 and 34, 39 is a constant voltage power supply potential V _1, Reference numeral 40 denotes a resistor connected between the LALT pulse line and the diode 32 to change the bias voltage to the diodes 32 and 34 for each color difference signal period. 42 is an output terminal of the amplitude limiting circuit 28.

Next, the operation of the circuit of FIG. 1 will be described. The central potential of the R-Y signal V _R, B-Y signal V _B the center potential, both potential difference
V _R −V _{B is set} to V _OFF , the resistance of the resistor 36 is set to R ₁ , and the resistance of the resistor 38 is set to
It is assumed that R ₂ , the resistance value of the resistor 40 is R ₃ , and the potential of the LALT pulse is V ₁ during the RY period, and is the ground potential during the BY period. this
Due to the potential of the LALT pulse, in terms of an equivalent circuit, the resistor 40 is connected in parallel with the resistor 36 during the RY period, and the resistor 40 is connected in parallel with the resistor 38 during the BY period. Therefore R
Bias potential for the diodes 32 and 34 in the -Y period (i.e., resistor 36 and a connection point of the potential of the same 38) V ₂ is equal to the V _B, and the bias potential with respect to the diode 32, 34 in the B-Y period V ₃ is to be equal to the V _{R is, V 1, V 2, V} 3, R 1, R 2, the following relation between R ₃ must be established.

Select R ₁ , R ₂ , and R ₃ that satisfy the relations of equations (1) and (2) and that provide an appropriate ratio between the input resistor 30 and the diodes 32 and 34, for example, 2: 1. For example, RY, BY
In each of the periods, a well-balanced amplitude compression can be performed. The result is shown in FIG. FIG. 2A shows a color difference line sequential signal applied from the switch 26 to the resistor 30.
2B shows a signal at the output terminal 42 of the amplitude limiting circuit 28.

The purpose of the amplitude control circuit 28 is to perform amplitude compression in order to compensate for the shortage of the dynamic range of the signal processing circuit after the color difference line sequentialization. For this reason, the forward resistance and resistance 36 of the diodes 32 and 34 are , 38, and 40,
The output impedances of the clamp circuits 18 and 20 are not negligible, and have a characteristic that the amplitude compression ratio changes according to the input amplitude as shown in FIG. 2 (b).

Without But also referred, LALT pulse may be a pulse that changes between different potential rather than between the potential V ₁ and the ground,
Similar effects can be achieved by selecting appropriate R ₁ , R ₂ , and R ₃ .

On the other hand, when a color difference line sequential signal is actually recorded / reproduced, a pre-emphasis process for raising a high-frequency component of the signal and a de-emphasis process for restoring the original signal are performed in order to prevent image quality deterioration due to the recording / reproduction. Will be FIG. 3 shows a state of the pre-emphasis-de-emphasis. 3A shows an input waveform, FIG. 3B shows a waveform after pre-emphasis, and FIG. 3C shows a reproduced waveform after de-emphasis. An output (reproduced) waveform equal to the input waveform is obtained by pre-emphasis-de-emphasis. However, if a signal having an excessive amplitude is present during recording, a correct waveform is not reproduced at the time of reproduction. Clipping is applied vertically and symmetrically with respect to a potential (for example, RY center potential). FIG. 4 shows a conventional circuit for this purpose.

In the conventional circuit shown in FIG. 4, two diodes biased at a constant potential obtained by dividing a constant voltage power supply 62 by resistors 58 and 60 are used.
The amplitude of the input signal at the input terminal 50 is limited by 54 and 56, and the input resistor 52 is set so that the impedance due to the forward resistance of the diodes 54 and 56 and the resistance of the resistors 58 and 60 can be ignored. To realize steep clipping characteristics. 64
Is an output terminal. FIG. 5 shows the pre-emphasis when this circuit is employed for the input waveform of FIG. 3 (a).
Shows de-emphasis characteristics. In the circuit of FIG. 5, RY
So that the clip is applied symmetrically to the center potential,
Since the resistors 58 and 60 are set, as shown in FIG. 5, the BY signal is vertically asymmetrically clipped, and the reproduced waveform is also vertically asymmetric.

Applying the idea of the present invention to this clipping circuit, RY
Diodes 58 and 60 for the signal and the BY signal, respectively.
The above problem is solved by changing the bias voltage. An example is shown in FIG. As in the case of FIG. 1, a resistor 66 is connected between the LALT signal line and a bias potential point (connection point between the resistors 58 and 60) to the diodes 58 and 60, and a bias to the diodes 58 and 60 is connected. Each resistance value is selected such that the potential matches the RY center potential in the RY period, and matches the BY center potential in the BY period. FIG. 7 is a characteristic diagram thereof. As can be seen from FIG.
The reproduced waveform of both the signal and the BY signal is vertically symmetric.

In the above description, a line-sequential signal has been described. However, the present invention is not limited to this, and can be applied to a sequential signal having a different clamp level.

〔The invention's effect〕

As can be understood from the above description, according to the present invention, the amplitude of the sequential signal in which the first color component signal and the second color component signal having different levels in the pedestal period appear sequentially in a predetermined cycle is determined. It becomes possible to limit the amplitude within a well-balanced range.

[Brief description of the drawings]

1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a characteristic diagram of FIG. 1, FIG. 3 is a characteristic diagram of pre-emphasis-de-emphasis, and FIG. FIG. 5 is a characteristic diagram of FIG. 4, and FIG.
FIG. 7 shows an embodiment of a clip circuit according to the present invention, and FIG.
It is a characteristic view of a figure. 10, 12, 50 ... input terminals, 18, 20 ... clamp circuit, 28 ...
… Amplitude limiting circuit, 42,64 …… Output terminal

Claims (2)

(57) [Claims] 1. A switching signal for inputting a first color component signal and a second color component signal having a level different from that of the first color component signal in a pedestal period, and changing the level in a predetermined cycle. Output means for sequentially outputting either one of the first color component signal and the second color component signal input according to the following: and inputting the signals sequentially output from the output means, and the amplitude of the input signal And an amplitude control means for limiting the output to within an amplitude range that changes in accordance with a change in the level of the switching signal. 2. The signal processing circuit according to claim 1, wherein said first and second color component signals are color difference signals.