JP2591857B2 - Clock dependent method - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock-dependent system, and more particularly to a clock-dependent system of a digital transmission system having a multiplexed configuration in which processing units having independent operation systems operate in synchronization with each other.

[Conventional technology]

Conventionally, in a transmission system in which processing units having independent operation systems are multiplexed, a clock extracted from a transmission path,
When the operation is performed in accordance with the clock from the external clock generator or the clock of the oscillator in each processing unit, the operation is performed independently for each processing unit as shown in FIG.

In FIG. 2, each of the processing units 300, 400, 500 includes an oscillator 31, 41, 51 for generating an internal 8 KHz clock (b, c, d) and a frequency divider (1 / n) 32, 42, 52, respectively. Selection circuits (SEL) 330, 430, 530, and tank circuits 34, 44, 5 for extracting external 8 KHz clocks (e, f, g) from the external 64K + 8 KHz bipolar signal (a), respectively.
4 and a PLO (phase
Locked oscillators 35, 45 and 55, an external clock generator 10 for outputting a 64K + 8KHz bipolar signal (a), and a transmission line dependent 8KHz clock (l)
Is connected to the channel interface unit 200 that outputs Each of these processing units receives an internal 8 kHz clock and an external 8 kHz clock according to the clock selection signal (s).
Select either the Hz clock or the transmission line dependent 8 KHz clock, and operate in synchronization with that clock.

[Problems to be solved by the invention]

In the above-described conventional clock dependent method, when each processing unit operates dependently on the transmission path dependent clock extracted from the transmission path, it is possible to operate each unit synchronously. When operating independently, processing units with independent operation systems are affected by variations in the performance of internal components and changes in the surrounding environment, and the clocks are not synchronized with each other. There is a drawback that a data error occurs and various alarms such as a parity alarm and an inter-unit path monitoring alarm occur in the non-working system.

[Means for solving the problem]

The clock-dependent system according to the present invention is a clock-dependent system for a digital transmission system having a multiplexed configuration in which processing units having independent operation systems operate synchronously with each other. External clock generating means for generating an external clock based on a clock from the CPU, and selecting means for selecting any of the internal clock and the external clock and outputting the selected clock as an operation system clock are provided in each of the processing units. An operation system clock selection circuit for selecting any one of the operation system clocks output from the selection means of each processing unit and outputting the selected operation system clock as an operation system subordinate clock; Between the dependent clock and the transmission path dependent clock extracted from the transmission path A slave clock selection circuit for selecting any of the shifts and distributing it as a reference clock to each of the processing units, wherein the selection means of each of the processing units, the operation system clock selection circuit, and This is a configuration for performing selection control of a slave clock selection circuit.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, and shows only a clock-related portion in a triple configuration.

First, the case where the slave operation is performed by the clock extracted from the transmission line will be described. The transmission line dependent 8 KHz clock (l) extracted from the transmission line in the channel interface unit 20 is input to the dependent clock selection circuit 22 and is selected by the information on the transmission path dependent side of the dependent clock selection signal (p), and the reference 8 KHz clock is output. (M) as processing unit 3
It is distributed to PLOs 35, 45, 55 of 0, 40, 50, respectively.

Next, a case will be described in which operation is performed in accordance with the clock of an externally provided clock generator. A 64K + 8KHz bipolar signal (a) is output from the external clock generator 10 and distributed to the processing units 30, 40, 50, respectively.
4, 44 and 54 are input. Each tank circuit 3
4,44,54 are external 8K from 64K + 8KHz bipolar signal (a)
Hz clocks (e, f, g) are extracted and input to the selection circuits (SEL) 33, 43, 53 in the respective units. Each input external 8KHz clock (e, f, g)
Are output as operation system clocks (h, i, j) according to information on the external side of the external / internal dependent selection signal (n), respectively.
According to the information of the operation system selection signal (o) inputted to the operation system clock selection circuit 21 in the channel interface unit 20, one of the two operation system clocks (h, i, j) is
One of them is set as an operation system dependent 8 KHz clock (k). The operating system dependent 8 KHz clock (k) is input to the dependent clock selecting circuit 22 together with the transmission path dependent 8 KHz clock (l), and is selected based on information on the operating system dependent side of the dependent clock selection signal (p). The clock is distributed to each of the PLOs 35, 45, and 55 of 30, 40, and 50 of each processing unit as an 8 KHz clock (m).

Next, a case where the operation is performed in accordance with the clock of the internal oscillator in the processing unit will be described. Each of the processing units 30, 40, and 50 has an internal 8 KHz from each of the clocks of the oscillators 31, 41, and 51 provided by the respective frequency dividing circuits 32, 42, and 52.
Clocks (b, c, d) are generated and input to the selection circuits 33, 43, 53 in each unit. The input internal 8 KHz clocks (b, c, d) are based on the information on the internal side of the external / internal dependent selection signal (n), and the operation system clocks (h, i,
j), and is input to the operation system clock selection circuit 21 in the channel interface unit 20, and the operation system clock (h,
i, j) One of the three clocks is selected, and the operating system is dependent on 8KH
Let it be z clocks (k). The operation system dependent 8 KHz clock (k) is input to the slave clock selection circuit 22 and is selected by the information on the operation system slave side of the slave clock selection signal (p). Each of the processing units 30 as a reference 8 KHz clock (m). , 40, and 50 PLOs 35, 45, and 55, respectively.

[Effects of the Invention] As described above, the present invention is based on a clock extracted from a transmission path and an external clock generated by each processing unit when performing clock dependency in a transmission system in which processing units are multiplexed. By selecting one clock from the clock and the internal clock and distributing it to each processing unit as a reference clock,
When switching the operation system, there is an effect that it is possible to suppress a data error caused by a clock phase shift due to a non-synchronization of each processing unit as in the related art and an alarm generated thereby.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of an example of a conventional clock dependent system. 10 external clock generator, 20 channel interface unit, 21 operating clock selection circuit, 22
… Dependent clock selection circuit, 30,40,50 …… Processing unit,
31,41,51 …… Oscillator, 32,42,52 …… Division circuit, 33,43,53
…… Selection circuit, 34,44,54 …… Tank circuit, 35,45,55 ……
PLO.

Claims (1)

(57) [Claims] An internal clock generating means for generating an internal clock in a clock dependent system of a digital transmission system having a multiplexing configuration in which processing units having independent operation systems operate synchronously with each other, and a clock from an external clock generating device. An external clock generating means for generating an external clock based on the above, and a selecting means for selecting any of the internal clock and the external clock and outputting the selected clock as an operation system clock are provided in each of the processing units, and the processing units are respectively provided. An operating system clock selecting circuit for selecting any one of the operating system clocks output from the selecting means and outputting the selected operating system clock as an operating system dependent clock; and an operating system dependent clock from the operating system clock selecting circuit. Select one of the transmission line dependent clocks extracted from the transmission line A subordinate clock selection circuit for distributing the sub clock to each of the processing units, wherein each of the selection means of each of the processing units, the operation system clock selection circuit, and the subordinate clock selection circuit corresponds to a designated subordinate. A clock dependent method characterized by performing selection control.