JP2587142B2 - Video signal recording and playback device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal recording / reproducing apparatus which records a color signal in the form of a line-sequential color signal and, upon reproduction, interpolates the line-sequential color signal to obtain a video signal output. It is.

[0002]

2. Description of the Related Art A video signal recording / reproducing apparatus (hereinafter referred to as "VT")
R ”) is a time-division multiplexed signal (hereinafter referred to as a“ time division multiplexed signal ”) in order to realize high image quality by avoiding image quality deterioration caused by interference between a color signal and a luminance signal of a video signal due to recording and reproduction. , "TCI signal"), and then perform recording and reproduction.

For example, the color signal P _B signal, and P _R signals
When in this two color signals P _B, P _R signal (hereinafter,
The bandwidth (corresponding to the horizontal resolution) of the “P _B and P _R signals” is less than half of the luminance signal Y (hereinafter referred to as the “Y signal”), so the vertical resolution of the P _B and P _R signals the by half, to a KazuSatoshi, P _B for each scan line, P _R signals selected by line sequential P _B, P _R signal (hereinafter, "P _B / P _R signals"
) , And the P _B and P _R signals are time-division multiplexed with the Y signal. FIG. 6 is a diagram showing the waveform of the TCI signal. H in the figure indicates a horizontal scanning period of the video signal. The P _B , P _R, and Y signals are time-axis-compressed for each scanning line, and time-division multiplexed with a negative horizontal synchronization signal indicating each scanning line unit.

FIG. 4 is a block circuit diagram showing the configuration of a reproduction system signal processing circuit in a conventional VTR, where 1 is a magnetic tape, 2 is a magnetic head, 3 is an amplifier, and a magnetic head 2
To amplify the reproduced FM signal. 4 is an FM demodulator and 5 is an A / D converter, which converts the FM demodulated TCI signal into a digital signal. 6 is a TCI decoder,
From CI signal restores the Y signal and the P _B / P _R No. signal. 7 is a color signal interpolation circuit, the two color signals from the P _B / P _R signals (hereinafter, "P _B signal, P _R signal" hereinafter) to restore.
A D / A converter 10 converts a digital signal into an analog signal. 11 is a matrix circuit, which is Y, P _B , P _R
The signal is converted into G, B, and R signals, which are three primary colors of a video signal. A synchronization adding circuit 12 adds a synchronization signal conforming to the video signal standard to each output of the matrix circuit 11.
Note that a clock signal input to the D / A converter 10 is omitted.

FIG. 5 is a block circuit diagram showing an example of a configuration of the color signal interpolation circuit 7. Reference numerals 13 and 14 denote delay circuits for delaying an input signal by one horizontal scanning period, reference numeral 15 denotes an addition circuit, and reference numeral 16 denotes a value of the input signal. A coefficient multiplier 17 for multiplying by 、 is a selector for selecting and outputting an input signal. That is, the above configuration constitutes an interpolation filter for the P _B and P _R signals.

Next, the operation will be described with reference to signal form diagrams shown in FIG. 7 and FIG. FIG. 7A shows that T
FIG. 3 is a diagram showing a form of a P _B / P _R signal of a CI decoder 6. Here, the number of effective scanning lines in one field is n,
n is an even number. The numbers added to the symbols P _B and P _R in the figure represent the scanning line numbers. That is, P _B / P _R
Signal, and P _B signal of the even number scan lines, and a P _R signal odd-numbered scan lines. Parts other than the video information, such as the vertical blanking section and the horizontal blanking section, are at the 0 level of the color signal (representing the achromatic color, hereinafter referred to as “CB level”).

The P _B / P _R signal is supplied to a color signal interpolation circuit 7.
, And the P _R signal and P _R signal shown in FIGS.
Converted to _B signal. This P _R signals, 1H period before the first scan line, appear (CB + P _R1) / 2 becomes signal,
In the P _B signal, (P _Bn
+ CB) / 2.

On the other hand, from the TCI decoder 6, FIG.
As shown in (d), the outputs P _B ,
And P _R signals, so that the corresponding scan line number is taken, P _B /
P from _R signal 1H delayed Y signal is output. Where P
_B, and corresponds to the CB level P _R signals, the vertical and horizontal blanking portions black level (hereinafter, referred to as "YB level") has become.

[0009] Y, P _B, P _R signals, D / A converter 10
Is converted into an analog signal by the matrix circuit 11
Is converted into G, B, and R signals. Here, the conversion equation is as shown in the following Expression 1.

[0010]

(Equation 1)

Note that, for reference, the Y, P,
_{B, submitted} to the number 2 matrix equation to transform into P _R signals.

[0012]

(Equation 2)

[0013] Figure 8 is FIG. 7 (b), the can (c), P _R, 1H front portion of the first scan line of the P _B Y signal shown (d), the
G In the matrix circuit 11, B, in signal form diagram showing a state to be converted into R signal, Y, P _B, the specific form of the P _R signals, FIG. 8 (a), (b) , (c) It is assumed to be as shown in FIG. That is, as described above, Y, P _B signals are each YB, CB level, P _R signals,
The result of the operation of (CB + P _R1 ) / 2 is shown in FIG. Here, the level of the Y signal is 0 to 1 (0
But black, 1 is assumed to obtain a value of white), P _B, P _R signal level is assumed to obtain a value of -0.5 to 0.5.

FIGS. 8D to 8F show the matrix circuit 1
1, which shows the form of the output signal. As is apparent from the figure, the G signal and the R signal have a portion where the signal level has a negative value. FIG. 8 (g) is a diagram showing the form of the R signal at the output of the synchronization adding circuit 12. As the synchronization signal, a ternary synchronization signal (having a value of ± 0.429 around the 0 level) is assumed. doing.

As described above, 1H of the first scanning line
A portion having a signal level equivalent to the negative sync level may occur in the previous signal portion. A similar phenomenon can also occur in the signal portion 1H after the n-th scanning line, as is clear from FIG.

In the synchronization adding circuit 12, FIG.
In addition to the horizontal synchronization signal shown in the above, a vertical synchronization signal having a negative pulse portion wider than at least the horizontal synchronization signal is also added to a part of the vertical blanking period, and the timing of adding this vertical synchronization signal is as follows. It is supplied from the TCI decoder 6.

[0017]

In a conventional VTR that obtains an output of a video signal after interpolating a line-sequential color signal,
In a period other than the synchronization signal of the output video signal, the signal level may be equivalent to that of the synchronization signal. In a video device such as a TV to which the output of this VTR is input or another VTR, malfunction of synchronization separation detection may be caused. There was a problem of triggering.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problem. In a VTR that obtains a video signal output after interpolating a line-sequential color signal, the signal level is set to a predetermined level in a period other than the synchronization signal. The purpose of the present invention is to obtain a VTR that does not deviate from the level range.

[0019]

The VTR according to the present invention comprises:
And means for generating a control signal indicating that becomes a predetermined level or less there is a Y signal level, and a clock signal control means for controlling the clock signal of the D / A converter, the black
Tsu In click signal control below a predetermined level period where there is a Y signal by means stops the clock signal of the D / A converter P _B, P _R signals, characterized in that was set to CB level.

[0020]

According to the present invention, the signal levels of the P _B and P _R signals output from the D / A converter surely become 0 level while the signal level of the Y signal is below a certain level. G. output from the circuit B. The signal level of the R signal does not become negative.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block circuit diagram showing a configuration of a reproduction system signal processing circuit. The same parts as those in FIG. In the figure, 8 is a ROM, 9 is a logic circuit,
The ROM 8 supplies a control signal indicating that the signal level of the Y signal has become equal to or lower than a predetermined level to the logic circuit 9, and the logic circuit 9 converts the clock signal into a D / A converter 10 based on the control signal supplied from the ROM 8. Output to Note that the clock signal for the Y signal supplied to the D / A converter 10 is omitted.

Next, the operation of this embodiment will be described with reference to the signal form diagrams shown in FIGS. 2, 3 and 7.

In this embodiment, if the video signal is 8-bit digital data, the gradation is from 0 to 255.
Up to. Now, assume that the highest white level of the Y signal level is 240, and the lowest black level is 70.

P _R , P output from the color signal interpolation circuit 7
_{The B} signal is input to the D / A converter 10 in the form shown in FIGS. 7B and 7C as in the conventional example. On the other hand, the Y signal is R
It is also input to OM8. The ROM 8 outputs a control signal which becomes "0" as shown in FIG. 7 (e), for example, when the digital data of the Y signal becomes 80 or less, for example, and becomes "1" when it exceeds 80.

The logic circuit 9 to which the control signal has been input is:
As shown in FIG. 2, the clock signal is supplied to the D / A converter 10 only during the period when the output signal of the ROM 8 is "1".
The section of “0” stops the clock signal. For this reason,
As shown in FIGS. 3A and 3B, it is always at the CB level except during the vertical effective video period. Therefore, in the present embodiment, the phenomenon that the signal level of the output of the matrix circuit 11 becomes a negative value unlike the conventional device does not occur, and the levels of the G, B, and R signals after the addition of the synchronization signal are reduced. Only the sync signal portion has a negative value.

In the above embodiment, a VTR is taken as an example of a video signal recording / reproducing apparatus. However, a video disc player may be used, and the same effects as in the above embodiment can be obtained. In the above embodiment, the signal levels are compared in the ROM. However, the present invention is not limited to this example, and other signal level comparison circuits have the same effects as the above embodiments. Further, in the above embodiment, the clock signal control means and
The AND circuit is used to turn on / off the clock signal. However, the present invention is not limited to this example, and the same effect can be obtained as long as the clock signal can be turned on / off.

[0027]

As is evident from the foregoing description, according to the present invention, the period level of the luminance signal is zero neighborhood, P _B signals and P _R
Since the clock signal input to the D / A converter for converting a signal into an analog signal is stopped, a video signal compliant with the video signal standard can be always output.
There is an effect that a video signal recording / reproducing device can be obtained.

[Brief description of the drawings]

FIG. 1 is a block circuit diagram of one embodiment of the present invention.

FIG. 2 is a diagram illustrating a form of an output signal of each unit according to the embodiment.

FIG. 3 is a diagram illustrating a form of an output signal of a D / A converter 10 according to the present embodiment.

FIG. 4 is a block circuit diagram showing a configuration of a reproducing system of a conventional video signal recording / reproducing apparatus.

FIG. 5 is a block circuit diagram of a color signal interpolation circuit.

FIG. 6 is a waveform diagram of a TCI signal.

FIG. 7 is a diagram showing a form of an output signal of each unit in the conventional example.

FIG. 8 is a diagram showing the form of input / output signals of a conventional matrix circuit and the waveform of an output R signal of a synchronization adding circuit.

[Explanation of symbols]

 Reference Signs List 5 A / D converter 6 TCI decoder 7 Color signal interpolation circuit 8 ROM 9 Logic circuit 10 D / A converter 11 Matrix circuit 12 Synchronous addition circuit

Claims (1)

(57) [Claims] 1. A video signal recording / reproducing apparatus which obtains a reproduced color signal output in an analog signal state by a D / A converter after performing an interpolation process by a color signal interpolating circuit constituted by a digital circuit of a reproduced line sequential color signal. Means for generating a control signal indicating a period in which the luminance signal level has become equal to or lower than a predetermined level; and stopping a clock signal supplied to the D / A converter during a period in which the control signal is significant, thereby setting the level of the color signal to zero. Aya
A video signal recording / reproducing apparatus comprising: means for setting a color level.