JP2576574B2 - Bipolar transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] Regarding the structure of a bipolar transistor having a heterojunction, an object is to reduce the number of crystal defects.
A base region made of an opposite conductivity type SixGe _1-x (silicon germanium) mixed crystal is provided, and the base region has a one conductivity type collector region in which impurities are diffused or implanted, and
The base region of SixGe _1-x has a mixed crystal composition in which the x value gradually decreases from 1 from the emitter side to the collector side.

[Industrial applications]

The present invention relates to a structure of a bipolar transistor having a heterojunction.

Heterojunction bipolar transistors (HBTs) are attracting attention and are being studied as future high-speed LSIs (large-scale integrated circuits).

[Conventional technology]

Now, among the heterojunction bipolar transistors, Si
A heterojunction bipolar transistor provided with a base made of Ge (silicon germanium) mixed crystal is known.
FIG. 3 is a schematic sectional view of the conventional heterojunction bipolar transistor. In the figure, 1 is an n ⁺ -Si collector region, 2 is a p-SixGe x base region, 3 is an n ⁺ -SixGe x emitter region, 4 is an insulating film, 5 is a polysilicon film, 1E is a collector electrode, and 2E is The base electrode 3E is an emitter electrode. To form this structure, a p-SiGe _1-x (for example, x value increases from 0.7 to 1) base region 2 (graded base) is heteroepitaxially grown on the collector region 1. A method of diffusing or implanting impurities into the base region to form the emitter region 3 is used.

Among them, the base region is a graded base region, and the x value of SixGe _1-x mixed crystal is increased from the collector side toward the emitter side. A small built-in electric field is formed, so that the base transit time of the minority carrier is reduced, and the transistor can operate at high speed.

[Problems to be solved by the invention]

However, in the conventional heterojunction bipolar transistor having the above structure, the amount of Si at the junction of the base region in contact with the collector region is small, for example, the x value is as small as about 0.5 to 0.7, and the amount of other Ge is large. However, there is a disadvantage that the lattice constant of the collector region and the base region is largely different from each other, so that a good epitaxial growth layer cannot be obtained and a large number of crystal defects occur in the base region. Such a defect causes deterioration of transistor characteristics.

The present invention proposes a bipolar transistor having a structure with reduced crystal defects.

[Means for solving the problem]

Its purpose is to form an emitter region consisting of one conductivity type Si,
A base region made of an opposite conductivity type SixGe _1-x mixed crystal is provided, the base region has a one conductivity type collector region in which impurities are diffused or implanted, and the x value of the base region made of the SixGe _1-x Is 1 from the emitter side to the collector side.
This is achieved by a bipolar transistor having a mixed crystal composition that gradually decreases from the same.

(Operation)

That is, the present invention has a structure in which the collector and the emitter of the conventional structure are reversed. Equal and follow the collector to Ge
A structure in which the amount is increased to change the lattice constant. Then, an epitaxial growth layer with few defects and good crystal quality is formed, and crystal defects in the base region are reduced, so that transistor characteristics can be improved.

〔Example〕

 Hereinafter, embodiments will be described in detail with reference to the drawings.

FIG. 1 is a schematic cross-sectional view of a heterojunction bipolar transistor according to the present invention, in which 11 is an n ⁺ -SixGe x collector region, 12 is a p-SixGe x base region, 13 is an n ⁺ -Si emitter region, and 14 is an insulating region. The film, 15 is a polycrystalline silicon layer, 1E is a collector electrode, 2E is a base electrode, and 3E is an emitter electrode.

In this structure, p-SixGe _1-x (x value is 1)
The base region 12 is heteroepitaxially grown, and impurities are diffused or implanted into the base region to form the collector region 11. Therefore, as in the conventional case, the base region 12 is mixed with SixGe _1-x. The x value of the crystal decreases from the emitter side to the collector side, and the energy band gap Eg decreases from the emitter side to the collector side to form a built-in electric field. Therefore, as in the conventional structure shown in FIG.
The speed of the transistor is increased.

In addition, the emitter region 13 is made to be an n ⁺ -Si substrate, and a crystal is grown thereon to heteroepitaxially grow a p-SixGe _1-x (x value decreases from 1 to 0.7) base region 12 (graded base). Therefore, the lattice constant of the base region in contact with the emitter region is equal, and the lattice constant gradually becomes different as it goes to the collector side. A base region with a small number is formed, and the transistor characteristics are improved.

Next, FIGS. 2 (a) to 2 (e) are cross-sectional views in the order of the process of forming the transistor.

See FIG. 2 (a); n ⁺ -S by vapor deposition or MBE.
p-SixGe _1-x (x = 1) on an i-substrate 13 (ρ = 0.001 Ωcm)
0.7) Epitaxially grow the base region 12 (100 nm thick). At this time, when epitaxial growth is performed by the vapor deposition method, the degree of vacuum of the vapor deposition apparatus is set to 10 ⁻⁹ Torr or less, the substrate 13 is heated to remove a natural oxide film on the substrate surface, the substrate temperature is set to 650 ° C. The Si source and the Ge source are separately heated and evaporated by a type electron gun, and the X value is gradually changed from 1 to 0.7 while monitoring the amount of deposition. Also, 10 ¹⁹ / c
m ³ approximately contained to furuncle p-type.

Then, referring to FIG. 2 (b); a resist film mask (not shown) is applied to the base region using lithography, and the portion other than the base region is removed by etching by reactive ion etching.

Next, as shown in FIG. 2C, an insulating film 14 (thickness: 400 nm) made of a SiO ₂ film is deposited by a chemical vapor deposition (CVD) method, and then an insulating film in a collector region portion is formed by using a lithography technique. 14 is selectively removed to expose the collector region.

Then, an n ⁺ -type polycrystalline silicon film 15 is deposited by a CVD method and heat-treated at 950 ° C. for 20 minutes.
An n ⁺ SixGe _1-x collector region 11 is formed.

Next, as shown in FIG. 2 (e), the polycrystalline silicon film 15 other than the collector region is removed by using a lithography technique, and then the portion where the ring-shaped base electrode is to be formed is removed by using the lithography technique again. I do.

Thereafter, although not shown, aluminum is deposited and patterned to provide a collector electrode 1E on the front surface, a ring-shaped base electrode 2E, and an emitter electrode 3E on the back surface of the substrate,
Complete as shown in FIG.

The above is the structure and forming method of one embodiment according to the present invention. According to this embodiment, the number of defects in the base region is 3.5
The effect was reduced from × 10 ¹⁷ / m ³ to about 1 × 10 ¹⁷ / m ³ , and the recombination current due to the defect was reduced to increase the current gain by about 3.5 times.

Although this embodiment has been described with reference to an npn transistor,
Naturally, it can be applied to an np-type transistor.

〔The invention's effect〕

As is apparent from the above description, the bipolar transistor according to the present invention forms a built-in electric field in the base region, speeds up the base transit time of carriers, and has a structure in which the graded base has few crystal defects. If an LSI is constituted by such transistors, the performance can be improved.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view of a heterojunction bipolar transistor according to the present invention, FIGS. 2 (a) to 2 (e) are cross-sectional views of a transistor according to the present invention in the order of forming steps, and FIG. 3 is a conventional heterojunction bipolar transistor. FIG. 3 is a schematic cross-sectional view of a transistor. In the figure, 11 is an n ⁺ -SixGe _1-x collector region, 12 is a p-SixGe _1-x (x = _{1 to} 0.7) base region, 13 is an n ⁺ -Si emitter region or an n ⁺ -Si substrate, 14 is an insulating film, 15 is a polycrystalline silicon film, 1E is a collector electrode, 2E is a base electrode, and 3E is an emitter electrode.

Claims (1)

(57) [Claims] 1. An opposite conductivity type SixGe _1-x (silicon germanium) is formed on an emitter region made of _one conductive Si (silicon).
A base region made of a mixed crystal is provided, the base region has a one conductivity type collector region in which impurities are diffused or implanted, and the x value of the SixGe _1-x base region is changed from the emitter side to the collector side. A bipolar transistor having a mixed crystal composition gradually decreasing from 1.