JP2574124Y2 - Bridge type inverter - Google Patents

Description

[Detailed description of the invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bridge type inverter in which a microcomputer generates a drive signal having an idle period, and drives the switching element via a transmission transistor by the drive signal.

[0002]

2. Description of the Related Art FIG. 2 shows a conventional bridge type inverter. Transistors 11 and 12 as switching elements
Are connected in series, and transistors 13 and 14 as switching elements are connected in series. Both ends of these series connection are connected to both ends of a DC power supply 15, and the transistors 11 to 14 are bridge-connected. On the other hand, the drive signal from the drive signal generator 16 is supplied to the idle period generation circuits 17 and 18.
To the idle period generating circuit 21,
22, respectively. Pause period generation circuit 17, 1
Outputs of 8, 21, 22 are supplied to respective bases of transmission transistors 23, 24, 25, 26, respectively.

The transmission transistors 23, 24, 25, 2
6 are grounded, and their collectors are connected to the input sides of the driving circuits 27, 28, 29 and 31, respectively. Output sides of the driving circuits 27, 28, 29, 31 are connected to respective bases of the transistors 11, 14, 12, 13. An operating voltage V _DD is applied to the drive circuits 27, 28, 29, 31 and the drive signal generator 16 from a power supply terminal 32.

The idle period generating circuit 17 is configured as shown in FIG. 3A. An input terminal 33 is connected to one input side of an AND circuit 35 via a resistor 34 and directly connected to the other input side of the AND circuit 35,
The connection point of the AND circuit 35 is grounded through a capacitor 36, and a diode 37 is connected in parallel with the resistor 34. When the drive signal shown in FIG. 3Ba is input to the input terminal 33, the rise of the connection point of the resistor 34 and the capacitor 36 becomes as shown in FIG. 3Bb, and the charge of the capacitor 36 is discharged through the diode 37 at the fall. . As shown in FIG. 3Bc, at the output terminal 38 of the AND circuit 35, a drive signal whose rising is delayed by a pause period ΔT with respect to the input drive signal is obtained. The idle period generating circuits 18, 21, 22 are similarly configured.

The drive circuit 27 is configured as shown in FIG. 3C, for example. The light emitting diode 39a of the photocoupler 39 is connected between the power supply terminal 32 and the collector of the transmission transistor 23 in FIG.
9b is connected to the positive side of the power supply 15 and the emitter is connected through a resistor 41 to an npn transistor 42, pnp
Connected to each base of the transistor 43 and to the collector of the transistor 43 through a resistor 44,
The respective emitters of the transistors 42 and 43 are connected to each other and connected through a resistor 45 to the base of the transistor 11 as a switching element. The collector of the transistor 42 is connected to the positive side of the power supply 15.

When the transmission transistor 23 is turned on,
The light emitting diode 39a emits light and the phototransistor 3
A current flows through 9b, a part of the current flows through the resistor 41 and the base of the transistor 42, and the transistor 42 is turned on. The emitter current of the transistor 42 flows to the base of the transistor 11 and the transistor 11 is turned on. When the transmission transistor 23 is turned off, no current flows through the phototransistor 39b, and the charge stored in the base of the transistor 11 is rapidly discharged through the transistor 43. The driving circuits 28, 29, 31 are similarly configured.

The simultaneous turning on of the transistors 11 and 14 and the simultaneous turning on of the transistors 12 and 13 are alternately performed.
For example, when the transistor 11 is turned on and the transistor 12 is not completely turned off, the transistors 11 and 12 are simultaneously turned on, the power supply 15 is short-circuited, and the transistors 11 and 12 are destroyed. Even if the transistor is switched from on to off, it does not turn off immediately due to the charge accumulation effect. For this reason, the transistor 11, 11,
The above-described pause period ΔT is provided between the alternate driving of the switches 14, 12 and 13.

[0008]

As described above, since one idle period generating circuit 17, 18, 21, 22 is provided for each of the transistors 11 to 14, there is a problem that the number of parts increases. Was. Therefore, as shown in FIG.
From 6, a drive signal having an idle period is alternately generated at the terminals 47 and 48, the drive signal at the terminal 47 is simultaneously supplied to each base of the transmission transistors 23 and 24, and the drive signal at the terminal 48 is transmitted to the transmission transistor 25. , 26 to each base. In this way, the idle period generating circuits 17, 18, 21, 22 can be omitted, and the drive signal generator 46 can be shared by a microcomputer used in a device used with the inverter.

However, when the microcomputer of the drive signal generator 46 goes out of control or the microcomputer is reset, the transistors 23 to 26 are connected to the terminals 47 and 48, respectively.
May be generated at the same time. In such a state, the power supply 15 is connected to the transistors 11, 1
Short circuit occurs at 2, 13, and 14. The idea is to avoid this situation.

[0010]

According to the present invention, a drive signal generator for generating a drive signal having a pause is used, which comprises a microcomputer, and is provided for two switching elements connected in series to a DC power supply. A protection transistor is connected in parallel with one drive signal input side of the transmission transistor, and a control electrode of the protection transistor is connected to the other control electrode of the two transmission transistors.

[0011]

FIG. 1 shows an embodiment of the present invention, in which parts corresponding to those in FIG. 4 are denoted by the same reference numerals. In this embodiment, the protection transistor 5 is connected to each input side of the transmission transistors 23 and 24, that is, to each base-emitter.
The collectors and emitters of the transistors 1 and 52 are connected, and the bases of the transistors 51 and 52 are connected to the terminal 48 through resistors 53 and 54, respectively, as necessary. The bases of the transfer transistors 25 and 26 are also connected to the terminal 48 through resistors 55 and 56, respectively, and the bases of the transfer transistors 23 and 24 are connected to the terminal 47 through resistors 57 and 58, respectively, as necessary. You.

According to this configuration, when the terminal 47 is at the high level by the drive signal and the terminal 48 is at the low level, only the transmission transistors 23 and 24 are turned on, and the transistor 1 is turned on.
When only the terminals 1 and 14 are turned on and the terminal 47 is at the low level and the terminal 48 is at the high level by the drive signal, only the transmission transistors 25 and 26 are turned on and the transistors 12 and
Only 13 is turned on, and the inverter operation is performed.

If the terminals 47 and 48 simultaneously become high level for some reason, the transmission transistors 25, 26
Are both turned on, but the protection transistors 51 and 52 are also turned on at the same time, so that the bases of the transmission transistors 23 and 24 are grounded, and both the transmission transistors 23 and 24 are turned off. . Therefore, transistors 11 and 12 and transistor 13
And 14 are not turned on at the same time. That is, the power supply 15 does not enter a short circuit state.

Note that transistors 25 and 51 and 2
6 and 52 have characteristic variations, the transistors 25 and
The transistor 26 may be turned on first and the transistors 51 and 52 may not be turned on. Resistors 53, 55, 54, 5
Reference numeral 6 is for preventing such a problem from occurring. When the transistors 51 and 52 are turned on, the terminal 47 is grounded, and the power supply of the drive signal generator 46 may be short-circuited. In such a case, the resistors 57 and 58 are inserted. .

When a common drive signal is applied to the transistors 23 and 24 and the transistors 25 and 26, one of the protection transistors 51 and 52 may be omitted. The protection transistors 51 and 52 may be connected to the transistors 25 and 26 instead of the transistors 23 and 24. Transistors 11 to 14, 23 to 2
6, 51, 52, etc. are not limited to bipolar transistors, and FETs may be used.

[0016]

As described above, according to the present invention, a protection transistor is provided in parallel with one input side of two transmission transistors corresponding to two switching elements of an inverter which are connected in series with each other. When the transmission transistor is turned on, the protection transistor is also turned on so that the one transmission transistor is not turned on, so there is no possibility that the series switching elements are turned on at the same time.

In addition, since the drive signal generator generates a drive signal having an idle period by the microcomputer, the idle period generating circuit becomes unnecessary and the number of components can be reduced. Circuits such as a transmission transistor and a protection transistor for each of the switching elements 11 to 14 can be configured using one gate array.
In that case, the number of parts can be further reduced.

[Brief description of the drawings]

FIG. 1 is a connection diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional inverter.

3A is a diagram showing a specific configuration of a pause period generating circuit 17, FIG. 3B is an explanatory diagram of its operation, and FIG. 3C is a connection diagram showing a specific example of a drive circuit 27.

FIG. 4 is a block diagram showing a proposed inverter.

Claims (1)

(57) [Scope of request for utility model registration] 1. A bridge-type inverter that generates a drive signal by a microcomputer and drives the switching element via the transmitting transistor by the drive signal, comprising two series-connected DC power supplies in the switching element. A protection transistor is connected in parallel with an input side of one drive signal of the transmission transistor to the switching element, and a control electrode of the protection transistor is connected to the other control electrode of the transmission transistor. Features a bridge type inverter.