JP2000092822A - Driving power supply for semiconductor switching element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to supply electric power stably to the driving circuit of switching elements whatever state the switching elements are in. SOLUTION: Switching elements (insulated-gate bipolar transistors (IGBT)) Q1, Q2 are connected in series between a DC power supply Ed. When they are driven via gate driving circuits GDU1, GDU2 by using only a diode D1 and capacitors C1, C3, electric power cannot be supplied to GDU1 in a conventional art unless Q2 is turned on. This driving power supply circuit makes it possible to charge the capacitor C3 irrespective of the state of Q1, Q2, and to supply electric power to GDU1, by providing components including transistor T1, T2 and an oscillating circuit OCS and by turning on and off T1, T2 alternately.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drive power supply circuit for supplying power to a drive circuit for driving a semiconductor switching element, and more particularly to a stable power supply in any of the ON and OFF states of the switching element. The present invention relates to a driving power supply circuit.

[0002]

2. Description of the Related Art FIG. 5 shows a conventional example of a drive power supply circuit for a switching element using a bootstrap method. That is, between the positive and negative electrodes of the DC power supply Ed, semiconductor switches Q1 and Q2 in which an IGBT (insulated gate bipolar transistor) and a diode are connected in anti-parallel are connected in series with each other.
Drive circuits GDU1 and GDU2 are provided in each IGBT.
The capacitors C1 and C3 are connected to the GDU1 and GDU2, respectively. Further, a DC power supply Vin is connected in parallel with the capacitor C1, and a diode D1 is connected between the positive electrode of the capacitor C1 and the positive electrode of the capacitor C3.

[0003] This circuit comprises drive circuits GDU1 and GDU2.
To turn on and off the Q1 and Q2 alternately to adjust the voltage at the terminal U.
By connecting a plurality of these in parallel, it can be used as a power converter for adjusting the power to the load. Here, when Q2 is turned on, C3 is charged through the path of DC power supply Vin → diode D1 → capacitor C3 → IGBT Q2. The charge charged in C3 is supplied to the drive circuit GDU1, so that the IGBT Q1 can be driven.

[0004]

However, the above-mentioned prior art has the following problems. 1) In order to drive the IGBT Q1, the IGBT Q2 must be turned on without fail. That is, IGBTQ2
Is turned on, the capacitor C3 is not charged, so that the drive circuit GDU1 cannot be driven. This means that I
There is a restriction that GBTQ1 cannot be activated first. 2) In an operation in which only the upper arm is switched for a long time, such as a two-arm modulation operation and a DC chopper operation, the capacitor C3 is not charged.
, The drive circuit GDU1 cannot be driven, and the inverter loses phase. Accordingly, it is an object of the present invention to be able to supply power to a drive circuit of an upper and lower arm irrespective of the ON / OFF state of a switching element.

[0005]

In order to solve such a problem, according to the present invention, a plurality of semiconductor switching elements are connected in series between the positive and negative electrodes of a first DC power supply, and a second DC power supply is connected. A first capacitor is provided in parallel with the power supply, an anode of a first diode is provided on the positive side of the second DC power supply, and a second capacitor is provided in parallel between the cathode of the first diode and the negative electrode of the second DC power supply. A series circuit of a diode, a second capacitor, a first transistor and a series circuit of a constant voltage diode, a resistor, and a second transistor; a third capacitor in parallel with the constant voltage diode; A third diode is connected between a connection point between the second capacitor and the connection point between the constant voltage diode and the resistor, and a connection point between the second capacitor and the first transistor is connected to the constant voltage. Third between the connection point between the diode and the resistor
By connecting the gate terminal of a third transistor to the connection point between the resistor and the second transistor, and driving the first and second transistors alternately on and off by an oscillation circuit, The third capacitor voltage is used as drive power for the positive-side semiconductor switching element.

In the first aspect of the present invention, the third
And a control circuit for validating and invalidating the output of the oscillation circuit based on the output of the voltage detection circuit, when the third capacitor voltage falls below a set value. The output of the oscillation circuit can be made effective by the control circuit, and the first and second transistors can be turned on and off alternately (the invention of claim 2), or the on / off state of the semiconductor switching element can be changed. A state detection circuit for detecting the output of the oscillation circuit;
Can be alternately turned on and off (the invention of claim 3), or a timer circuit for detecting the on / off state of the semiconductor switching element, and comparing the output of the timer circuit with a preset time A comparison circuit is provided, and when the ON or OFF state of the semiconductor switching element exceeds a predetermined time, the output of the oscillation circuit is made valid, and the first and second transistors can be turned on and off alternately ( The invention of claim 4).

[0007]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention. As shown, semiconductor switches Q1, Q2 in which an IGBT and a diode are connected in anti-parallel.
Are connected in series between the positive and negative electrodes of the DC power supply Ed, and drive circuits GDU1 and GDU2 are connected respectively. A capacitor C1 is connected in parallel with the DC power supply Vin, an anode of the diode D1 is connected to the positive electrode of the DC power supply Vin, and a diode D2, a capacitor C2, and a transistor T2 are connected in parallel between the cathode of the diode D1 and the negative electrode of the DC power supply Vin.
1 and a constant voltage diode ZD1, a resistor R1,
A series circuit of the transistor T2 is connected to a constant voltage diode ZD.
1 in parallel with the capacitor C3, the connection point between the diode D2 and the capacitor C2, the constant voltage diode ZD1 and the resistor R2.
1, a diode T3 between a connection point of the capacitor C2 and the transistor T1, a transistor T3 between a connection point of the constant voltage diode ZD1 and the resistor R1, and a gate terminal of the transistor T3 at a connection point of the resistor R1 and the transistor T2. And an output of the oscillator circuit OSC in parallel with the capacitor C1 and transistors T1 and T2, respectively.
Connected to the respective gates. Further, the capacitor C1
And C3 are connected to drive circuits GDU1 and GDU2, respectively.

The operation will be described below. Now, assuming that IGBT Q1 is off and IGBT Q2 is on, power for driving IGBT Q2 is supplied from DC power supply Vin via capacitor C1. Since the capacitor C1 is connected to the DC power source Vin, the voltage of the capacitor C1 does not drop. Further, since the capacitor C3 is charged through the path of the DC power supply Vin → the diode D1 → the capacitor C3 → the IGBT Q2, the voltage of the capacitor C3 does not drop.

Next, the IGBT Q1 is turned on and the IGBT Q
Consider the case where 2 is off. Capacitor C1
Does not droop due to the above. On the other hand, the capacitor C
The voltage of 3 is charged as follows. First, the transistor T1 is turned on and the transistor T2 is turned off. Since the transistor T2 is off, the transistor T3
Is off, the capacitor C2 is charged through the path of the DC power supply Ed → IGBT Q1 → diode D3 → capacitor C2 → transistor T1.

Next, the transistor T1 is turned off and the transistor T2 is turned on. When the transistor T2 is turned on, the transistor T3 is turned on because the gate voltage of the transistor T3 drops. Thereby, the electric charge charged in the capacitor C2 is changed from the capacitor C2 to the diode D2 to the capacitor C2.
3 → Charge the capacitor C3 through the path of the transistor T3. As described above, by alternately turning on and off the transistors T1 and T2, power can be supplied to the capacitor C3 even when the IGBT Q2 is off for a long time, so that power can be supplied to the drive circuit GDU1. Becomes

FIG. 2 is a circuit diagram showing a second embodiment of the present invention. The same parts as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. The difference from FIG. 1 is that a series circuit of resistors R2 and R3 is connected in parallel with the capacitor C3, a series circuit of transistors T4, R4 and R5 is connected in parallel with the series circuit of the diode D1 and the capacitor C1, and resistors R2 and R3 are connected. The point where the gate of the transistor T4 is connected to the point, the connection point between the resistors R4 and R5 and the oscillation circuit O
The point is that the output of the SC is connected to the input of the AND circuit AND, and the output of the AND circuit AND is connected to the inputs of the transistors T1 and T2.

The operation of FIG. 2 is as follows. The gate voltage V _GS of the transistor T4 is represented by the following equation (1), where the voltage of the capacitor C3 is V _C3 . V _GS = R 2 · V _C3 / (R 2 + R 3) (1) If the capacitor C 3 has a voltage sufficient to drive the drive circuit GDU 1, the transistor T 4 is turned on by the equation (1), so that the resistors R 4 and R 5 The voltage at the connection point is the resistance voltage division ratio. Accordingly, the input of the AND circuit AND becomes low (L), and the output of the AND circuit AND is turned off regardless of the output of the oscillation circuit OSC.

Next, when the voltage of the capacitor C3 drops, the transistor T4 is turned off according to the equation (1).
The voltage at the connection point between the resistors R4 and R5 becomes zero. As a result, the input of the AND circuit AND becomes high (H),
The output of the AND circuit AND becomes the same signal as the output of the oscillation circuit OSC, and drives the transistors T1 and T2 to supply charges to the capacitor C3. At this time, the transistor T4
And a resistor R4, R5 for transmitting a voltage of the capacitor C3 detected by the resistors R2, R3 to an AND circuit AND via the inverter INV (a level shift circuit).
It can be said that this forms, together with the inverter INV and the AND circuit AND, a control circuit for validating and invalidating the output of the oscillation circuit OSC. Since other operations are the same as those in FIG. 1, the details are omitted.

FIG. 3 is a circuit diagram showing a third embodiment of the present invention. Here, the same parts as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. The difference from FIG.
The ON / OFF signals of the IGBT and the output of the oscillation circuit OSC are input to an AND circuit AND, and the output is input to a transistor T
1 and T2. In the figure, an ON signal is input to IGBT Q1, and an AND circuit A
When the input of ND becomes H, the output becomes the same signal as the output of the oscillation circuit OSC, so that the transistors T1 and T2 operate. That is, the transistors T1 and T2 are driven only when the IGBT Q1 is turned on, and charges are supplied to the capacitor C3. Other operations are the same as those in FIG.

FIG. 4 is a circuit diagram showing a fourth embodiment of the present invention. Here, the same parts as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. The difference from FIG.
A connection point between the resistor R6 to which the IGBT ON / OFF signal is applied and the capacitor C4, an output obtained by inputting the reference DC power supply Vref to the comparison circuit COMP, and an oscillation circuit O
That is, the output of the SC is input to the AND circuit AND, and the output is introduced to the gates of the transistors T1 and T2.

In FIG. 4, when an ON signal is input to the IGBT Q1, the voltage V _{C4 of the} capacitor _C4 is expressed by the following equation (2), where the _ON signal voltage of Q1 is V _ON . V _C4 = (1−e ^{−t / R6C4} ) V _ON (2) A certain time has elapsed since the ON signal was ^input , and the capacitor C4
When the voltage V _C4 of greater than the reference DC power source Vref, the output of the comparator circuit COMP is inverted H. As a result, the output of the AND circuit AND becomes the same signal as the output of the oscillation circuit OSC, and the transistors T1 and T2 operate. That is, by setting the reference DC power supply based on the capacitance of the capacitor C4, the charge is supplied to the capacitor C3 without detecting the voltage of the capacitor C3.

[0017]

According to the present invention, each of the drive circuits GDU1 and GDU is independent of the ON / OFF state of the switching element.
Since power can be supplied to the DU2, the following effects can be obtained. 1) Even in an operation in which the upper arm is switched for a long time, such as two-arm modulation and a DC chopper operation, there is no droop of the gate voltage, and problems such as phase loss of the inverter do not occur. 2) Since power can always be supplied to the upper arm, the capacity of each capacitor can be reduced, and the device can be downsized. 3) In the second to fourth embodiments, the transistors T1, T
2 is driven when the droop of the gate voltage is detected, wasteful driving power can be reduced, and power consumption of the driving power supply circuit can be reduced.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing a third embodiment of the present invention.

FIG. 4 is a circuit diagram showing a fourth embodiment of the present invention.

FIG. 5 is a circuit diagram showing a conventional example.

[Explanation of symbols]

Q1, Q2: semiconductor switches, Ed, Vin, Vref
... DC power supply, GDU1, GDU2 ... Gate drive circuit, D
1 to D3: diode, C1 to C4: capacitor, R1
R6: resistance, T1 to T4: transistor (MOSFE)
T), ZD1: Zener diode, OSC: Oscillation circuit, INV: Inverter circuit, AND: AND circuit, C
OMP: comparison circuit.

Claims (4)

[Claims] 1. A plurality of semiconductor switching elements are connected in series between positive and negative electrodes of a first DC power supply, and a first capacitor is connected in parallel with a second DC power supply to a positive electrode side of the second DC power supply. The anode of the first diode is
A series circuit of a second diode, a second capacitor, a first transistor and a series circuit of a constant voltage diode, a resistor, and a second transistor are connected in parallel between the cathode of the diode and the negative electrode of the second DC power supply. A third capacitor is provided in parallel with the constant voltage diode, and a third diode is provided between a connection point between the second diode and the second capacitor and a connection point between the constant voltage diode and a resistor. A third transistor is provided between a connection point between the capacitor and the first transistor and a connection point between the constant voltage diode and the resistor, and a gate terminal of the third transistor is provided at a connection point between the resistor and the second transistor. Connected, and the first and second transistors are alternately turned on and off by an oscillation circuit, so that the third capacitor voltage is switched to the positive-side semiconductor switch. Driving power supply circuit of the semiconductor switching elements, which comprises using as the driving power of the quenching device. A voltage detecting circuit for detecting a voltage of the third capacitor; and a control circuit for enabling and disabling an output of the oscillation circuit based on an output of the voltage detecting circuit. Is below the set value,
2. The driving power supply circuit for a semiconductor switching element according to claim 1, wherein the oscillation circuit output is made valid by the control circuit, and the first and second transistors are turned on and off alternately. 3. A state detection circuit for detecting an on / off state of the semiconductor switching element, wherein an output of the oscillation circuit is made effective by a detection output thereof, and the first and second states are provided.
2. The driving power supply circuit for a semiconductor switching element according to claim 1, wherein said transistors are turned on and off alternately. 4. A timer circuit for detecting the on / off state of the semiconductor switching element, and a comparison circuit for comparing the output of the timer circuit with a preset time, so that the on / off state of the semiconductor switching element is constant. When the time is exceeded, the output of the oscillation circuit is made effective,
2. The driving power supply circuit for a semiconductor switching element according to claim 1, wherein the second transistor is turned on and off alternately.