JP2571090Y2 - Watchdog circuit - Google Patents

Description

[Detailed description of the invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a watchdog circuit for detecting runaway of a microcomputer.

[0002]

2. Description of the Related Art Conventionally, a watchdog circuit is provided for detecting a runaway of a microcomputer (hereinafter simply referred to as a microcomputer). The watchdog circuit is
When the period of the watchdog pulse signal output from the microcomputer is delayed, it is determined that the microcomputer is running out of control. In other words, a command for outputting a pulse signal to the watchdog circuit is incorporated in the control software of the microcomputer, and the pulse signal is output at a predetermined cycle if the microcomputer is operating normally according to the control software. This is based on the fact that a signal output at a predetermined cycle cannot be obtained during a runaway.

Here, an example of a conventional watchdog circuit will be described with reference to FIG. The watchdog circuit includes a pulse delay detection unit 10 (watchdog IC) and a delay time setting capacitor 20. The pulse delay detection unit 10 includes a pulse input unit 11 for inputting a watchdog pulse signal from a microcomputer, a capacitor charging unit 12 for charging a delay time setting capacitor 20, and a pulse signal input to the pulse input unit 11. Capacitor discharging unit 13 that discharges capacitor 20 at the falling edge
A voltage comparison unit 14 for comparing the capacitor voltage Vc with the reference voltage Vref, and a reset output unit 15 for outputting a reset signal to the microcomputer in synchronization with the voltage comparison signal.

Here, in order to explain the operation of the watchdog circuit, consider the case where a watchdog pulse signal as shown in FIG. 4A is output from a microcomputer. That is, consider a case in which the normally operating microcomputer causes an abnormality in the middle and the period of the watchdog pulse is delayed.

In the watchdog circuit, when a pulse signal is input from the microcomputer, the capacitor discharging section 13 is activated by the falling edge of the pulse, and the capacitor 20 is turned on.
To discharge the charge. Therefore, the capacitor 20 repeats charging and discharging, and its voltage waveform is as shown in FIG. In this case, if the microcomputer normally outputs a pulse signal, the discharge is performed before reaching the reference voltage Vref, so that the output of the voltage comparison unit 14 maintains a high level (FIG. 4).
(Same as reset output in (C)). However, if an abnormality occurs in the microcomputer and the cycle of the pulse signal is delayed, the capacitor voltage Vc reaches the reference voltage Vref before the fall of the pulse is obtained, and the output of the voltage comparison unit 14 falls to a low level. Therefore, the output of the reset output unit 15 falls to a low level and resets the microcomputer. In this manner, in the conventional watchdog circuit, runaway of the microcomputer is prevented based on the watchdog pulse signal.

[0006]

In general, the cycle of the watchdog pulse signal is generally delayed when the microcomputer runs out of control. In this case, as shown in FIG.
The discharge cycle of 0 is shortened, and the capacitor voltage Vc does not reach the reference voltage Vref. For this reason, the runaway of the microcomputer cannot be determined, and the reset signal cannot be output.
In other words, the above-described watchdog circuit cannot detect any abnormality that operates in the earlier period of the watchdog pulse signal. In addition, some special devices and the like detect abnormalities that operate on the side where the pulse signal period is earlier, but are very expensive and their logic is not disclosed. The watchdog circuit of the present invention solves the above-described problem, and has an object to surely detect a microcomputer abnormality even in a case where the period of the watchdog pulse signal is shortened, and to provide a simple configuration.

[0007]

According to the present invention, there is provided a watchdog circuit comprising a pulse delay detecting circuit for inputting a pulse signal from a microcomputer and detecting a delay of a period of the pulse signal. A watchdog circuit for detecting runaway of the microcomputer based on a cycle delay; an integrator circuit for integrating a pulse signal from the microcomputer before the input of the pulse delay detection circuit; and a voltage of the integrated signal. Inverts the output of the comparison signal when the voltage falls below the lower threshold value from a state higher than the threshold value and when the voltage rises from a state lower than the lower threshold value and exceeds the upper threshold value. and a hysteresis with the voltage comparator circuit,
Period of the pulse signal output from the microcomputer
Is faster than the proper period of the pulse signal output during normal operation.
Power supply with hysteresis
The inversion cycle of the signal output from the voltage comparison circuit is
Slow, or the above-mentioned voltage comparison circuit with hysteresis
The upper threshold value and the
And that the lower threshold is set .

[0008]

In the watchdog circuit of the present invention having the above configuration, the pulse signal output from the microcomputer is integrated by the integration circuit, and the integrated signal is converted into a comparison signal through the voltage comparison circuit with hysteresis, and the pulse delay detection circuit is used. Is output to In the voltage comparison circuit with hysteresis,
The output of the comparison signal is inverted when the output voltage from the integration circuit fluctuates across both the upper threshold and the lower threshold. And the upper threshold and lower threshold
If the pulse signal cycle output from the microcomputer is normal,
If the pulse signal output earlier than the appropriate period
In either case, the voltage comparison circuit with hysteresis
The output signal inversion cycle is slower than normal
Or the signal output from the voltage comparator with hysteresis
It is set to a value that does not rotate. Therefore, when the cycle of the pulse signal from the microcomputer is early, the signal integrated by the integrator circuit does not completely change in voltage beyond the upper threshold value and the lower threshold value. Output not inverted or multiple
The specified voltage fluctuation is not obtained until the pulse signal of
And the inversion cycle is delayed . As a result, the pulse delay detection circuit for inputting the comparison signal detects runaway of the microcomputer as in the case where the pulse signal period from the microcomputer is delayed.

If the pulse signal period from the microcomputer is proper, the voltage of the integrated signal fluctuates beyond the upper threshold value and the lower threshold value, and furthermore, its voltage fluctuation (the same period as the pulse period). Repeat). Therefore, the output of the voltage comparison circuit with hysteresis becomes a pulse signal having the same cycle as the pulse signal from the microcomputer, and the pulse delay detection circuit can determine whether the microcomputer is normal.

On the other hand, when the pulse signal period from the microcomputer is slow, the output of the voltage comparison circuit with hysteresis is eventually the same as the pulse signal from the microcomputer because the voltage of the integrated signal fluctuates greatly but the inversion period is slow. It becomes a periodic pulse signal. As a result, runaway of the microcomputer can be detected.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In order to further clarify the configuration and operation of the present invention described above, a preferred embodiment of the watchdog circuit of the present invention will be described below. FIG. 1 is a schematic configuration diagram of a watchdog circuit as one embodiment. The watchdog circuit includes the following circuit at a stage prior to the input of the pulse delay detection unit 10 (general-purpose watchdog IC).
Since the pulse delay detecting section 10 is the same as that shown in the prior art, the same reference numerals are given to the drawings and the description is omitted.

Before the input of the pulse delay detection unit 10, R
An integration circuit 1 that constitutes a C circuit and integrates a pulse signal (watchdog pulse signal) from a microcomputer and a voltage comparison circuit 2 with hysteresis are provided. The voltage comparison circuit 2 with hysteresis compares the signal voltage from the integration circuit 1 with two types of comparison reference voltages, and includes a comparator 3 as a comparison element and resistors R1 and R2 for setting the comparison reference voltage. R2, a power supply Vreff (may be provided by dividing the driving power supply of the element).

In the voltage comparison circuit 2 with hysteresis (hereinafter referred to as comparison circuit with hysteresis), the signal voltage V from the integration circuit 1 is higher than the first comparison reference voltage VH (hereinafter referred to as upper limit voltage VH). A high level signal is output when the voltage drops from a high state and falls below a second comparison reference voltage VL (hereinafter, referred to as a lower limit voltage). It operates to drop a high level signal to a low level.

Next, the operation of the watchdog circuit will be described with reference to FIG. FIG. 2 shows various signal waveforms in a case where the microcomputer that has been operating normally has an abnormality in the middle and the watchdog pulse cycle is shortened (left side) and in a case where the cycle is slowed down (right side). In the figure, (A) shows the watchdog pulse signal waveform, (B) shows the output voltage waveform of the integrating circuit, (C) shows the output waveform of the comparison circuit 2 with hysteresis, and (D) shows the waveform of the capacitor voltage Vc. To
(E) is a reset output waveform.

As shown in the figure, when a pulse signal is output from the microcomputer at a normal cycle, the output of the integrating circuit 1 fluctuates so as to exceed the range of the upper limit voltage VH and the lower limit voltage VL. Therefore, the comparison circuit with hysteresis 2
Output rises when the integrated voltage V falls below the lower limit voltage VL, and falls to a low level when the integrated voltage V exceeds the upper limit voltage VH. Therefore, the output of the comparison circuit with hysteresis 2 has the same cycle as that of the pulse signal from the microcomputer, and the pulse delay detector 1
0 will be sent. Therefore, the pulse delay detection unit 1
At 0, charging and discharging are repeated within a range where the voltage Vc of the capacitor 20 does not exceed the reference voltage Vref (because the capacitor discharging unit 13 operates each time the pulse of the voltage comparing unit 14 falls), and a reset signal to the microcomputer is provided. (Low level) is not output.

When the microcomputer generates an abnormality and the watchdog pulse cycle is shortened, the output of the integrating circuit 1 has a smaller voltage fluctuation range, and the output voltage of the integrating circuit 1 exceeds the upper limit voltage VH and the lower limit voltage VL. No fluctuation can be obtained. For this reason, the output of the comparison circuit with hysteresis 2 is maintained at a high level or a low level , or a plurality of outputs .
The specified voltage fluctuation is obtained only after the pulse signal is input.
Inversion occurs, and the inversion cycle is delayed . Thus, the pulse delay detection unit 10, a pulse trailing edge can not be obtained from the hysteresis with the comparator circuit 2, a reset signal is output to a result microcomputer voltage V _c of the capacitor 20 exceeds the reference voltage Vref. As a result, even when the pulse signal is abnormally operated on the earlier side, the microcomputer can be reliably detected as being abnormal, and runaway can be prevented.

When a comparison circuit that compares only the upper limit value is used instead of the comparison circuit with hysteresis 2, for example, in the case where the output from the integration circuit 1 fluctuates slightly so as to exceed the upper limit value, a pulse is used. The charge / discharge of the capacitor 20 in the delay detection unit 10 is repeated at an early cycle, and a reset signal cannot be output. Therefore, the comparison circuit with hysteresis 2 as in this embodiment is required.

On the other hand, when the period of the watchdog pulse signal is delayed, as shown on the right side of FIG. 2, the output of the integrating circuit 1 has a large voltage fluctuation range, but its inversion period is delayed. For this reason, the inversion cycle of the output of the comparison circuit with hysteresis 2 is also delayed, and the pulse delay detection unit 10
The capacitor voltage Vc reaches the reference voltage Vref and outputs a reset signal. In other words, a pulse signal having the same cycle as the pulse signal from the microcomputer is input to the pulse delay detection unit 10, so that an abnormality of the microcomputer can be detected as in the related art.

As described above, according to the watchdog circuit of the present embodiment, the integration circuit 1 and the comparison circuit with hysteresis 2 are provided before the input of the pulse delay detection unit 10 which is conventionally used. Even when the period of the dog pulse signal is shortened, runaway of the microcomputer can be reliably detected. Therefore, the safety of the device using the microcomputer can be remarkably improved. Moreover, resistors,
The configuration is simple simply by adding inexpensive elements such as capacitors and comparators.

The embodiment of the present invention has been described above.
The present invention is not limited to these embodiments at all, and it goes without saying that the present invention can be implemented in various modes without departing from the gist of the present invention.

[0021]

As described above in detail, according to the watchdog circuit of the present invention, the cycle of the watchdog pulse signal is shortened only by adding a simple configuration such as an integrating circuit and a voltage comparison circuit with hysteresis. An excellent effect that the microcomputer abnormality can be reliably detected even in the case is exhibited.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a watchdog circuit as one embodiment.

FIG. 2 is a signal waveform diagram illustrating an operation of a watchdog circuit.

FIG. 3 is a configuration diagram of a conventional watchdog circuit.

FIG. 4 is a signal waveform diagram illustrating an operation of a conventional watchdog circuit.

FIG. 5 is a signal waveform diagram illustrating an operation of a conventional watchdog circuit.

[Explanation of symbols]

1: integration circuit, 2: voltage comparison circuit with hysteresis, 1
0: pulse delay detection section, 20: delay time setting capacitor.

Claims (1)

(57) [Scope of request for utility model registration] 1. A watchdog circuit for receiving a pulse signal from a microcomputer and detecting a delay of the pulse signal cycle, and detecting a runaway of the microcomputer based on the delay of the pulse signal cycle. In an input stage of the pulse delay detection circuit, an integration circuit for integrating a pulse signal from the microcomputer, and a voltage of the integrated signal decreases from a state higher than the threshold value to a lower threshold value when below the, and rises from below the lower threshold state and a hysteresis with the voltage comparator circuit for inverting the output of the comparison signal when above the upper threshold, the pulse signal output of the microcomputer Cycle of
Is faster than the proper period of the pulse signal output during normal operation.
Power supply with hysteresis
The inversion cycle of the signal output from the voltage comparison circuit is
Slow, or the above-mentioned voltage comparison circuit with hysteresis
The upper threshold value and the
And a lower threshold value are set .