JP2568658B2 - Motion detection circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motion detection circuit for determining whether a video signal is a moving image or a still image. It is a block diagram of (1st prior art example). In FIG. 4, reference numeral 15 denotes a low-pass filter (LP
F), 16, 21, and 22 are frame memories (FM) for delaying a signal for one frame period, 17, 23 are subtractors, 18, 24 are absolute value circuits, and 19, 25 are magnitude relations between input signals and thresholds. A threshold circuit for judging, 20 is a high-pass filter (HPF), and 26 is a judging circuit for judging the movement from the outputs of the two threshold circuits 19 and 25.

In the conventional motion detection circuit configured as described above, the NTSC signal is input from the terminal 14 and input to the LPF 15 and the HPF 20.

The LPF 15 passes a low-frequency component of the NTSC signal, that is, a low-frequency luminance signal, and inputs the signal to the FM 16. The subtractor 17 subtracts the low-frequency luminance signal that is not delayed from the low-frequency luminance signal delayed by one frame, and the absolute value circuit 18 obtains the absolute value of the output of the subtractor 17. Since the two signals separated by one frame period have the same position on the screen, when the image is a still image, the two signals are exactly the same, and the output of the absolute value circuit 18 is "0". Conversely, if there is motion in the image, 1
Since the signals separated by the frame period are different, a signal other than "0" is obtained from the absolute value circuit 18. The threshold value circuit 19 compares the output of the absolute value circuit 18 with a certain threshold value, and if the threshold value is smaller, outputs "1" as having a motion. Conversely,
If the threshold is larger, “0” is output as a still image.

The HPF 20 outputs a high-frequency video signal in which a high-frequency luminance signal and a carrier chrominance signal are mixed. This high-frequency video signal has two F.M21, 2
Entered into 2 in order. In the subtracter 23, the high-frequency video signal that is not delayed is subtracted from the delayed high-frequency video signal. Since the phase of the carrier chrominance signal is inverted for each frame, it becomes the same phase when two frames are separated. The output from the subtractor 23 is input to the absolute value circuit 24 and the threshold circuit 25 in the same manner as described above, and the output from the threshold circuit 25 is "0" for a still image and "1" for a moving image.

The judgment circuit 26 outputs “1” when the output of the threshold circuit 19 or the threshold circuit 26 is “1”. That is, when motion is detected in either the low-frequency luminance signal or the high-frequency video signal, it is determined that there is motion, and “1” is output.

FIG. 5 is a configuration diagram of another conventional motion detection circuit (second conventional example). In FIG. 5, 29 is delayed by 262 lines 2
62H delay, 30 and 33 are subtracters, 32 is FM, 31 and 34 are absolute value circuits, and 35 is a threshold circuit.

In the conventional motion detection circuit configured as described above, when the NTSC signal is input from the terminal 28, the subtracter 30 subtracts the signal that is not delayed from the signal delayed by 262 lines. Since the phase of the carrier chrominance signal of the signal 262 lines before is the same, the output from the subtractor 30 includes the difference between the signal in the vertical direction in two dimensions and the signal during the moving image. This difference signal is input to the absolute value circuit 31, and the absolute value is obtained. The output of the absolute value circuit 31 is input to the frame memory 32, and the subtractor 33 obtains the difference between the signal delayed by one frame period and the signal not delayed. The difference signal output from the subtractor 34 is input to an absolute value circuit 34, the absolute value of which is obtained, and input to a threshold circuit 35.

FIG. 2 shows the relationship between the sample point of each field and the phase of the sub-transport. In FIG. 2, S0 is an n-field sample point, and S1 and S2 are n + 1 field sample points. S1 is one line above S2 on the screen. S3 is a sampling point of n + 2 fields, and S4 is n
This is a sampling point of +3 fields. The direction of the arrow at each sample point indicates the phase of the sub-transport, S0 and S1 are in phase with each other, and S2, S3, and S4 are also in phase with each other, but in phase opposite to S0.

When the signal input from the terminal 28 is a still image, the difference signal output from the subtractor 30 is the difference between S3 and S4 in FIG. 2 and the difference between the two-dimensional vertical signals. Only shown.
Therefore, in the case of a still image, the difference signal in two dimensions is the same (difference between S0 and S1) in the next frame, so that the output from the subtracter 33 is "0". When the signal input from the terminal 28 is a moving image, the difference signal from the subtractor 30 is
Includes vertical difference and motion information in two dimensions. In the next frame, a difference signal of a different pattern will be used.
The output from 33 does not become "0".

However, when a vertical stripe pattern as shown in FIG. 3A moves in the horizontal direction, at a certain speed, the stripe pattern of n fields and the stripe pattern of n + 2 fields are just upside down. FIG. 3 (B) shows this state in detail.
It is. FIG. 3 (B) shows n, n + 1, n + 2, n + 3.
The horizontal sample points of the field are shown. As shown in the n-th field, white and black sample points are repeated for every four vertical stripes. When two sample points are moved in the horizontal direction in one field, a pattern in which white and black in n fields are inverted in n + 2 fields. Also, four sample points at the same position in the horizontal direction of each field are named S01 to S34 as shown in the figure.

When this signal is input to the motion detection circuit (FIG. 4) of the first conventional example, since the signal of the vertical stripe is only the high frequency component, the LPF 1
The output of 5 becomes "0" and the motion must be detected only by the output of HPF20. However, as shown in FIG. 3 (B), this signal is inverted in one frame. Become. Therefore, the output from the subtractor 23 is "0", and this signal is erroneously determined to be a still image.

Also, this signal is used as the motion detection circuit (the fifth
), The subtractor 30 has n + 3 fields.
When S32 and S22 of n + 2 fields are input, the two sample points are in phase, so the output of the subtractor 30 is "0", and the output from the frame memory 32 is S12 of n + 1 fields and S02 of n fields. The absolute value of the difference, which is also "0". Therefore, the output of the subtractor 33 is also “0”. The subtractor 30 has n + 3 field S33 and n + 2 field S23.
Is input, the two sample points have opposite phases, so the output of the subtractor 30 has a certain value. However, the output of F.M32 is also the absolute value of the difference between S13 and S03, and is at the same level as the absolute value of the difference between S33 and S23, so the output of subtracter 33 is "0". Thus, even in the motion detection circuit of the second conventional example, the signal of FIG. 3 is erroneously determined to be a still image.

As described above, the conventional motion detection circuit has a problem that when a signal as shown in FIG. 3 is input, it is erroneously determined to be a still image.

Means for Solving the Problems The present invention is a motion detection circuit including a polarity determination circuit for checking the polarity of a pixel of interest, a pixel 262 lines before, and a pixel one frame before.

Operation The present invention is configured as described above, so that even in the case of a still image, when the absolute value of the difference between signals separated by one frame period is not equal to or more than a certain value, that is, in the conventional motion detection circuit, a moving image is regarded as a still image. Even in the case of erroneous determination, it can be determined correctly.

Embodiment Hereinafter, a motion detection circuit according to an embodiment of the present invention will be described with reference to FIGS.

FIG. 1 is a configuration diagram of a motion detection circuit in this embodiment. In FIG. 1, 2 is a 262H delay for delaying 262 lines, 3 is a 263H delay for delaying 263 lines, 4 is a polarity determination circuit, 5 is an adder, 6 is a frame memory, 7 is a subtractor, 8 is an absolute value circuit, 9 Is a threshold circuit, 10 is a theoretical product circuit, 11 is an OR circuit, and 12 is a smoothing circuit.

In the motion detecting circuit configured as described above, the terminal 1
When the NTSC signal is input, one of the signals is input to the 262H delay 2 and the 263H delay 3 sequentially, and is delayed by exactly one frame period.

In the adder 5, an adder of the signal G3 delayed by one frame and the signal G1 not delayed is obtained. This adder is further input to the frame memory 6 and the difference value between the delayed addition value and the non-delayed addition value in the subtracter 7 is obtained. When the input signal is a still image, the signals G1 and G3 separated by one frame period
Is inverted, the output of the adder 5 becomes a luminance signal. In the case of a still image, since the luminance signal one frame before and the current luminance signal are the same, the subtracter 7
Is "0". If the input signal is a video,
The motion information is also added to the output of the adder 5, and since the picture one frame before and the current picture are different, the level of the luminance signal is also different and the output of the subtracter 7 is not "0". The output of the subtractor 7 is input to the absolute value circuit 8 and its absolute value is obtained. When the output of the absolute value circuit 8 is smaller than a certain threshold value, the threshold value circuit 9 outputs "0" as a still image. When the output of the absolute value circuit 8 is larger than a certain threshold, "1" is output as a moving image.

The input signal G1 and the signal G2 before 262H are input to the polarity determination circuit 4.
, The signal G3 one frame before is input. N + in FIG.
Assuming that S3 of two fields is the input signal G1, the output G2 of the 262H delay 2 is S2, and the output G3 of the 263H delay 3
Becomes S0. When the input signal is a still image, S0, S2,
The phase of the subcarrier in S3 is equal to that of S2 as shown in FIG.
S3 is in phase and S0 and S3 are out of phase. Change the polarity of the input signal G1.
sign (G1), sign (G2), 1
Assuming that the polarity of the signal G3 before the frame is sign (G3), the polarity determination circuit 4 outputs the following calculation result.

｛Sign (G1) EXOR sign (G3)｝ AND ｛sign (G
1) EXOR sign (G2)｝ Therefore, the polarity determination circuit 4 does not determine that the video is a moving image when S3 and S2 are in phase, although S0 and S3 in FIG. 2 are out of phase. Outputs “0”.

When the signal shown in FIG. 3 is input to the above-described motion detection circuit, the output of the adder 5 always takes an intermediate value between white and black because the phase of this signal is inverted every frame. Then, the output of the subtractor 7 becomes zero, and the threshold circuit 9 determines that the image is a still image, and outputs "0".

When the input signals G1, G2, and G3 of the polarity determination circuit 4 are S32, S22, and S12 in FIG. 3B, respectively, S32 and S12 have opposite phases, but S22 and S32 have the same phase. The circuit 4 outputs “0” without determining that the moving image is a moving image. Also, the input signals G1, G2, G3 of the polarity determination circuit 4 are respectively S33, FIG.
In the case of S23 and S13, S33 and S13 have opposite phases, and S33 and S23 also have opposite phases. Therefore, the polarity determination circuit 4 determines that the video is a moving image and outputs “1”.

In this way, when the signal shown in FIG. 3 is input, the polarity determination circuit 4 repeatedly outputs "1" and "0" at every two sample points. Since the output of the threshold circuit 9 is always zero, the output of the AND circuit 10 repeatedly outputs "1" and "0" every two sample points, and the output of the OR circuit 11 is the same. Smoothing circuit
In step 12, the ratio of “0” to “1” in the two-dimensional area is checked, and if “0” is a certain number or more, it is determined to be a still image. When the signal shown in FIG. 3 is input, the ratio of “0” and “1” is half, so it is determined that the image is a moving image.

As described above, by using the 262H delay 2, the 263H delay 3, the polarity determination circuit 4, the logical product circuit 10, and the logical sum circuit 11, erroneous determination of motion detection can be reduced.

The present invention can be configured in various modes in addition to the embodiments described above.

For example, the 262H delay 2, the 263H delay 3, the polarity determination circuit 4, the AND circuit 10, and the OR circuit 11 in the above embodiment.
The same effect can be obtained by adding the portion including the smoothing circuit 12 to the motion detection circuit of the first conventional example or the motion detection circuit of the second conventional example.

To add to the motion detection circuit of the first conventional example,
The input of the 2H delay 2 may be used as the terminal 14 of the first conventional example, and the output of the decision circuit 26 of the first conventional example may be used instead of the output of the threshold circuit 9. To add to the motion detection circuit of the second conventional example, the input of the 262H delay 2 is used as the terminal 28 of the second conventional example, and the output of the threshold circuit 35 of the second conventional example is used instead of the output of the threshold circuit 9. I just need.

Effects of the Invention As described above, according to the present invention, even when a moving image is determined to be a still image by the conventional motion detection method, the sample point of interest, the sample point of the previous field, and the previous frame sample By examining the phases of three sample points, erroneous determination can be prevented, and the practical effect is large.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a motion detection circuit according to an embodiment of the present invention, FIG. 2 is an explanatory diagram showing a sub-transport phase of a pixel in each field, FIG. FIG. 4 is a block diagram of a first conventional motion detecting circuit, and FIG. 5 is a block diagram of a second conventional motion detecting circuit. 1 ... input terminal, 2 ... 262H delay, 3 ... 263H delay, 4 ... polarity determination circuit, 5 ... adder, 6 ... frame memory, 7 ... subtractor, 8 ... absolute value circuit, 9 ...
Threshold circuit, 10 AND circuit, 11 ... OR circuit, 12 ...
... Smoothing circuit.

Claims (1)

(57) [Claims] 1. A means for obtaining an NTSC signal discretized as an input signal to obtain a pixel 262 lines before a pixel of interest and a pixel one frame before, and a means for obtaining the pixel of interest, a pixel 262 lines before and one frame Check the polarity of the previous pixel, and
A polarity determination circuit that outputs a polarity moving image signal when the polarity of the pixel before 262 lines is opposite and the polarity of the pixel of interest and the pixel of one frame before are opposite, and the pixel of interest and the pixel of one frame before Addition means for obtaining an addition value of
Subtraction means for obtaining a difference value between the added value and the added value one frame before, a comparing means for outputting a threshold signal when the absolute value of the difference value is equal to or more than a certain value, and the threshold signal is output. And a logic circuit that determines that there is a motion in two cases, that is, when the threshold signal is not output and when the polarity moving image signal is output.