JP2564437B2 - Constant current control circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant current control circuit for supplying a constant current to a load while controlling an overcurrent flowing to the load.

[0002]

2. Description of the Related Art FIG. 6 is a circuit diagram showing a conventional constant current control circuit. Here, a motor is taken as an example of the control target. The buffer 4 is connected to the output terminal of the comparator 1 in which the reference voltage generating circuit 2 is connected to the positive phase input and the resistor 3 (R1) is connected between the negative phase input and the ground.
The output terminal of the buffer 4 is connected to the base of the transistor 5 (switching element), its emitter is connected to the negative phase input of the comparator 1, and its collector is the load 6.
It is connected to the power supply Vdd via (L). The load 6 has a diode 7 as a flywheel diode (used to flow a current to the power supply Vdd by the electromagnetic energy of the load 6 when the transistor 5 is OFF) so as to be connected in the reverse direction to the power supply Vdd.
(D1) is connected in parallel, and a clamp diode (used to prevent the collector from becoming a negative voltage when the transistor 5 is turned on) is reversely connected to the power supply Vdd between the collector of the transistor 5 and the ground. The diode 8 (D2) is connected.

FIG. 7 is a timing chart showing the operation of the constant current control circuit of FIG. The lowercase letters in the figure correspond to the lowercase letters attached to each part in FIG. Initially, the transistor 5 is non-conductive, and the reference voltage is supplied from the reference voltage generation circuit 2 in this state, so that a voltage of a constant level is output to the comparator 1. 5 is applied to the base of the transistor 5, the transistor 5 is turned on, and the collector current h flows. This current h is due to the inductance of the load 6 and the resistance 3
It gradually increases with a time constant τ determined by the resistance value of. In response to this, a current j flows through the emitter, and a voltage drop (point a voltage) corresponding to this current value occurs in the resistor 3. This point a voltage is applied to the negative phase input of the comparator 1, and when the point a voltage reaches the reference voltage (point b voltage) (point m in FIG. 7), the point c voltage becomes 0 level. At this point comparator 1
Output voltage is inverted and goes low.

As a result, the transistor 5 is driven so as to be turned off, and a signal is transmitted until the transistor 5 is turned off after the output of the buffer 4 becomes low level due to the delay of the output with respect to the input of the transistor 5, so-called signal transmission delay. It takes a delay time t _dy . Therefore, even if the output of the comparator 1 (voltage at the point c) becomes low level, the current continues to flow in the resistor 3 for the signal transmission delay time t _dy , so that the output of the comparator 1 continues to hold low level.

Then, after the signal transmission delay time t _dy after the output of the comparator 1 becomes low level, the transistor 5 is turned off at the point n, so that no current flows through the resistor 3 and the reverse phase of the comparator 1 is reached. The input level drops and becomes lower than the positive-phase input voltage of the comparator 1.
Therefore, the output (voltage at point c) of the comparator 1 becomes high level again, and the transistor 5 is turned on. However, since there is a signal transmission delay time t _dy, the output of the buffer 4 transistor 5 is turned ON after the high level after the signal transmission delay time t _dy.

On the other hand, while the transistor 5 is ON, a current flows through the load 6 through the transistor 5, whereas when the transistor 5 is OFF, the flyback current flows through the diode 7 due to the electromagnetic energy of the load 6. However, the current flowing through the diode 7 only consumes the electromagnetic energy of the load 6, and thus gradually attenuates. Therefore, when the transistor 5 is turned on again and the current starts to flow in the load 6, the voltage level (point a voltage) of the negative phase input of the comparator 1 is lower than the positive phase input (point voltage b). The output of the comparator 1 (voltage at the point c) continues to maintain the high level, so the current flowing through the load 6 increases, and when the negative-phase input of the comparator 1 becomes higher than the positive-phase input, the output of the comparator 1 again becomes low-level. , Try to turn off the transistor 5. Thereafter, similarly turn on / off the transistor 5.
Continue to FF.

The ON / OFF switching time of the transistor 5 depends on the transistor 5, the comparator 1,
Since it is controlled by the signals transmitted through each of the buffers 4, the ON / OFF switching time of the transistor 5 is determined by the signal transmission delay time _tdy for these. Generally, since the transistor 5 is much slower than other elements, the ON / OFF switching time of the transistor 5 is the signal transmission delay time t _{dy of the} transistor 5.
It can be said that it depends only on.

FIG. 8 is a waveform diagram showing the collector voltage, collector current, and product (power consumption) of the collector voltage and collector current of the transistor in FIG. From this figure, it is understood that the power consumption W is large at the time of switching the start and end of the collector current flow. That is, it means that the power consumption W increases by repeating the ON / OFF switching operation of the transistor 5 at high speed. The transistor 5 generates heat due to the increase in the power consumption W. Therefore, a large heat sink is required, and the transistor 5 having a large allowable loss is required. To improve these, transistor 5
It suffices to lengthen the ON / OFF cycle of.

FIG. 9 is proposed as a means for lengthening the ON / OFF cycle of the transistor 5. In this configuration, in addition to the configuration of FIG. 6 , a rectangular wave (or triangular wave)
Of the resistor 10 (R which is inserted between the negative phase input of the comparator 1 and the emitter of the transistor 5
2), a capacitor 11 (C1) connected between the negative phase input of the comparator 1 and the ground, and an adder 12 for adding the output of the oscillation circuit 9 to the output of the reference voltage generation circuit 2.

The output of the oscillation circuit 9 is added to the output of the reference voltage generation circuit 2 by the adder 12 and applied to the positive phase input of the comparator 1. The voltage drop generated in the resistor 3 is integrated by the resistor 10 and the capacitor 11, and this output voltage g is applied to the negative phase input of the comparator 1.

FIG. 10 is a timing chart showing the operation of each part of the configuration of FIG. Each lowercase letter in the figure indicates a voltage or current waveform at each lowercase point attached to each part in FIG. 9.

When a current starts flowing through the resistor 3, the applied voltage g of the negative phase input of the comparator 1 gradually increases, and when it becomes larger than the applied voltage f of the positive phase input of the comparator 1, the output voltage c of the comparator 1 changes. Inversion, the transistor 5 is turned off (non-conducting). Then, no current flows through the resistor 3, and the voltage drop of the resistor 3 rapidly decreases to 0 V at last, but in the process, integration is performed by the integrating circuit including the resistor 10 and the capacitor 11, so As shown by S, it curves and gradually decreases. On the other hand, since the applied voltage f of the positive phase input of the comparator 1 is a rectangular wave and is lower than the applied voltage g of the negative phase input of the comparator 1 during the time t _L , the output voltage c of the comparator 1 maintains a low level. are doing.

Then, t _L time after the transistor 5 is turned off, the applied voltage f of the positive phase input of the comparator 1 becomes a high level and becomes higher than the applied voltage g of the negative phase input of the comparator 1, so that its output. The voltage c is inverted and the transistor 5 is turned on. When the transistor 5 is turned on, a current flows through the resistor 3 and the applied voltage g of the negative phase input of the comparator 1 gradually rises.
Since the applied voltage f is high level, the output voltage c of the comparator 1 maintains the high level state until the applied voltage f becomes low level, and the current j continues to flow through the resistor 3. After that, when the applied voltage f of the positive phase input of the comparator 1 becomes low level again, the output voltage c of the comparator 1 becomes low level and the transistor 5 is turned off. Thereafter, the transistor 5 continues to be turned on / off in the same manner.

As is clear from the above, the transistor 5
ON / OFF switching time depends on the oscillation cycle of the output waveform of the oscillation circuit 9 regardless of the signal transmission delay time _tdy of the transistor 5. Therefore, since the ON / OFF switching time of the transistor 5 can be lengthened by the oscillation circuit 9, the switching loss of the transistor 5 is reduced. As a result, the heat generation of the transistor 5 is reduced, and the transistor 5 can use a transistor with a small allowable loss. Also,
Since the heat sink can be made small, the device can be made compact.

In each of the above circuits, the buffer 4 can also be used as an AND gate with a gate signal for controlling ON / OFF of the current flowing through the load. Also, regarding this type of technology, for example,
There is Japanese Patent Publication No. 61-22560.

[0016]

However, in the above-mentioned conventional technique, the ON / OFF switching time can be lengthened. For this reason, the oscillation for generating the triangular wave or the rectangular wave is generated. A circuit was required, and it could not be said that miniaturization was achieved in the device as a whole. Further, there is a problem that the cost is increased due to the oscillation circuit.

Therefore, an object of the present invention is to provide a constant current control circuit capable of controlling the ON / OFF switching time of a switching element without providing an oscillation circuit.

[0018]

In order to achieve the above object, the present invention provides a switching element for controlling a current flowing through a load, a current detecting means for detecting a current value flowing through the load, and the current detecting means. In the constant current control circuit that controls the switching element by using the comparison result of the comparison circuit, the comparison circuit that compares the current value and the reference voltage by the integration circuit, and the integration circuit. And a conversion means for converting the output of the converter into a digital value, and the output of the conversion means is used as a control signal for the switching element.

[0019]

According to the above means, the output of the comparator circuit is integrated by the integrator circuit, so that the output of the comparator circuit does not suddenly go to the high level but gradually rises, depending on the time constant of the integrator circuit. The ON / OFF switching time of the switching element is controlled. Then, the voltage is converted into a digital value by the conversion means, and the switching element is driven with a beautiful waveform of rising and falling. Therefore, since the ON / OFF switching time can be lengthened, the loss due to switching is reduced, and the heat generation of the switching element can be reduced. As a result, the allowable loss of the switching element is reduced and the heat sink can be reduced, so that the device can be downsized and the cost can be reduced.

[0020]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of a constant current control circuit according to the present invention. In addition, in FIG.
The same reference numerals have been used for the same elements as those shown in FIG. 6, and thus duplicated description will be omitted below.

In this embodiment, a resistor 13 (R3) is provided between the output of the comparator 1 (comparator circuit) and the power supply Vcc.
Is characterized in that a capacitor 14 (C2) is connected between the output of the comparator 1 and the ground to form an integrator circuit.

FIG. 2 is a timing chart showing the operation of the embodiment shown in FIG. Also in this case, the lowercase letters in the figure are
Corresponds to the English small letters attached to each part of (and Figure 1).

The operation of the embodiment of FIG. 1 will be described with reference to FIG. 2. First, when a current flows through the resistor 3, the voltage a applied to the negative phase input of the comparator 1 starts to rise. When this voltage a becomes higher than the applied voltage b of the positive phase input of the comparator 1, the output voltage c of the comparator 1 is inverted and the signal transmission delay time t of the transistor 5 via the buffer 4 is inverted.
_The transistor 5 turns off after a delay of _dy . As a result, the current j stops flowing through the resistor 3 and the comparator 1
The applied voltage a of the negative phase input of is 0V. Then, the output voltage c of the comparator 1 is inverted and becomes high level. However, the output voltage c of the comparator 1 does not immediately go to the high level due to the integrating circuit of the resistor 13 and the capacitor 14, and the output voltage c gradually increases due to the time constant determined by the resistor 13 and the capacitor 14.

Here, the buffer 4 also serves as a digital output conversion circuit. When the threshold value for converting an analog value into a digital value is V _SH , the output voltage c of the comparator 1 reaches the threshold value V _SH . Until then, the output voltage of the buffer 4 is kept at the low level, and the transistor 5 is kept off. When the output voltage c of the comparator 1 exceeds the threshold V _SH of the buffer 4, the output voltage d of the buffer 4
Becomes high level, and the transistor 5 is turned on after a delay of the signal transmission delay time _tdy .

On the other hand, after the transistor 5 is turned off, O
Until N, the flywheel current i continues to flow through the diode 7 due to the electromagnetic energy of the load 6.
However, since the electromagnetic energy of the load 6 decreases,
The flywheel current i also gradually decreases. Therefore,
When the transistor 5 is turned on again and the collector current j flows instead of the flywheel current i, the reference value to be compared, that is, the applied voltage a of the negative phase input compared to the applied voltage b of the positive phase input of the comparator 1 is Since it is a low value, the output voltage c of the comparator 1 holds the high level, and the current j continues to flow through the resistor 3.

Then, the collector current j gradually increases,
When the applied voltage a of the negative phase input of the comparator 1 exceeds the applied voltage b of the positive phase input again, the output voltage c of the comparator 1
Is inverted and the transistor 5 is turned off after a delay of the signal transmission delay time _{tdy of the} transistor 5 via the buffer 4. Thereafter, turn on / off the transistor 5 in the same manner.
Then, the current h flowing through the load 6 is continuously controlled. Thus, according to this embodiment, the transistor 5 is turned on / off.
The switching time can be controlled by the resistor 13 and the capacitor 14.

FIG. 3 is a circuit diagram showing a second embodiment of the present invention. In this embodiment, in the configuration of FIG.
4 is connected to the positive phase input of the comparator 1 instead of being connected to the ground, and a Schmitt trigger buffer 15 is further provided between the buffer 4 and the output of the comparator 1. The Schmitt trigger buffer 15 has a function of converting an analog output into a digital signal.

FIG. 4 is a circuit diagram showing a third embodiment of the present invention. In this embodiment, a comparator 16 is provided in place of the Schmitt trigger buffer 15 in the configuration of FIG. 3 to perform analog-logic conversion. A resistor 17 is connected between the positive phase input of the comparator 16 and its output, and resistors 18 and 19 are inserted in series between the power supply Vcc and the ground, between the midpoint and the positive phase input of the comparator 16. A resistor 20 is connected to. Here, the resistors 18 and 19 are used to determine the threshold value for logic conversion, and the resistors 17 and 20 determine the hysteresis of the comparator 16.

FIG. 5 is a circuit diagram showing a fourth embodiment of the present invention. In this embodiment, an FET (field effect transistor) 21 is used in place of the transistor 5 in the configuration of FIG. 1, resistors 22 and 23 are connected in series between a power supply Vcc and ground, and the middle point of the FET 22 is connected to the comparator 1. It is connected to the output. Here, the resistor 22 and the capacitor 14 form an integrating circuit. Further, the resistors 22 and 23 function as a digital output conversion circuit.

In each of the above embodiments, the comparator 1 may be replaced by an open collector type one having a large output resistance, for example, a product name TL081. In this way, the resistor 13 can be eliminated.

[0031]

As described above, according to the present invention, the switching element for controlling the current flowing through the load, the current detecting means for detecting the value of the current flowing through the load, the current value by the current detecting means and the reference voltage are provided. In a constant current control circuit that controls the switching element using the comparison result of the comparison circuit, an integration circuit that integrates the output of the comparison circuit, and the output of the integration circuit to a digital value Since the output of the conversion means is used as a control signal for the switching element, the switching element is turned on / off without providing an oscillation circuit.
Since the switching time can be lengthened, the loss due to switching can be reduced. Therefore,
Since the heat generation of the switching element can be reduced, the use of the switching element having a small allowable loss and the miniaturization of the heat sink can be realized, and hence the miniaturization of the device and the cost reduction can be realized.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a constant current control circuit according to the present invention.

FIG. 2 is a timing chart showing the operation of the embodiment shown in FIG.

FIG. 3 is a circuit diagram showing a second embodiment of the present invention.

FIG. 4 is a circuit diagram showing a third embodiment of the present invention.

FIG. 5 is a circuit diagram showing a fourth embodiment of the present invention.

FIG. 6 is a circuit diagram showing a conventional constant current control circuit.

7 is a timing chart showing the operation of the constant current control circuit of FIG.

FIG. 8 is a waveform diagram showing, on an enlarged scale, each time axis of the collector voltage, the collector current, and the product of the collector voltage and the collector current (power saving) of the transistor in FIG.

FIG. 9 is a circuit diagram showing a conventional constant current control circuit having a function of lengthening an ON / OFF cycle of a transistor.

10 is a timing chart showing the operation of each part of the configuration of FIG.

[Explanation of symbols]

1,1 6 Comparator 2 Reference voltage generation circuit 3,13,17,18,19,20,22,23 Resistance 4 Buffer 5 Transistor 6 Load 7 Flywheel diode 8 Clamp diode 14 Capacitor 15 Schmitt trigger buffer 21 FET

Claims (1)

(57) [Claims] 1. A switching element for controlling a current flowing through a load, a current detecting means for detecting a value of a current flowing through the load, a comparison circuit for comparing a current value by the current detecting means with a reference voltage, and the comparison. A constant current control circuit for controlling the switching element using the comparison result of the circuit, comprising an integrating circuit for integrating the output of the comparing circuit, and a converting means for converting the output of the integrating circuit into a digital value. A constant current control circuit, wherein the output of the means is a control signal for the switching element.