JP2677215B2 - Zero volt switch Pulse width modulation type switching regulator control circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control circuit for a switching regulator, and more particularly to a control circuit for a zero volt switching (ZVS) pulse width modulation (PWM) type switching regulator.

[0002]

2. Description of the Related Art A switching regulator is widely used as a small-sized and highly efficient power source, and various types of circuit configurations have been put to practical use. In switching regulators, pulse width modulation (PWM) is generally used.
Modulation) controls the output voltage. Zero Volt Switching (ZVS) has been proposed as a new technology to reduce switching noise and further improve power conversion efficiency in PWM type switching regulators (eg, Kosuke Harada, Yasushi Ninomiya, Ken Koubun). , Multiple Authorship:
"Basics of switching converters": Corona).

FIG. 3A is a basic circuit diagram of a zero-volt switching pulse width modulation (hereinafter referred to as ZVS-PWM) type switching regulator. The commutation diode in the conventional step-down switching regulator circuit is replaced with the second switch element, and a capacitor is connected in parallel to each switch element.

That is, assuming that the input power source E is connected between the common ground point and the input terminal T ₁ , the input terminal T ₁
And a common ground point, first and second switch elements Q ₁ and Q _{2 which} are typically power MOS transistors are connected in series, and each of the switch elements Q ₁ and Q ₂ is respectively connected. The capacitors C ₁ and C ₂ are connected in parallel. The switch elements Q ₁ and Q ₂ have respective gate terminals G ₁ and G ₂
ON / OFF is controlled by the voltage applied to the. One end of the choke coil L is connected to the connection point between the switch element Q ₁ and the switch element Q _2, and the other end of the choke coil L is connected to the output terminal T ₂ . A capacitor C ₃ is provided between the output terminal T ₂ and the common ground point. Here, the voltage at the output terminal T ₂ is referred to as the output voltage V _o .
The load resistor R is connected between the terminal T ₂ and a common ground point.

The operation timing of each switch element Q ₁ , Q ₂ is shown in FIG. 3 (b). In the ZVS-PWM type switching regulator, the switching elements Q ₁ and Q ₂ are alternately turned on. At that time, both switching elements Q ₁ and Q ₂ are turned on.
Period in which both ₁ and Q ₂ are in the off state (dead time t _d ).
Is provided to enable zero volt switching in each of the switching elements Q ₁ and Q ₂ , thereby reducing switching noise and improving power conversion efficiency. The ON time of the first switch element Q ₁ is t _a ,
Of the switching element Q ₂ is t _b , and the repetition period is t
_{If s} , the dead time t _d is a constant time that satisfies t _b = t _a + 2 × t _d . Also, the first switch element Q
The duty ratio D _{a of 1} is D _a = t _a / t _s , and the output voltage V _o is controlled by changing the duty ratio D _a while keeping t _d constant.

[0006]

Although a basic circuit configuration of a ZVS-PWM type switching regulator is known, a practical control circuit for appropriately driving each switch element has been realized so far. No,
Therefore, the ZVS-PWM type switching regulator itself has not been put into practical use.

An object of the present invention is to provide a control circuit for a ZVS-PWM type switching regulator, which is highly accurate and simple.

[0008]

A control circuit for a zero volt switch pulse width modulation type switching regulator of the present invention is a control circuit used for controlling a zero volt switch pulse width modulation type switching regulator,
An error amplifier that receives an output voltage signal of the switching regulator as an input and detects an error between the output voltage signal and a reference voltage, and a signal generation circuit that generates a pulse signal of a constant frequency having a duty ratio according to the magnitude of the error. And an inverter that inverts the output of the signal generation circuit,
A first flip-flop that receives the output of the signal generation circuit, a second flip-flop that receives the output of the inverter, and a first flip-flop that delays the non-inverted output of the first flip-flop for a predetermined time. A delay circuit, a second delay circuit that delays the non-inverted output of the second flip-flop by the predetermined time, an output of the first delay circuit, and a non-inverted output of the second flip-flop are input. And a second exclusive OR circuit that receives the output of the second delay circuit and the inverted output of the first flip-flop as input. The output of the logical OR circuit is used for on / off control of each switch element of the switching regulator.

In the present invention, the signal generating circuit can be composed of a triangular wave oscillator which generates a triangular wave signal of a constant frequency, and a comparator which compares the output of the error amplifier with the triangular wave signal and outputs the result. Also, each delay circuit can be configured by an integrating circuit having the same time constant so that the threshold voltage of the input of each exclusive OR circuit is the same.

[0010]

Since two flip-flops, delay circuits and exclusive OR circuits are used so that an appropriate output having a dead time can be obtained, highly accurate control for the ZVS-PWM type switching regulator. The circuit can be realized with a simple structure.

[0011]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a ZVS-PWM according to an embodiment of the present invention.
FIG. 2 is a block diagram showing a configuration of a control circuit of the type switching regulator, and FIG. 2 is a timing chart showing changes in voltage at each point in the control circuit of FIG. 1. This control circuit is preferably used for controlling a ZVS-PWM type switching regulator whose basic circuit diagram is shown in FIG.
_{With o} as an input, the drive signals of the switch elements Q ₁ and Q ₂ are output. Based on this drive signal, a drive circuit (not shown) controls ON / OFF of each switch element Q ₁ , Q ₂ .

An error amplifier A is provided which _{receives the} reference voltage V _ref and the output voltage V _{o of the} switching regulator as inputs and detects and amplifies an error between them. Also,
A triangular wave oscillator OSC that oscillates a triangular wave at a constant frequency is provided. The output of the error amplifier A and the output of the triangular wave oscillator OSC are input to the comparator K and compared with each other. Further, to this control circuit, an inverter INV that receives the output of the comparator K and inverts it, a first T-type flip-flop FF ₁ that receives the output of the comparator K as a clock input, and an output of the inverter INV as a clock input a second T-type flip-flop FF ₂ to, FF ₁ of the first flip-flop
A first integrator INT _{1 to} which the non-inverted output Q of
A second integrator circuit INT _{2 to} which the non-inverted output Q of the second flip-flop FF ₂ is input, and an output of the first integrator circuit INT ₁ and the non-inverted output Q of the second flip-flop 1 Output of the exclusive OR circuit EX ₁ and the second integration circuit INT ₂ and the inverted output of the _first flip-flop FF ₁ .

[0013]

[Outside 1] And a second exclusive OR circuit EX ₂ which receives The output signal from the first exclusive OR circuit EX ₁ is
Via the terminal a, it becomes a drive signal for the first switching element Q ₁ (see FIG. 3) of the switching regulator, and similarly, the output signal from the _second exclusive OR circuit EX ₂ passes through the terminal b, It becomes a drive signal for the switch element Q ₂ .

The integrator circuits INT ₁ and INT ₂ are for delaying the input signals by the same predetermined time, are CR type circuits composed of resistors and capacitors, and have the same time constant. The exclusive OR circuits EX ₁ and EX ₂ are
With respect to the input voltage characteristic, they have the same threshold voltage.

Next, the operation of this control circuit will be described. The error amplifier A amplifies the error between the output voltage V _o of the switching regulator and the reference voltage V _ref (see FIG. 2), and the triangular wave oscillator OSC outputs a triangular wave having a constant frequency (see FIG. 2). As is clear from the following description, the cycle of the triangular wave becomes the repeating cycle t _s . The comparator K compares the output of the error amplifier A (shown in FIG. 2) with the output of the triangular wave oscillator OSC (shown in FIG. 2), and as shown in FIG. The value "1" is output, and the logical value "0" is output in other periods. Therefore, the duty ratio of the output signal of the comparator K corresponds to the magnitude of the error detected by the error amplifier A.

The output of the comparator K is input to the clock terminal CLK of the _first T-type flip-flop FF ₁ and also inverted by the inverter INV (see FIG. 2), and then the output of the second T-type flip-flop FF ₂ . Input to clock terminal CLK. Each flip-flop FF ₁ , F
Assuming F ₂ is a positive edge trigger, the non-inverted output Q and the inverted output of the first flip-flop FF ₁

[0017]

[Outside 2] Respectively as shown by and in FIG.
The non-inverted output Q of the second flip-flop FF ₂ becomes as shown by in FIG. First flip-flop FF
The output of _{1 and} the output of the second flip-flop FF ₂ are temporally displaced by the width of the output pulse of the comparator K, that is, depending on the magnitude of the above-mentioned error.

In the integrating circuits INT ₁ and INT ₂ , the non-inverted outputs Q of the flip-flops FF ₁ and FF ₂ are integrated according to the time constant of CR. The outputs of the integrating circuits INT ₁ and INT ₂ are shown in and of FIG. 2, respectively. The first exclusive OR circuit EX ₁ obtains and outputs the exclusive OR of the output of the _first integration circuit INT ₁ and the non-inverted output Q of the _second flip-flop FF ₂ (a in FIG. 2). reference). That is, the output is similar to the output of the comparator K, but the pulse rising time is delayed by a predetermined time determined by the time constant of the integrating circuit INT ₁ and the threshold voltage of the input of the exclusive OR circuit EX ₁ . Is obtained. Here, as this predetermined time coincides with the dead time t _d of the ZVS-PWM switching regulator in advance so as to determine the time constant and Suresshohorudo voltage. Similarly,
The second exclusive OR circuit EX ₂ is connected to the second integration circuit IN 2.
The exclusive OR of the output of T ₂ and the inverted output of the _first flip-flop FF ₁ is calculated and output (see b in FIG. 2). Therefore, the second exclusive OR circuit EX ₂ provides an output similar to the output of the inverter INV, but with the rising edge of the pulse delayed by the dead time t _d .

As described above, the dead time t _d is the time constant of the integrating circuits INT ₁ and INT ₂ and the exclusive OR circuit E.
It is constant because it is determined by the threshold voltages of X ₁ and EX ₂ . The repetition time t _s is the triangular wave oscillator OS
It is constant because it is determined by the oscillation frequency of C, and terminal a is "1".
In a time t _a will vary according to the error between the output voltage V _o and the reference voltage V _ref of the switching regulator. Therefore, t _b = t _a + 2 × t _d is always established.
The repeating cycle t _s and the dead time t _d are determined according to the constant of each element of the ZVS-PWM type switching regulator, the input voltage and the desired output voltage, and the gain of the error amplifier A is appropriately set and the terminal a is set. Since the switching elements Q ₁ and Q ₂ are controlled to be turned on / off by the outputs from the output terminals b and b, the control circuit can appropriately control the ZVS-PWM type switching regulator.

[0020]

As described above, the present invention provides a highly accurate control circuit for a ZVS-PWM type switching regulator with a simple circuit configuration using a flip-flop, a delay circuit, an exclusive OR circuit and the like. Configurable, ZVS
There is an effect that a PWM type switching regulator can be easily realized.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a control circuit of a ZVS-PWM type switching regulator according to an embodiment of the present invention.

2 is a flowchart of the control circuit of FIG.

FIG. 3A is a basic circuit diagram of a ZVS-PWM type switching regulator, and FIG. 3B is a timing chart showing drive signals for respective switch elements.

[Explanation of symbols]

A Error amplifier E Input power supply EX ₁ and EX ₂ Exclusive OR circuit FF ₁ and FF ₂ Flip-flop G ₁ and G ₂ Gate terminal K Comparator INV Inverter INT ₁ and INT ₂ Integration circuit OSC Triangular wave oscillator Q ₁ and Q ₂ switch Element T ₁ , T ₂ terminal R Load resistance V _o Output voltage V _ref Reference voltage

Claims (3)

(57) [Claims] 1. A control circuit used for controlling a zero-volt switch pulse width modulation type switching regulator, wherein an error is detected by using an output voltage signal of the switching regulator as an input and detecting an error between the output voltage signal and a reference voltage. An amplifier, a signal generation circuit that generates a pulse signal of a constant frequency having a duty ratio according to the magnitude of the error, and an inverter that inverts the output of the signal generation circuit,
A first flip-flop that receives the output of the signal generation circuit, a second flip-flop that receives the output of the inverter, and a first flip-flop that delays the non-inverted output of the first flip-flop for a predetermined time. A delay circuit, a second delay circuit that delays the non-inverted output of the second flip-flop by the predetermined time, an output of the first delay circuit, and a non-inverted output of the second flip-flop are input. And a second exclusive OR circuit that receives the output of the second delay circuit and the inverted output of the first flip-flop as input. A control circuit of a zero volt switch pulse width modulation type switching regulator in which the output of the logical OR circuit is used for on / off control of each switching element of the switching regulator. 2. The signal generation circuit includes a triangular wave oscillator that generates a triangular wave signal having a constant frequency, and a comparator that compares the output of the error amplifier with the triangular wave signal and outputs the result. 1. A control circuit for a zero volt switch pulse width modulation type switching regulator according to 1. 3. The zero-volt switch pulse width according to claim 1, wherein each of the delay circuits is formed by an integrating circuit having the same time constant, and the threshold voltage of the input of each of the exclusive OR circuits is the same. Modulation type switching regulator control circuit.