JP2559512B2 - Metal film thickness measurement method - Google Patents

Metal film thickness measurement method

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Publication number
JP2559512B2
JP2559512B2 JP2007836A JP783690A JP2559512B2 JP 2559512 B2 JP2559512 B2 JP 2559512B2 JP 2007836 A JP2007836 A JP 2007836A JP 783690 A JP783690 A JP 783690A JP 2559512 B2 JP2559512 B2 JP 2559512B2
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JP
Japan
Prior art keywords
opening
film thickness
metal film
film
embedded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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JP2007836A
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Japanese (ja)
Other versions
JPH03211854A (en
Inventor
信裕 三沢
寿哉 鈴木
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Fujitsu Ltd
Original Assignee
Fujitsu Ltd
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Filing date
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Priority to JP2007836A priority Critical patent/JP2559512B2/en
Publication of JPH03211854A publication Critical patent/JPH03211854A/en
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Publication of JP2559512B2 publication Critical patent/JP2559512B2/en
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Expired - Lifetime legal-status Critical Current

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】 〔概要〕 金属膜の膜厚測定方法に関し、 開口部内に埋め込まれた金属膜の膜厚を非破壊、非接
触、かつ、高い精度で測定することができる金属膜の膜
厚測定方法を提供することを目的とし、 下地の膜上に開口部を有する絶縁層が形成され、該開
口部内の下地の膜上に選択成長によって埋め込まれた金
属膜の膜厚を測定する方法において、下地の膜上に絶縁
層を形成する工程と、該絶縁層に開口部および該開口部
よりも大きい面積を有する金属膜のシート抵抗測定用の
開口パターンを形成する工程と、該開口部および該開口
パターンに金属膜を同時に埋め込む工程と、該開口パタ
ーンに埋め込まれた金属膜のシート抵抗を測定し、該測
定値に基づいて、予め求められた、該開口パターンに埋
め込まれる金属膜の膜厚と該開口部に埋め込まれる金属
膜の膜厚との関係により、該開口部に埋め込まれた金属
膜の膜厚を求める工程と、から構成する。
The present invention relates to a method for measuring the thickness of a metal film, which is capable of non-destructive, non-contact and highly accurate measurement of the thickness of a metal film embedded in an opening. For the purpose of providing a film thickness measuring method, an insulating layer having an opening is formed on a base film, and the film thickness of a metal film embedded by selective growth on the base film in the opening is measured. In the method, a step of forming an insulating layer on a base film, a step of forming an opening and an opening pattern for measuring a sheet resistance of a metal film having an area larger than the opening in the insulating layer; Part of the metal film embedded in the opening pattern and the step of simultaneously embedding the metal film in the opening pattern, the sheet resistance of the metal film embedded in the opening pattern is measured, and the metal film embedded in the opening pattern is calculated based on the measured value. And the film thickness of The step of obtaining the film thickness of the metal film embedded in the opening according to the relationship with the film thickness of the metal film embedded in the opening.

〔産業上の利用分野〕[Industrial applications]

本発明は、金属膜の膜厚測定方法に関し、詳しくはウ
エハー上に開口部を有する絶縁層が形成され、該開口部
内のウエハー上に選択CVD法によって埋め込まれた、例
えばタングステン(W)等の金属膜の膜厚を測定する方
法に関する。
The present invention relates to a method for measuring a film thickness of a metal film, and more specifically, an insulating layer having an opening is formed on a wafer, and the wafer in the opening is filled with a selective CVD method such as tungsten (W). The present invention relates to a method for measuring the film thickness of a metal film.

近時、半導体素子の微細化に伴いコンタクトホールの
アスペクト比が大きくなる傾向にあることから、アスペ
クト比の大きいコンタクトホールにタングステン等の金
属膜を選択的に成長させる、いわゆる選択CVD法による
タングステンの埋め込み形成が非常に有用な技術となっ
てきている。特に、この選択CVD法による埋め込み形成
は金属配線の表面の平担化を図る上で非常に優れた技術
であり、コンタクトホール内に埋め込まれたタングステ
ンの膜厚の精密制御およびモニタリングすることが重要
視されている。このため、タングステンの埋め込まれた
膜厚の測定を簡略化する方法が必要となってきている。
In recent years, the aspect ratio of contact holes tends to increase with the miniaturization of semiconductor devices.Therefore, a so-called selective CVD method for growing a metal film such as tungsten in a contact hole with a large aspect ratio is used. Buried formation has become a very useful technique. In particular, the buried formation by the selective CVD method is a very excellent technique for flattening the surface of the metal wiring, and it is important to precisely control and monitor the film thickness of the tungsten buried in the contact hole. Is being watched. Therefore, there is a need for a method that simplifies the measurement of the film thickness of embedded tungsten.

〔従来の技術〕[Conventional technology]

従来の選択成長によるコンタクトホールへの例えばタ
ングステン等の金属膜の埋め込み形成にあっては、埋め
込まれた金属膜の膜厚を測定する方法として、ウエハー
を割った後断面SEM(走査型電子顕微鏡)によってタン
グステンの膜厚を測定する方法や、アルファステップ装
置等を用い、直径数百μmの針をデバイスパターン上に
接触させて走査することによりスクライブライン等の数
百μm以上の比較的大きなパターンとコンタクトホール
を有するPSG等の絶縁層との段差を機械的に測定する方
法がなされていた。
In the conventional method of burying a metal film such as tungsten in a contact hole by selective growth, as a method of measuring the thickness of the buried metal film, a cross-section SEM (scanning electron microscope) is used after the wafer is broken. Method to measure the film thickness of tungsten, or using an alpha step device, etc., a needle with a diameter of several hundred μm is brought into contact with the device pattern and scanned to obtain a relatively large pattern of several hundred μm or more such as a scribe line. A method of mechanically measuring a step difference with an insulating layer such as PSG having a contact hole has been used.

〔発明が解決しようとする課題〕[Problems to be Solved by the Invention]

しかしながら、断面SEMにより埋め込まれた金属膜の
膜厚測定方法にあっては、断面SEMによって埋め込まれ
た金属膜の膜厚を測定する前にウエハーを割らなければ
ならず、製品を破壊しなければならないばかりか、測定
に多くの工数、時間を要してしまうという問題があっ
た。また、アルファステップ装置等の触針式段差測定装
置によって測定する方法にあっては、針をウエハー上に
接触させることにより埋め込まれた金属膜の膜厚を測定
しているため、接触による機械的な測定誤差を伴ってし
まう。具体的には実際に埋め込まれた金属膜の膜厚に対
してアルファステップ装置により埋め込まれた金属膜の
膜厚の測定では、6〜7%もの測定誤差があり、正確な
測定を行うことが困難であるという問題があった。
However, in the method of measuring the film thickness of the metal film embedded by the cross-section SEM, the wafer must be broken before measuring the film thickness of the metal film embedded by the cross-section SEM, and the product must be destroyed. Not only that, but there is also a problem that a lot of man-hours and time are required for measurement. Further, in the method of measuring with a stylus type step difference measuring device such as an alpha step device, since the film thickness of the embedded metal film is measured by bringing the needle into contact with the wafer, mechanical contact However, there are some measurement errors. Specifically, there is a measurement error of 6 to 7% in the measurement of the film thickness of the metal film embedded by the alpha step device with respect to the film thickness of the actually embedded metal film, and accurate measurement can be performed. There was a problem that it was difficult.

そこで本発明は、デバイスパターンに非接触で、かつ
ウエハーが破壊を生じないような法で正確かつ簡便に開
口部内に埋め込まれた金属膜の膜厚を測定することがで
きる金属膜の膜厚測定方法を提供することを目的として
いる。
Therefore, the present invention is capable of accurately and easily measuring the thickness of a metal film embedded in an opening by a method that does not contact the device pattern and does not damage the wafer. It is intended to provide a way.

〔課題を解決するための手段〕[Means for solving the problem]

本発明による金属膜の膜厚測定方法は上記目的を達成
するため、下地の膜上に開口部を有する絶縁層が形成さ
れ、該開口部内の下地の膜上に選択成長によって埋め込
まれた金属膜の膜厚を測定する方法において、下地の膜
上に絶縁層を形成する工程と、該絶縁層に開口部および
該開口部よりも大きい面積を有する金属膜のシート抵抗
測定用の開口パターンを形成する工程と、該開口部およ
び該開口パターンに金属膜を同時に埋め込む工程と、該
開口パターンに埋め込まれた金属膜のシート抵抗を測定
し、該測定値に基づいて、予め求められた、該開口パタ
ーンに埋め込まれる金属膜の膜厚と該開口部に埋め込ま
れる金属膜の膜厚との関係により、該開口部に埋め込ま
れた金属膜の膜厚を求める工程と、から構成するもので
ある。
In order to achieve the above object, the method for measuring the film thickness of a metal film according to the present invention has an insulating layer having an opening formed on a base film and a metal film embedded in the opening by selective growth on the base film. In the method of measuring the film thickness of, the step of forming an insulating layer on the underlying film, and forming an opening in the insulating layer and an opening pattern for measuring the sheet resistance of a metal film having an area larger than the opening And the step of simultaneously embedding a metal film in the opening and the opening pattern, and measuring the sheet resistance of the metal film embedded in the opening pattern, and the opening obtained in advance based on the measured value. The step of obtaining the film thickness of the metal film embedded in the opening from the relationship between the film thickness of the metal film embedded in the pattern and the film thickness of the metal film embedded in the opening.

〔作用〕[Action]

本発明では、下地の膜上に形成された絶縁層に絶縁層
の開口部よりも大きい面積を有する金属膜のシート抵抗
測定用開口パターンが形成され、選択成長によって該パ
ターンに埋め込まれた金属膜のシート抵抗値に基づいて
開口部内に埋め込まれた金属膜の膜厚が求められる。こ
の原理を説明する。
In the present invention, an opening pattern for sheet resistance measurement of a metal film having an area larger than the opening of the insulating layer is formed in the insulating layer formed on the underlying film, and the metal film embedded in the pattern by selective growth. The film thickness of the metal film embedded in the opening is obtained based on the sheet resistance value of. This principle will be described.

ある一定条件で金属膜を開口部に選択成長させた場合
の比抵抗を一定となしてρとし、シート抵抗測定用パッ
ドパターンにおけるシート抵抗をρsとした場合、該パ
ターンにおける金属膜の膜厚tが で表わされる。これに経験的に求めた開口部と該パッド
の表面積の差によって生じる比抵抗、成膜速度等の変化
を未知の関数Fsとして上記式(1)に乗算して開口部内
の金属膜の膜厚Tが と表わされるとして、この膜厚Tとシート抵抗ρsを補
正する曲線を経験的に求めておけば、シート抵抗測定用
のパッドパターンに埋め込まれた金属膜のシート抵抗か
ら開口部内に埋め込まれた金属膜の膜厚Tを容易に求め
ることができる。
When the specific resistance when the metal film is selectively grown in the opening under a certain constant condition is set to ρ and the sheet resistance of the sheet resistance measurement pad pattern is set to ρs, the film thickness t of the metal film in the pattern is set. But Is represented by The formula (1) is multiplied by the change in the specific resistance, the film formation rate, etc., which is caused by the difference in the surface area of the opening and the pad obtained empirically, and is multiplied by the equation (1) to obtain the film thickness of the metal film in the opening. T is If a curve for correcting the film thickness T and the sheet resistance ρs is empirically obtained, the metal embedded in the opening is calculated from the sheet resistance of the metal film embedded in the pad pattern for measuring the sheet resistance. The film thickness T of the film can be easily obtained.

そして、上述したように開口パターンのシート抵抗値
と、予め実験によって求められた開口部内の金属膜の膜
厚と開口パターン内の金属膜の膜厚との関係とを用いて
開口パターン内の金属膜の膜厚Tを求めることで、実際
に求めたい開口部内の膜厚Tを正確に求めることができ
る。
Then, as described above, by using the sheet resistance value of the opening pattern and the relationship between the film thickness of the metal film in the opening and the film thickness of the metal film in the opening pattern, which is obtained in advance by experiments, the metal in the opening pattern is used. By obtaining the film thickness T of the film, it is possible to accurately obtain the film thickness T in the opening that is actually desired.

すなわち、開口部に金属膜を形成する選択成長法にあ
っては、開口部の大きさ(面積)、成長速度(成長ガス
の供給量)等の成長条件により開口部に形成される金属
膜の膜厚が異なる。したがって、単にシート抵抗測定用
の開口パターン内の金属膜のシート抵抗を測定してその
シート抵抗値から開口部内の金属膜の膜厚を求めた場合
(そのシート抵抗値そのものを開口部内の金属膜の膜厚
とした場合)、開口部内の膜厚を正確に求めることがで
きない。
That is, in the selective growth method for forming a metal film in the opening, the metal film formed in the opening is controlled by the growth conditions such as the size (area) of the opening and the growth rate (supply amount of growth gas). The film thickness is different. Therefore, when the sheet resistance of the metal film in the opening pattern for sheet resistance measurement is simply measured and the film thickness of the metal film in the opening is obtained from the sheet resistance value (the sheet resistance value itself is If the film thickness is set to 1), the film thickness in the opening cannot be accurately obtained.

本発明では、選択成長特有の現象に着目し、予め開口
部内の膜厚の相関を求めておき、その相関に基づいて開
口部内の膜厚を求めることにより、実際に求めたい開口
部内の膜厚Tを正確に求めることができる。
In the present invention, paying attention to the phenomenon peculiar to selective growth, the correlation of the film thickness in the opening is obtained in advance, and the film thickness in the opening is obtained based on the correlation to obtain the film thickness in the opening actually desired. It is possible to accurately obtain T.

〔実施例〕〔Example〕

以下、本発明を図面に基づいて説明する。 Hereinafter, the present invention will be described with reference to the drawings.

第1、2図は本発明に係る金属膜の膜厚測定方法の一
実施例を示す図であり、第1図は一実施例の金属膜の膜
厚測定方法を適用した半導体デバイスの構成図、第2図
はシート抵抗測定用パッドパターンに埋め込まれた金属
膜のシート抵抗と開口部(Via)に埋め込まれた金属膜
の膜厚との相関を表わすグラフであり、実線は経験的に
求められた校正曲線である。
1 and 2 are diagrams showing an embodiment of the method for measuring the film thickness of a metal film according to the present invention, and FIG. 1 is a configuration diagram of a semiconductor device to which the film thickness measuring method of the embodiment is applied. FIG. 2 is a graph showing the correlation between the sheet resistance of the metal film embedded in the sheet resistance measurement pad pattern and the film thickness of the metal film embedded in the opening (Via), and the solid line is empirically determined. It is the calibration curve obtained.

まず、構成を説明する。第1図において、1は下地の
膜である直径4インチのSiウエハーであり、該ウエハー
1上には絶縁膜として例えばPSG膜2が成長されてい
る。このPSG膜2にはスクライブライン3を介して複数
のコンタクトパターン4が重ねて形成されており、この
コンタクトパターン4には図示しない開口部としてのコ
ンタクトホールが複数形成され、該ホール内はSiウエハ
ー1が下地の膜として露出している。また、PSG膜2に
は4探針によるシート抵抗測定用パッドパターン(開口
パターン)5が9個重ねて形成されており、このパター
ン5は10mm×6mm程度の面積を有し、パターン5内にSi
ウエハー1が下地の膜として露出している。
First, the configuration will be described. In FIG. 1, 1 is a Si wafer having a diameter of 4 inches which is a base film, and a PSG film 2 as an insulating film is grown on the wafer 1. A plurality of contact patterns 4 are stacked on the PSG film 2 via scribe lines 3, and a plurality of contact holes as openings (not shown) are formed in the contact pattern 4, and the inside of the holes is a Si wafer. 1 is exposed as a base film. Further, nine sheet resistance measurement pad patterns (opening patterns) 5 are formed on the PSG film 2 by four-probe, and the pattern 5 has an area of about 10 mm × 6 mm. Si
The wafer 1 is exposed as a base film.

本実施例では、選択CVD法によってSiウエハー1上の
コンタクトパターン4にタングステン等の金属膜を埋め
込むのと同時にシート抵抗測定用パッドパターン5内に
もタングステン等の金属膜を成長させて埋め込み、数枚
のSiウエハー1についてパッドパターン5上のシート抵
抗を測定するとともに断面SEM写真によってコンタクト
ホール内のタングステンの膜厚を測定してみた。なお、
コンタクトパターン4上のシート抵抗は公知の4探深法
によって測定したものである。具体的には、コンタクト
パターン4に設けられた所定の入力端子から電流を流し
てコンタクトパターン4に設けられた所定の出力端子か
ら出力された電圧を測定し、両端子間の抵抗を測定する
ことによってタングステンのシート抵抗を測定する。そ
して、このときのコンタクトホール内の実際のタングス
テンの膜厚測定値とシート抵抗測定用パッドパターン5
上のタングステンのシート抵抗の測定値の相関を表わし
たものが第2図である。この結果、第2図のグラフの実
曲線をコンタクトホール内のタングステンの膜厚のシー
ト抵抗値に対する校正曲線とすると、この曲線により求
められるコンタクトホール内のタングステンの膜厚と、
断面SEM写真での実測によるタングステンの膜厚との誤
差が膜厚300nm付近において、±3%、500nm付近におい
て±4%程度であることが確認され、従来のアルファー
ステップ装置による測定誤差が6〜7%であることから
比べると非常に精度良く膜厚を求めることができる。し
たがって、本実施例では、デバイスパターンに非接触
で、かつSiウエハー1を破壊しないようにして、正確か
つ簡便にコンタクトホール内のタングステンの膜厚を求
めることができる。特に、パッドパターン5上のタング
ステンのシート抵抗値から、コンタクトホール内のタン
グステンの膜厚を求めるようにしているため、実際に求
めたいコンタクトホールのタングステンの膜厚を正確に
求めることができる。
In this embodiment, a metal film of tungsten or the like is embedded in the contact pattern 4 on the Si wafer 1 by the selective CVD method, and at the same time, a metal film of tungsten or the like is also grown and embedded in the pad pattern 5 for sheet resistance measurement. The sheet resistance on the pad pattern 5 was measured for each of the Si wafers 1, and the film thickness of tungsten in the contact hole was measured by a cross-sectional SEM photograph. In addition,
The sheet resistance on the contact pattern 4 is measured by the well-known 4-probe method. Specifically, a current is passed from a predetermined input terminal provided on the contact pattern 4 to measure a voltage output from a predetermined output terminal provided on the contact pattern 4, and a resistance between both terminals is measured. Measure the sheet resistance of tungsten by. Then, the actual measured film thickness of tungsten in the contact hole and the pad pattern 5 for sheet resistance measurement
FIG. 2 shows the correlation between the measured values of the sheet resistance of the upper tungsten. As a result, assuming that the real curve of the graph of FIG. 2 is a calibration curve for the sheet resistance value of the film thickness of tungsten in the contact hole, the film thickness of tungsten in the contact hole obtained by this curve,
It was confirmed that the error with the film thickness of tungsten measured by the cross-section SEM photograph was about ± 3% in the vicinity of the film thickness of 300 nm and ± 4% in the vicinity of 500 nm, and the measurement error by the conventional alpha step device was 6 to 6%. Since it is 7%, the film thickness can be obtained with extremely high accuracy. Therefore, in this embodiment, the film thickness of tungsten in the contact hole can be accurately and easily obtained without contacting the device pattern and without damaging the Si wafer 1. In particular, since the film thickness of tungsten in the contact hole is obtained from the sheet resistance value of tungsten on the pad pattern 5, it is possible to accurately obtain the film thickness of tungsten in the contact hole that is actually desired.

すなわち、コンタクトホールに金属膜を形成する選択
成長法にあっては、コンタクトホールの大きさ(面
積)、成長速度(成長ガスの供給量)等の成長条件によ
りコンタクトホールに形成される金属膜の膜厚が異な
る。したがって、単にシート抵抗測定用のパッドパター
ン5内のタングステンのシート抵抗を測定してそのシー
ト抵抗値からコンタクトホール内の金属膜の膜厚を求め
た場合(そのシート抵抗値そのものをコンタクトホール
内のタングステンの膜厚とした場合)、コンタクトホー
ル内の膜厚を正確に求めることができない。
That is, in the selective growth method of forming a metal film in the contact hole, the metal film formed in the contact hole is changed depending on the growth conditions such as the size (area) of the contact hole and the growth rate (supply amount of growth gas). The film thickness is different. Therefore, when the sheet resistance of tungsten in the pad pattern 5 for sheet resistance measurement is simply measured and the film thickness of the metal film in the contact hole is obtained from the sheet resistance value (the sheet resistance value itself is If the film thickness of tungsten is used), the film thickness in the contact hole cannot be accurately obtained.

本実施例では、選択成長特有の現象に着目し、予めコ
ンタクトホールおよびパッドパターン5内のタングステ
ンの相関を求めておき、その相関に基づいてコンタクト
ホール内の膜厚を求めることにより、実際に求めたいコ
ンタクトホール内のタングステンの膜厚を正確に求める
ことができる。
In this embodiment, focusing on the phenomenon peculiar to selective growth, the correlation between the contact hole and the tungsten in the pad pattern 5 is calculated in advance, and the film thickness in the contact hole is calculated based on the correlation, so that it is actually calculated. It is possible to accurately obtain the film thickness of tungsten in the desired contact hole.

なお、本実施例では、シート抵抗測定用パッドパター
ン5を9個設けているが、これに限らず、選択CVD法に
よるタングステンの埋め込み時にコンタクトホール内の
膜厚分布が良い場合にはシート抵抗測定用パッドパター
ン5の数を減らしても良い。このようにするとシート抵
抗測定用パッドパターン5のコンタクトパターン4への
占有率を小さくしてより多くのチップを製品化すること
ができるという効果がある。
In this embodiment, nine sheet resistance measurement pad patterns 5 are provided, but the present invention is not limited to this, and when the film thickness distribution in the contact hole is good when tungsten is filled by the selective CVD method, the sheet resistance measurement is performed. The number of pad patterns 5 for use may be reduced. This has the effect that the occupancy of the sheet resistance measuring pad pattern 5 to the contact pattern 4 can be reduced and more chips can be commercialized.

〔発明の効果〕〔The invention's effect〕

本発明によれば、開口パターンのシート抵抗値と、予
め実験によって求められた開口部内の金属膜の膜厚と開
口パターン内の金属膜の膜厚との関係とを用いて開口パ
ターン内の金属膜の膜厚を求めているので、デバイスに
非接触で、かつウエハーが破壊しないように開口部内に
埋め込まれた金属膜の膜圧を測定することができるとと
もに、開口部の大きさ(面積)、成長速度(成長ガスの
供給量)等の成長条件により開口部および開口パターン
に形成される金属膜の膜厚が異なっても、実際に求めた
い開口部内に埋め込まれた金属膜の膜厚を正確かつ簡便
に測定することができる。
According to the present invention, the sheet resistance of the opening pattern and the relationship between the film thickness of the metal film in the opening and the film thickness of the metal film in the opening pattern, which are obtained in advance by experiments, are used to determine the metal in the opening pattern. Since the film thickness is obtained, the film pressure of the metal film embedded in the opening can be measured without contacting the device and the wafer is not destroyed, and the size (area) of the opening can be measured. Even if the film thickness of the metal film formed in the openings and the opening pattern varies depending on the growth conditions such as the growth rate (growth gas supply amount), the film thickness of the metal film embedded in the openings actually desired is determined. It can be measured accurately and easily.

【図面の簡単な説明】[Brief description of drawings]

第1、2図は本発明に係る金属膜の膜厚測定方法を適用
した半導体デバイスの一実施例を示す図であり、 第1図はその構成図、 第2図はパッドパターンに埋め込まれた金属膜のシート
抵抗と開口部(Via)に埋め込まれた金属膜の膜厚との
相関を表わすグラフである。 1……Siウエハー(下地の膜)、2……PSG膜(絶縁
層)、5……シート抵抗測定用パッドパターン(開口パ
ターン)。
FIGS. 1 and 2 are views showing an embodiment of a semiconductor device to which the method for measuring the film thickness of a metal film according to the present invention is applied. FIG. 1 is its configuration diagram and FIG. 2 is embedded in a pad pattern. 7 is a graph showing the correlation between the sheet resistance of the metal film and the film thickness of the metal film embedded in the opening (Via). 1 ... Si wafer (base film), 2 ... PSG film (insulating layer), 5 ... Sheet resistance measurement pad pattern (opening pattern).

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】下地の膜上に開口部を有する絶縁層が形成
され、該開口部内の下地の膜上に選択成長によって埋め
込まれた金属膜の膜厚を測定する方法において、 下地の膜上に絶縁層を形成する工程と、 該絶縁層に開口部および該開口部よりも大きい面積を有
する金属膜のシート抵抗測定用の開口パターンを形成す
る工程と、 該開口部および該開口パターンに金属膜を同時に埋め込
む工程と、 該開口パターンに埋め込まれた金属膜のシート抵抗を測
定し、該測定値に基づいて、予め求められた、該開口パ
ターンに埋め込まれる金属膜の膜厚と該開口部に埋め込
まれる金属膜の膜厚との関係により、該開口部に埋め込
まれた金属膜の膜厚を求める工程と、を有することを特
徴とする金属膜の膜厚測定方法。
1. A method for measuring a film thickness of a metal film in which an insulating layer having an opening is formed on a base film, and the metal film embedded by selective growth on the base film in the opening is measured. Forming an insulating layer on the insulating layer, forming an opening in the insulating layer and an opening pattern for measuring sheet resistance of a metal film having an area larger than the opening, and forming a metal in the opening and the opening pattern. The step of simultaneously filling the film, the sheet resistance of the metal film embedded in the opening pattern is measured, and the film thickness of the metal film to be embedded in the opening pattern and the opening portion are calculated in advance based on the measured value. And a step of obtaining the film thickness of the metal film embedded in the opening according to the relationship with the film thickness of the metal film embedded in the opening.
JP2007836A 1990-01-17 1990-01-17 Metal film thickness measurement method Expired - Lifetime JP2559512B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007836A JP2559512B2 (en) 1990-01-17 1990-01-17 Metal film thickness measurement method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007836A JP2559512B2 (en) 1990-01-17 1990-01-17 Metal film thickness measurement method

Publications (2)

Publication Number Publication Date
JPH03211854A JPH03211854A (en) 1991-09-17
JP2559512B2 true JP2559512B2 (en) 1996-12-04

Family

ID=11676692

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007836A Expired - Lifetime JP2559512B2 (en) 1990-01-17 1990-01-17 Metal film thickness measurement method

Country Status (1)

Country Link
JP (1) JP2559512B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7047154B2 (en) 2003-01-14 2006-05-16 Kabushiki Kaisha Toshiba Interconnection pattern inspection method, manufacturing method of semiconductor device and inspection apparatus

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19958202C2 (en) * 1999-12-02 2003-08-14 Infineon Technologies Ag Process for producing a metal layer with a predetermined thickness

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50135098A (en) * 1974-04-17 1975-10-25
JPS59178741A (en) * 1983-03-30 1984-10-11 Oki Electric Ind Co Ltd Wafer for seemiconductor integrated circuit element
JPS6298414A (en) * 1985-10-25 1987-05-07 Nec Corp Power source control device for computer system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7047154B2 (en) 2003-01-14 2006-05-16 Kabushiki Kaisha Toshiba Interconnection pattern inspection method, manufacturing method of semiconductor device and inspection apparatus
US7640138B2 (en) 2003-01-14 2009-12-29 Kabushiki Kaisha Toshiba Interconnection pattern inspection method, manufacturing method of semiconductor device and inspection apparatus

Also Published As

Publication number Publication date
JPH03211854A (en) 1991-09-17

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