JP2557484B2 - MUSE decoder - Google Patents

Description

TECHNICAL FIELD The present invention relates to a MUSE decoder installed in a MUSE type television receiver.

(Prior Art) Currently, MUSE (Multiple Sub-ny), which is the most promising candidate for the high-definition (high-definition) television system using broadcasting satellites
The quist Sampling Encoding) television broadcasting experiment has begun.

With this MUSE method, a luminance signal with a bandwidth of 22 MHz and a bandwidth of 7
In order to frequency-modulate a baseband signal including a color signal of MHz and to transmit this by using one channel of a satellite broadcasting bandwidth of 27 MHz, the baseband signal is band-compressed to about 8 MHz. This band compression is performed by thinning out a complete sampling point group extracted from the original video signal according to a predetermined rule. At the time of thinning out the sampling points, the inter-field offset sampling is performed by utilizing the physiological characteristic of the viewer that the resolution in the diagonal direction on the screen is lower than that in the vertical and horizontal directions. In addition, the physiological characteristic of the viewer that the image quality is not so deteriorated even if the resolution is slightly lowered in a moving area is also used. That is, the screen to be transmitted is divided into a moving area and a still area, and the thinning rate of the sampling points for the moving area is increased more than that of the still area.

In the decoder on the receiving side, the sampling points thinned out by the encoder on the transmitting side are reproduced based on the sampling point groups before and after actually transmitted and received, and are inserted in the missing portions. The process of reproducing and inserting this missing sampling point is
This is called interpolation processing. The interpolation processing includes field interpolation performed by using adjacent sampling point groups in the same field and interfield interpolation performed by using sampling point groups at corresponding positions of adjacent fields. In this interpolation process, a moving area and a still area are detected from the reception screen, field interpolation is performed on the moving area, and interfield interpolation is performed on the still area.

Also, during inter-field interpolation for the stationary area, the phase of the transmission sample point is slightly shifted for each field in a cycle of four fields, and at the receiving side, it is four.
The resolution is improved by performing the reproduction by the combination of the sample points for the fields. The combination of the sampling points for four fields on the receiving side is performed based on the sub-sampling phase bits included in the control signal in the MUSE signal transmitted in field units. Note that in the MUSE method, sub-Nyquist sampling is performed at a frequency less than twice the maximum frequency fm of the input signal, so the term sub-sampling is also used instead of sampling.

(Problems to be solved by the invention) In the MUSE decoder currently under development, if the synchronization system is pulled in due to failure of detection of the synchronization signal,
When the detection of the sub-sample phase bit is not normally performed, the combination of the sample points for four fields is not normally performed, which causes a problem that the image quality is deteriorated.

Further, deterioration of image quality becomes a problem even in a still image mode in which a video signal for four fields is held and a still image is displayed by cyclically processing these. Instead of using the sub-sampled phase bits added to the video signal for 4 fields to be displayed as a still image, the sub-sampled phase bits with a 4-field period received after the start of displaying the still image are used for the still image. This is because the images are assembled. That is, if the sub-sampling phase bit changes due to movement in the screen, etc., sub-sampling points are assembled under a phase different from the actual one.

(Means for Solving the Problem) The MUSE decoder of the present invention includes a holding unit that holds a sub-sample phase bit detected as a part of a control signal for a period of 4 fields, and a sub-sample when the synchronization system is not normal. When the detection of the phase bit is not normally performed or when the still image is displayed by sequentially outputting the video signals of the held four fields, the sub-sample just detected as a part of the control signal. In place of the phase bits, supply control means for supplying sub-sampled phase bits over the period of four fields being held to the video processing section in a holding order and cyclically.

 Hereinafter, the operation of the present invention will be described in detail with reference to Examples.

(Embodiment) FIG. 1 is a configuration block diagram of a MUSE decoder according to an embodiment of the present invention.

In this MUSE decoder, IN is a MUSE signal input terminal, 1 is a BS (MUSE) tuner, 2 is a low-pass filter,
3 is an A / D conversion circuit, 4 is a synchronization detection circuit, 5 is a video processing unit, 6 is a control signal separation circuit, 7 is a clock generation circuit, 8 is an audio decoder, and 10 is a sub-sample phase bit holding / supply unit. .

The input terminal IN has a 12 GHz RF signal received by the BS antenna.
A MUSE signal converted from the signal to an intermediate frequency of 1.3 GHz is supplied. The MUSE signal is converted into a baseband signal by the BS tuner 1, supplied to the A / D conversion circuit 3 through the low pass filter 2, and converted into a digital signal. The digital MUSE signal is supplied to the sync detection circuit 4 and the video processing unit 5.
And the control signal separation circuit 6. The clock generation circuit 7 generates various clock signals based on the synchronization signals such as frame pulses and HD signals detected by the synchronization detection circuit 4, and supplies them to the video processing unit 5, the audio decoder 8 and the like. The digital audio signal output from the A / D conversion circuit 3 is decoded by the audio decoder 8 and supplied to an audio output unit in the subsequent stage (not shown).

The sub-sample phase bit holding / supply unit 10 is a holding circuit.
11, 12, 13 and switches 14, 17 and 2-input OR gate 1
It is composed of 5 and 16.

The holding circuit 11 connects the Y sub-sampled phase bits to the Y sub-sampled phase bits by cascade-connecting four stages of latch circuits (Z ⁻¹ ) that give a delay time of one field to the Y sub-sampled phase bits. Hold for a period of 4 fields. Similarly, the holding circuit
Reference numerals 12 and 13 each include a latch circuit (Z ^-1 ) for giving a delay time of one field to each of the C sub-sample phase bit and the inter-field sub-sample phase bit (Y) output from the control signal separation circuit 6 over four stages. Cascading holds the Y subsample phase bits and the interfield subsample phase bits for a period of 4 fields.

When the built-in PLL is out of synchronization in the clock generation circuit 7, the voltage of the signal line connected to one input terminal of the 2-input OR gate 15 is raised from low to high. Further, when the sub-sampling phase bit is not normally detected due to an uncorrectable code error in the control signal separation circuit 6, the voltage of the signal line connected to the other input terminal of the 2-input OR gate 15 is changed from low to high. Is launched. The output terminal of the 2-input OR gate 15 is connected to one input terminal of the 2-input OR gate 16. Furthermore,
When the viewer of the MUSE decoder closes the switch 17 to enter the still image display mode, the voltage of the signal line connected to the other input terminal of the 2-input OR gate 26 rises from low to high.

The contact of the switch 14, which is controlled by the output of the 2-input OR gate 16, is switched to the upper side in the figure when the output of the 2-input OR gate 16 is low, and is switched to the lower side in the figure when the output of the 2-input OR gate 16 is high. Can be switched to the side.

Therefore, if the synchronization system is normal, the detection of the sub-sample phase bit is normal, and the mode is not the still image display mode, the output of the OR gate 16 becomes low, and each sub-sample phase bit output from the control signal separation circuit 6 becomes It passes through the switch 14 as it is and is supplied to the video processing unit 5. On the other hand, when out-of-sync occurs, when the detection of the sub-sample phase bit is not normal, or when the still image display mode is selected, the output of the OR gate 16 becomes high, and the output from the control signal separation circuit 6 is output. After that, the sub-sample phase bits delayed by four fields in each of the holding circuits 11 and 12 or gates 13 are sequentially and cyclically supplied to the video processing unit 5 via the switch 14.

The control signals separated / detected by the control signal separation circuit 6 except the sub-sample phase bits such as motion vectors are directly supplied to the video processing unit 5.

The video processing unit 5 includes a pre-processing unit that performs pre-processing such as non-linear de-emphasis and inverse gamma correction, an inter-frame interpolation unit, a motion detection unit, a luminance signal processing unit, and a color signal processing unit. For each of the luminance signal and the chrominance signal, interpolation processing is performed by inter-field interpolation for a static area, and interpolation processing is performed by field interpolation for a moving area.
The processing results of both systems are combined with weighting according to the motion detection result, converted into analog R, G, B signals and output. For more detailed configuration of this video processing unit 5, see NE
"MUSE Decoder" published in Technical Report Vol.41 No.3 / 1988
See our paper entitled ,.

(Effects of the Invention) As described in detail above, the MUSE decoder of the present invention holds the sub-sampled phase bits detected as a part of the control signal for a period of 4 fields, and stores them under a predetermined condition. In this configuration, the sub-sample phase bits over the period of 4 fields that are being held are cyclically supplied to the video processing unit in the order of holding, so that out-of-synchronization occurs, detection of sub-sample phase bits fails, or still Even when the image display mode is started, it is possible to effectively prevent the deterioration of the image quality due to the improper combination of the sub-sampling points.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration example of a MUSE decoder according to an embodiment of the present invention. 1 ... BS tuner, 3 ... A / D conversion circuit, 5 ... video processing unit, 6 ... control signal separation circuit, 7 ... clock generation circuit, 10 ... subsample phase bit holding / supply unit, 11 , 12,13 …… Subsample phase bit holding unit, 14,1
7 ... switch.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor O ▲ Tsuka ▼ Yoshimichi 1-10-11 Kinuta, Setagaya-ku, Tokyo Inside the broadcasting technology research institute of Japan Broadcasting Corporation (72) Inventor Izumi ▲ Yoshi ▼ Nori Setagaya-ku, Tokyo Kinuta 1-10-11, Broadcasting Technology Research Laboratories, Japan Broadcasting Corporation

Claims (1)

(57) [Claims] 1. A decoder for a MUSE signal in which a phase difference between sub-sampling points between adjacent fields is changed in a period of 4 fields, and the sub-sampling phase bit detected as a part of a control signal is held for a period of 4 fields. When the holding unit and the synchronization system are not normal, the detection of the sub-sample phase bit is not normally performed, or the still image is displayed by sequentially and repeatedly outputting the video signals of the held four fields. Supply control means for cyclically supplying the sub-sample phase bits over the period of the holding four fields to the video processing unit in place of the sub-sample phase bits just detected as part of the control signal. MUSE decoder characterized by having.