JP2541240B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device, and particularly to a heterojunction device represented by a field effect transistor having an AlGaAs / GaAs selective doping structure, that is, HEMT (High Mobility Transistor) and the like. And a semiconductor device using the two-dimensional electron gas layer as an operating layer.

[Prior Art] Conventionally, in a semiconductor device such as HEMT, a two-dimensional electron gas layer formed at a hetero interface between a GaAs semiconductor layer with no impurity added and an AlGaAs mixed crystal semiconductor layer with impurity added is used as an operating layer. In order to ensure that the GaAs semiconductor layer and the Al
One or more two-dimensional electron gas layers are formed by alternately growing GaAs semiconductor layers, and each two-dimensional electron is formed by a single or multiple gate electrodes embedded in each layer of the AlGaAs semiconductor layer. A structure for controlling traveling carriers in the gas layer has been adopted.

FIG. 3 shows an example of a structure in which a gate electrode is embedded in a semiconductor layer in a conventional HEMT. The gate electrode 35 is formed of GaAs layers 32 and 34 without impurities or AlGaAs with impurities.
The effect obtained by incorporating in the layer 33 is firstly the improvement of the source resistance, and secondly, the GaAs layers 32 and 34 and the AlGaAs.
When a multilayer two-dimensional electron gas layer 40 is formed by alternately growing the layers 33 on the substrate 31, when operating the two-dimensional electron gas layer 40 as a channel, a single gate or a plurality of gates are used. The point is that the method of embedding the electrodes is considered to be effective.

[Problems to be Solved by the Invention] However, in the transistor having the conventional structure described above, the width of the depletion layer generated on the side of each two-dimensional electron gas layer 40 of the gate electrode 35 is changed to change the width of the two-dimensional electron gas layer. Since it controls traveling carriers in 40, the semiconductor on the drain side or the source side of the gate electrode 35 is not essentially necessary and acts as a parasitic capacitance between the source and the gate or between the drain and the gate. However, this is a major drawback in high-frequency characteristics or high-speed switching characteristics.

The present invention has been made in view of the above problems, and provides a semiconductor device capable of reducing the parasitic capacitance between the gate and the source or the drain and improving the high frequency characteristics or the high speed switching characteristics of the field effect transistor. The purpose is to provide.

[Means for Solving the Problems] The present invention provides a two-dimensional electron formed on a semiconductor layer side having a large electron affinity between different semiconductor layers having different electron affinities, along a hetero interface between the semiconductor layers. It has one or two or more gas layers and an alloy electrode for taking out a current flowing through the two-dimensional electron gas layer, and one or more gate electrodes embedded in the semiconductor layer. The semiconductor device is characterized in that the source side surface and the drain side surface of the gate electrode are provided with side walls formed of an insulator having a relative dielectric constant smaller than that of the semiconductor layer.

In the present invention, examples of the insulator having a relative dielectric constant smaller than that of the semiconductor layer include silicon dioxide.

[Operation] The present invention reduces the parasitic capacitance between the source and the gate or between the drain and the gate in a field effect transistor having a buried gate electrode having a two-dimensional electron gas layer as an operating layer. In order to increase the frequency of the operation, the side surface of the gate electrode on the source side and the side surface of the gate electrode on the drain side are provided with side walls made of an insulator having a small relative dielectric constant.

Conventionally, the parasitic capacitance on both the source side and the drain side of the buried gate electrode was not negligible as that produced by the GaAs layer or AlGaAs layer in contact with the gate electrode, but In the effect transistor, since the insulator having a small relative dielectric constant, such as a silicon oxide film, is arranged on the side surfaces of the gate electrode on the source side and the drain side, the parasitic capacitance is significantly improved as compared with the conventional case. The relative permittivity of GaAs and AlGaAs is 12.5 to 13.0, but the relative permittivity of SiO ₂ is 3.5 to 4.0.
Compared with that of GaAs and AlGaAs, it shows a value that is about 1/3 or less, which greatly contributes to the improvement of high frequency characteristics as a field effect transistor.

Embodiments Embodiments of the present invention will be described in detail below with reference to the drawings.

1 is a longitudinal sectional view showing an embodiment of a field effect transistor according to the present invention. In FIG. 1, 1 is a semi-insulating GaAs substrate, 2 and 4 are impurity-free GaAs semiconductor layers,
3 is an impurity-doped AlGaAs semiconductor layer, 5 is a gate electrode, 6 is a source electrode, 7 is a source region, 8 is a drain electrode, 9 is a drain region, 10 is a two-dimensional electron gas layer, and 11 is a SiO ₂ side wall. In the field effect transistor shown in this embodiment, basically, an AlGaAs semiconductor layer 3 doped with an impurity is sandwiched between two layers of undoped GaAs semiconductor layers 2 and 4, and a gate electrode 5 is formed in the AlGaAs semiconductor layer 3. It has a buried structure. In this structure, a two-dimensional electron gas layer 10 is formed at the interface between the two GaAs semiconductor layers 2 and 4 and the AlGaAs semiconductor layer 3. The Al
The depletion layer around the gate electrode 5 embedded in the GaAs semiconductor layer 3 spreads vertically due to the operating voltage, and the two depletion layers
The carrier accumulation state of the three-dimensional electron gas layer 10 is simultaneously controlled. Therefore, this embedded gate electrode structure is
In addition to improving the controllable current amount compared to MT,
It becomes possible to obtain high transconductance. First
The sidewalls 11 of the silicon oxide film provided on the side surfaces on the source side and the drain side of the gate electrode 5 shown in the figure are insulator sidewalls of the present invention, and the presence of the sidewalls 11 causes parasitic capacitance between the gate and the source and the gate capacitance. The parasitic capacitance between the drains is reduced, and the high frequency characteristics and high speed switching characteristics of the field effect transistor are improved.

Next, an example of a manufacturing process of the embedded gate electrode having the above-mentioned sidewall will be described with reference to FIGS. 2 (a) to 2 (d). Each figure shows a gate electrode on a semi-insulating GaAs substrate 21, for example, an undoped GaAs semiconductor layer or an doped AlGaAs semiconductor layer 22 grown by metal organic chemical vapor deposition.
The case of embedding 23 will be described. Gate electrode 23
As the material of the above, a metal such as tungsten silicide or a metal compound is used, and a thickness of 400 or less is obtained by sputtering, electron beam evaporation, or CVD method as shown in FIG.
The gate electrode 23 is attached by Å, and the metal width is set to 5000 Å or less by, for example, a plasma etching method or a lift-off method. This metal width corresponds to the gate length.

After forming the gate electrode 23 by CVD, as shown in FIG. 2 (b), the entire surface of the silicon oxide film 24 is deposited about 400 Å, MIE with a mixed gas of CF ₄ and SF ₆ (Magne
tron Ion Etching) method and the upper surface of the gate electrode 23 and
The silicon oxide film 24 is etched until just before the surface of the GaAs semiconductor layer or AlGaAs semiconductor layer 22 appears. afterwards,
The silicon oxide film 24 is etched with a mixed solution of hydrogen peroxide and hydrofluoric acid until the surface is completely exposed.

As a result, as shown in FIG. 2 (c), the gate electrode 23
Side walls 25 of the silicon oxide film 24 are formed on both sides of the. After that, the GaAs semiconductor layer or the AlGaAs semiconductor layer 22 is grown again by the metal organic chemical vapor deposition method as before the formation of the gate electrode. The effectiveness and reproducibility of metalorganic chemical vapor deposition for n ⁺ selective growth is described, for example, in the 1984 45th Japan Society of Applied Physics.
14a-J-7 reported by Nakamura et al., And regarding the buried growth of the metal gate electrode, see Table 56-50.
In the 0991 publication, in the manufacturing process of PBT, Carl.O.Bozler
Reported in detail by others. As the material of the gate electrode 23, tungsten is pointed out to be effective because it is sufficiently inert to GaAs and other products used during the epitaxial growth process. However, as the gate electrode 23, low-resistance GaAs to which p-type impurities are added at a high concentration instead of metal or its compound may be used.

Through the above steps, the gate electrode 23 is sandwiched between the silicon oxide film 24 in the GaAs semiconductor layer or AlGaAs semiconductor layer 22.
The operation of embedding is completed with the shape as shown in FIG.

Although the case where the GaAs / AlGaAs system is used as the crystal system has been shown, the present invention can be applied to other InGaAs / InAlAs systems, InP / InGaAs systems and the like. Also,
Although the embodiments of the present invention have been described using specific values, this is for the sake of easy understanding. For example, when the deposition amount of the gate electrode is increased, the amount of the silicon oxide film sidewall is also increased proportionally. Needless to say, it is sufficient if the parasitic capacitance between the gate and the source and between the gate and the drain is sufficiently reduced. The material used for the side wall is not limited to silicon oxide as long as it is an insulator having a relative dielectric constant smaller than that of each semiconductor used.

[Effects of the Invention] As described above, according to the present invention, in a field effect transistor in which a two-dimensional electron gas layer is used as a channel and its control is performed by a gate electrode embedded in a semiconductor layer, By providing sidewalls made of an insulator having a small relative dielectric constant on the side surface on the source side and the side surface on the drain side, it is possible to reduce the capacitance between the gate and the source and the parasitic capacitance between the gate and the drain. Therefore, it is possible to provide a semiconductor device in which the high frequency characteristics or the high speed switching characteristics of the field effect transistor are improved.

[Brief description of drawings]

FIG. 1 is a vertical sectional view showing an embodiment of the present invention, FIGS. 2 (a) to (d) are explanatory views of a manufacturing process of the embodiment of the present invention, and FIG. 3 is a vertical sectional view of a conventional example. Is. 1,21,31 …… Semi-insulating GaAs substrate 2,4,32,34 …… Impurity-free GaAs semiconductor layer 3,33 …… Impurity-doped AlGaAs semiconductor layer 5,23,35 …… Gate electrode 6,36 ...... Source electrode, 7,37 …… Source region 8,38 …… Drain electrode, 9,39 …… Drain region 10,40 …… Two-dimensional electron gas layer 11,25 …… SiO ₂ side wall, 24 …… Silicon Oxide film

Claims (2)

(57) [Claims] 1. One or two or more two-dimensional electron gas layers formed along a hetero interface between semiconductor layers having different electron affinities on the side of a semiconductor layer having a large electron affinity between different semiconductor layers. And a alloy electrode for extracting a current flowing through the two-dimensional electron gas layer, and one or more gate electrodes embedded in the semiconductor layer, the source side of the gate electrode A semiconductor device comprising a side surface and a side surface on the drain side which are formed of an insulating material having a relative dielectric constant smaller than that of the semiconductor layer. 2. The semiconductor device according to claim 1, wherein the insulator whose relative dielectric constant is smaller than that of the semiconductor layer is silicon dioxide.