JP2540229B2 - Compound semiconductor light emitting device - Google Patents

Compound semiconductor light emitting device

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Publication number
JP2540229B2
JP2540229B2 JP17057490A JP17057490A JP2540229B2 JP 2540229 B2 JP2540229 B2 JP 2540229B2 JP 17057490 A JP17057490 A JP 17057490A JP 17057490 A JP17057490 A JP 17057490A JP 2540229 B2 JP2540229 B2 JP 2540229B2
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JP
Japan
Prior art keywords
layer
light emitting
zns
znsse
emitting device
Prior art date
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JP17057490A
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Japanese (ja)
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JPH0457371A (en
Inventor
好隆 友村
雅彦 北川
健司 中西
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Sharp Corp
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Sharp Corp
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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)

Description

【発明の詳細な説明】 (イ)産業上の利用分野 この発明は化合物半導体発光素子に関し、特にZnSe、
ZnSSeを発光層に用いた高輝度青色、紫外発光素子の構
造に関する。
The present invention relates to a compound semiconductor light emitting device, and particularly to ZnSe,
The present invention relates to a structure of a high brightness blue and ultraviolet light emitting device using ZnSSe as a light emitting layer.

(ロ)従来の技術 II−VI族化合物半導体ZnSeは室温で2.7eVの禁制帯幅
を持つ直接遷移型の半導体であり、このZnSeを用いた青
色発光ダイオード、レーザーをはじめとする高輝度短波
長発光素子の研究開発が進められている。また、ZnSSe
は、ZnSeとZnS(禁制帯幅:3.7eV)の混晶であり、ZnSの
組成比の増大とともに禁制帯幅が大きくなり、青色から
紫外までのより短波長の発光を得ることができる。
(B) Prior art II-VI group compound semiconductor ZnSe is a direct transition type semiconductor with a forbidden band width of 2.7 eV at room temperature. It has high brightness and short wavelength including blue light emitting diode and laser using this ZnSe. Research and development of light emitting devices are underway. Also, ZnSSe
Is a mixed crystal of ZnSe and ZnS (forbidden band width: 3.7 eV), and the forbidden band width increases as the composition ratio of ZnS increases, and emission of shorter wavelengths from blue to ultraviolet can be obtained.

これらの材料を用いた短波長発光素子の従来例を第8
図に示す。この素子は、いわゆるpn接合型ZnSe青色発光
素子であって、同図において71はSi添加n型GaAs短結晶
基板、72はGa添加n型ZnSe発光層、73は0添加p型ZnSe
発光層、74は正電極、75負電極である。2層のエピタキ
シャルZnSe層からなる発光層72、73はGaAs基板71上に直
接MBE法でヘテロエピタキシャル成長させたものであ
る。電極はp型ZnSe発光層73上にAuを蒸着して正電極74
が形成されており、GaAs基板71裏面にInを用いた負電極
75が形成されている。このように作製されたpn接合型Zn
Se青色発光素子は液体窒素温度(77K)の低温において4
40nmにピーク波長を有する青色発光が得られている。し
かしながら、室温においては発光をほとんど示さないこ
とが知られている(Japan.J.Appl.Phys.21(1989)L200
1.K.Akimoto et.al.)。
A conventional example of a short-wavelength light emitting device using these materials
Shown in the figure. This device is a so-called pn junction type ZnSe blue light emitting device. In the figure, 71 is a Si-doped n-type GaAs short crystal substrate, 72 is a Ga-doped n-type ZnSe light emitting layer, and 73 is a 0-doped p-type ZnSe.
The light emitting layer, 74 is a positive electrode, and 75 is a negative electrode. The light emitting layers 72 and 73 made of two epitaxial ZnSe layers are heteroepitaxially grown directly on the GaAs substrate 71 by the MBE method. The electrode is a positive electrode 74 formed by depositing Au on the p-type ZnSe light emitting layer 73.
Is formed, and the negative electrode using In is formed on the back surface of the GaAs substrate 71.
75 are formed. The pn junction type Zn fabricated in this way
Se blue light emitting element is 4 at low temperature of liquid nitrogen (77K).
Blue emission having a peak wavelength at 40 nm is obtained. However, it is known that it shows almost no luminescence at room temperature (Japan.J.Appl.Phys.21 (1989) L200.
1.K.Akimoto et.al.).

(ハ)発明が解決しようとする課題 上述のように従来のZnSe青年発光素子では室温におい
て充分な発光輝度を得ることができない。これはZnSe発
光層がGaAs基板上にヘテロエピタキシャル成長されてい
るため発光層に適した十分な品質を備えていないことに
よる。すなわち、GaAs基板上にZnSeをヘテロエピタキシ
ャル成長させる場合、GaAsとZnSeとの格子不整合あるい
は熱膨張係数の不整合による格子欠陥の発生、さらには
GaAs基板からZnSeエピタキシャル層へのGa、Asの熱拡散
等により高品質、高純度のZnse層を得ることは極めて困
難であるという問題点があった。さらにまた、GaAsはそ
の禁制帯幅が約1.4eVと小さく、およそ880nm以下の波長
の光を吸収してしまう。このため、GaAsを基板に用いた
場合、発光層より生じた青色発光を素子外部に効率良く
取り出せないという問題点があった。
(C) Problems to be Solved by the Invention As described above, the conventional ZnSe adolescent light-emitting device cannot obtain sufficient emission brightness at room temperature. This is because the ZnSe light emitting layer is not epitaxially grown on a GaAs substrate and does not have sufficient quality suitable for the light emitting layer. That is, when ZnSe is heteroepitaxially grown on a GaAs substrate, lattice defects are generated due to lattice mismatch between GaAs and ZnSe or mismatch of thermal expansion coefficient.
There has been a problem that it is extremely difficult to obtain a Znse layer of high quality and high purity due to thermal diffusion of Ga and As from the GaAs substrate to the ZnSe epitaxial layer. Furthermore, GaAs has a small forbidden band width of about 1.4 eV and absorbs light having a wavelength of about 880 nm or less. Therefore, when GaAs is used as the substrate, there is a problem that the blue light emitted from the light emitting layer cannot be efficiently extracted to the outside of the device.

(ニ)課題を解決するための手段 本発明は係る点に鑑みてなされたものであって、単結
晶基板上に半導体エピタキシャル層からなる発光素子層
が積層され、前記発光素子層に電圧を印加するための少
なくとも1対の電極が設置された化合物半導体発光素子
であって、前記単結晶基板がZnSあるいはZnSSeであり、
前記発光素子層中に設けられた発光層がZnZeからなり、
前記発光層と前記単結晶基板との間に発光層を構成する
ZnSeと格子整合する組成を有するCdZnS導電層が設けら
れていることを特徴とする化合物半導体発光素子であ
る。
(D) Means for Solving the Problems The present invention has been made in view of the above point, in which a light emitting element layer including a semiconductor epitaxial layer is stacked on a single crystal substrate, and a voltage is applied to the light emitting element layer. A compound semiconductor light-emitting device having at least one pair of electrodes for performing the operation, wherein the single crystal substrate is ZnS or ZnSSe,
The light emitting layer provided in the light emitting element layer is made of ZnZe,
A light emitting layer is formed between the light emitting layer and the single crystal substrate.
A compound semiconductor light emitting device, characterized in that a CdZnS conductive layer having a composition lattice-matched with ZnSe is provided.

あるいはまた、単結晶基板上に半導体エピタキシャル
層からなる発光素子層が積層され、前記発光素子層に電
圧を印加するための少なくとも1対の電極が設置された
化合物半導体発光素子であって、前記単結晶基板がZnS
あるいはZnSSeであり、前記発光素子層中に設けられた
発光層がZnSSeからなり、前記発光層と前記単結晶基板
との間に発光層を構成するZnSSeとの格子整合する組成
を有するCdZnS導電層が設けられていることを特徴とす
る化合物半導体発光素子である。
Alternatively, it is a compound semiconductor light emitting device in which a light emitting device layer made of a semiconductor epitaxial layer is laminated on a single crystal substrate, and at least one pair of electrodes for applying a voltage to the light emitting device layer is provided. Crystal substrate is ZnS
Or ZnSSe, the light-emitting layer provided in the light-emitting element layer is made of ZnSSe, CdZnS conductive layer having a composition lattice-matched with ZnSSe constituting the light-emitting layer between the light-emitting layer and the single crystal substrate The compound semiconductor light emitting device is characterized by being provided with.

さらにまた、前記ZnSeあるいはZnSSeを発光層とする
化合物半導体発光素子において、CdZnS導電層とZnSある
いはZnSSe単結晶基板との間にCdS−ZnS歪超格子層ある
いはZnS−ZnSe歪超格子層、または、前記CdZnS導電層
と、基板を構成するZnSあるいはZnSSeとの中間の格子定
数を持つ組成比を有するCdZnS層あるはZnSSe層を設けた
ことを特徴とする化合物半導体発光素子である。
Furthermore, in the compound semiconductor light emitting device having the ZnSe or ZnSSe as the light emitting layer, a CdS-ZnS strained superlattice layer or a ZnS-ZnSe strained superlattice layer between the CdZnS conductive layer and the ZnS or ZnSSe single crystal substrate, or, A compound semiconductor light emitting device is characterized in that a CdZnS layer or a ZnSSe layer having a composition ratio having an intermediate lattice constant between the CdZnS conductive layer and ZnS or ZnSSe forming the substrate is provided.

より具体的には、この発明においては単結晶基板から
化合物半導体発光層までのすべての半導体による構成部
分がII−VI族化合物半導体によって形成されることを特
徴とする。なおかつ発光層意外の半導体部分が、発光に
対して高い光透過率を持つように発光層よりも大きな禁
制帯幅を持つII−VI族化合物半導体によって構成される
ことを特徴とする。
More specifically, the present invention is characterized in that all semiconductor components from the single crystal substrate to the compound semiconductor light emitting layer are formed of II-VI group compound semiconductors. Further, the semiconductor portion other than the light emitting layer is characterized by being composed of a II-VI group compound semiconductor having a forbidden band width larger than that of the light emitting layer so as to have a high light transmittance for light emission.

この発明における単結晶基板としては発光層と同じII
−VI族化合物半導体であって、かつ発光層よりも禁制帯
幅が大きく、青色発光に対して高い光透過率を持つZnS
あるいはZnSSeの単結晶基板を用いる。このZnS,ZnSSe単
結晶としてはハロゲン化学輸送法、昇華法、高圧熔融法
等により成長させたバルク単結晶を用いることができ、
この中でも特にヨウ素を輸送媒体としたハロゲン輸送法
により成長させたZnSあるいはZnSSeバルク単結晶は、低
転移密度(エッチピット密度104cm-2以下)でエピタキ
シャル成長用基板として優れ、かつ青色発行に対して90
%以上(ZnSの場合)の高い光透過率を有し好適であ
る。なおZnSSeを基板として用いる場合、そのS組成を1
00〜30原子%とすることが好ましい。S組成をこれより
低濃度とした場合青色発行に対する光透過率の低下が生
じる。
The single crystal substrate in this invention is the same as the light emitting layer II
ZnS, which is a group VI compound semiconductor, has a wider band gap than the light emitting layer, and has a high light transmittance for blue light emission.
Alternatively, a ZnSSe single crystal substrate is used. As this ZnS, ZnSSe single crystal, a halogen chemical transport method, a sublimation method, a bulk single crystal grown by a high-pressure melting method or the like can be used,
Of these, ZnS or ZnSSe bulk single crystals grown by the halogen transport method using iodine as a transport medium are particularly excellent as a substrate for epitaxial growth with a low dislocation density (etch pit density of 10 4 cm -2 or less), and for blue emission. 90
It is preferable because it has a high light transmittance of at least 100% (in the case of ZnS). When ZnSSe is used as the substrate, its S composition should be 1
It is preferably from 00 to 30 atom%. When the S composition has a lower concentration than this, the light transmittance for blue emission is lowered.

次にZnSeあるいはZnSSe発行層とZnSあるいはZnSSe単
結晶基板との間に設けられたCdZnS導電層は発行層を構
成するZnSeあるいはZnSSeと同じ格子定数を有すること
を特徴とする。CdZnSは、CdSとZnSとの混晶半導体であ
って、その格子定数、禁制帯幅はその組成に応じてCdS
の5.83Å、2.42eVからZnSの5.42Å、3.68eVの間で変化
する。この特性をZnSeとZnSの混晶半導体であるZnSSeの
場合と比較すると、格子定数が同じ場合にはZnSSeより
も大きな禁制帯幅を有するという特徴を持つ。その禁制
帯幅の差はZnSeとZnSeに格子整合するCdZnS(Zn組成61
原子%)とについて見れば約0.19eVとなる。従って、発
光層(ZnSあるいはZnSSe)と同じ格子定数を有するCdZn
Sを導電層に用いれば、格子不整合による格子欠陥を誘
発することなく発光に対する高い透過率を持たせること
が可能となる。さらに加えて、発光層(ZnSeあるいはZn
SSe)と導電層(CdZnS)との禁制帯幅の差により発光層
と導電層との接合部において、主に価電子帯にエネルギ
ー障壁が形成されることが知られており、n型発光層中
へのキャリア(電子)閉じ込め効果により発光効率を増
大させることが可能となる。
Next, the CdZnS conductive layer provided between the ZnSe or ZnSSe issuing layer and the ZnS or ZnSSe single crystal substrate is characterized by having the same lattice constant as ZnSe or ZnSSe forming the issuing layer. CdZnS is a mixed crystal semiconductor of CdS and ZnS, and its lattice constant and band gap depend on its composition.
It changes between 5.83Å and 2.42eV of ZnS and 5.42Å and 3.68eV of ZnS. Comparing this property with the case of ZnSSe which is a mixed crystal semiconductor of ZnSe and ZnS, it has a feature that it has a larger forbidden band width than ZnSSe when the lattice constant is the same. The difference in the forbidden band width is the difference between ZnSe and CdZnS (Zn composition 61
Atomic%) is about 0.19eV. Therefore, CdZn having the same lattice constant as the light emitting layer (ZnS or ZnSSe)
If S is used for the conductive layer, it becomes possible to have high transmittance for light emission without inducing lattice defects due to lattice mismatch. In addition, the light emitting layer (ZnSe or Zn
It is known that an energy barrier is formed mainly in the valence band at the junction between the light emitting layer and the conductive layer due to the difference in the forbidden band width between the SSe) and the conductive layer (CdZnS). The effect of confining carriers (electrons) in the interior makes it possible to increase the luminous efficiency.

この導電層としては低抵抗のn型CdZnS層を用い、そ
の抵抗率は素子抵抗を低く抑えるために10-2〜10-1Ω・
cm程度、膜厚は1〜10μm程度とすることが好ましい。
A low resistance n-type CdZnS layer is used as this conductive layer, and its resistivity is 10 -2 to 10 -1 Ω to keep the element resistance low.
The thickness is preferably about cm and the film thickness is about 1 to 10 μm.

さらに発光層と基板との間の格子不整合を緩和する手
段として前記のCdZnS導電層と基板との間にCdS−ZnS歪
超格子層あるいはZnSe−ZnS歪超格子層を挿入すること
ができる。各超格子の膜厚としては20〜100Åであり、
その繰り返し周期としては5〜100周期とすることが好
ましい。さらにまた同様の手段として前記のCdZnS導電
層と基板との間にCdZnS導電層と基板を構成するZnSある
いはZnSeとの中間の格子定数を有するCdZnS層あるいはZ
nSSe層を挿入することができる。このようにCdZnS導電
層と基板との間に歪超格子層あるいは混晶層を挿入する
ことにより基板と導電層(発光層)との間の格子不整合
が緩和され、かつ格子緩和による転移の伝播を抑えるこ
とができ、高品質のZnSeあるいはZnSSe発光層を得るこ
とができる。
Furthermore, a CdS-ZnS strained superlattice layer or a ZnSe-ZnS strained superlattice layer can be inserted between the CdZnS conductive layer and the substrate as a means for relaxing the lattice mismatch between the light emitting layer and the substrate. The film thickness of each superlattice is 20-100Å,
The repetition cycle is preferably 5 to 100 cycles. Furthermore, as a similar means, between the CdZnS conductive layer and the substrate, a CdZnS conductive layer and a CdZnS layer or Z having a lattice constant intermediate between ZnS and ZnSe forming the substrate are formed.
An nSSe layer can be inserted. By inserting the strained superlattice layer or mixed crystal layer between the CdZnS conductive layer and the substrate in this way, the lattice mismatch between the substrate and the conductive layer (light emitting layer) is relaxed, and the transition due to the lattice relaxation occurs. Propagation can be suppressed, and a high-quality ZnSe or ZnSSe light emitting layer can be obtained.

(ホ)作用 上述のように本発明によれば、単結晶基板から化合物
半導体発光層までのすべての半導体による構成部分がII
−VI族化合物半導体によって形成され、なおかつ発光層
以外の半導体部分が、発光に対して高い光透過率を持つ
ように発光層よりも大きな禁制帯幅を持つII−VI族化合
物半導体によって構成されることによって、高純度、高
品質のZnSeあるいはZnSSe発光層を得ることができ、さ
らにまた発光を素子外部に効率良く取り出すことがで
き、高輝度のZnSe、ZnSSe青色、紫外発光素子を作製す
ることが可能となった。
(E) Action As described above, according to the present invention, all semiconductor components from the single crystal substrate to the compound semiconductor light emitting layer are II
Formed of a II-VI compound semiconductor, and the semiconductor portion other than the light-emitting layer is composed of a II-VI compound semiconductor having a larger forbidden band width than that of the light-emitting layer so as to have high light transmittance for light emission. By doing so, it is possible to obtain a high-purity, high-quality ZnSe or ZnSSe light-emitting layer, and it is also possible to efficiently extract light emission to the outside of the device, and to manufacture a high-brightness ZnSe, ZnSSe blue, ultraviolet light-emitting device. It has become possible.

(ヘ)実施例 次に本発明を実施例に基づいて説明する。(F) Examples Next, the present invention will be described based on Examples.

実施例1 第1図に本発明の第1の実施例であるZnSepn接合型青
色発光素子の断面模式図を示す。同図において1はZnS
単結晶基板、2はCdS−ZnS歪超格子層、3は低抵抗n型
CdZnS導電層、4はn型ZnSe発光層、5はp型ZnSe発光
層、6はp型ZnSe導電層、7は正電極、8は負電極、9,
10はリード線である。
Example 1 FIG. 1 shows a schematic cross-sectional view of a ZnSepn junction type blue light emitting device which is a first example of the present invention. In the figure, 1 is ZnS
Single crystal substrate, 2 CdS-ZnS strained superlattice layer, 3 low resistance n-type
CdZnS conductive layer, 4 n-type ZnSe light emitting layer, 5 p-type ZnSe light emitting layer, 6 p-type ZnSe conductive layer, 7 positive electrode, 8 negative electrode, 9,
10 is a lead wire.

ZnS基板1としては、例えばヨウ素輸送法で作成した
バルク単結晶より切り出し研磨した(100)あるいは(1
10)ZnS単結晶基板ウエハーを用いた。このZnS単結晶基
板1上にCdS−ZnS歪超格子層2、低抵抗n型CdZnS導電
層3ならびにpn接合型のZnSe発光層4ならびに5、p型
ZnSe導電層6を順次MBE法により成長させた。MBE成長に
際し、原料分子線源としてはCd,Zn,S,Seの単体を用い、
基板温度は300℃に設定した。基板温度の設定条件とし
ては高品質のエピタキシャル層を1μm/h程度の適当な
成長速度で成長させるためには200〜300℃の範囲が好ま
しい。CdS−ZnS歪超格子層2はZnS基板1とCdZnS導電層
3との間の格子不整合を緩和させるために挿入されたも
のであって、各超格子層の膜厚は、その平均組成が導電
層3を構成するCdZnSとほぼ等しくなるようにCdS層を40
Å、ZnS層を60Åとした。また、その繰り返し周期数は5
0周期とした。CdS層ならびにZnS層の成長時の分子線強
度としては、CdならびにZnの分子線強度をいずれも1×
10-6Torrとし、Sの分子線強度は5×10-6Torrと一定に
保った。低抵抗n型CdZnS導電層3はZnSe発光層と格子
整合させるためにZn組成を61原子%に設定した。CdとZn
の組成比はCdおよびZnの分子線強度比により制御し、そ
れぞれ3.9×10-7Torr、6.1×10-7Torrに設定した。S分
子線強度は5×10-6Torrとした。導電層として適した低
抵抗のn型CdZnS層を得るために不純物としてはAlを添
加した。Alの分子線強度を1×10-9Torrとすることで、
Al濃度2×1019cm-3の低抵抗n型CdZnS膜(キャリア濃
度1×1019cm-3、抵抗率10-2Ω・cm)を得ることができ
た。膜厚は2μmとした。
As the ZnS substrate 1, for example, a bulk single crystal prepared by an iodine transport method is cut out and polished (100) or (1
10) A ZnS single crystal substrate wafer was used. On this ZnS single crystal substrate 1, a CdS-ZnS strained superlattice layer 2, a low resistance n-type CdZnS conductive layer 3 and a pn junction type ZnSe light emitting layer 4 and 5, a p-type
The ZnSe conductive layer 6 was sequentially grown by the MBE method. When MBE is grown, Cd, Zn, S, and Se are used as raw material molecular beam sources.
The substrate temperature was set to 300 ° C. The substrate temperature is preferably set in the range of 200 to 300 ° C. in order to grow a high quality epitaxial layer at an appropriate growth rate of about 1 μm / h. The CdS-ZnS strained superlattice layer 2 is inserted in order to relax the lattice mismatch between the ZnS substrate 1 and the CdZnS conductive layer 3, and the film thickness of each superlattice layer has an average composition. The CdS layer is made to be almost equal to CdZnS forming the conductive layer 3.
Å, ZnS layer was set to 60 Å. The number of repetition cycles is 5
It was set to 0 cycle. The molecular beam intensity during growth of the CdS layer and ZnS layer is 1 × the molecular beam intensity of Cd and Zn.
And 10 -6 Torr, molecular beam intensity of S was kept constant at 5 × 10 -6 Torr. The Zn composition of the low resistance n-type CdZnS conductive layer 3 was set to 61 atomic% in order to lattice-match with the ZnSe light emitting layer. Cd and Zn
The composition ratio of was controlled by the molecular beam intensity ratio of Cd and Zn, and was set to 3.9 × 10 −7 Torr and 6.1 × 10 −7 Torr, respectively. The S molecular beam intensity was 5 × 10 −6 Torr. Al was added as an impurity in order to obtain a low resistance n-type CdZnS layer suitable as a conductive layer. By setting the molecular beam intensity of Al to 1 × 10 -9 Torr,
A low resistance n-type CdZnS film having an Al concentration of 2 × 10 19 cm −3 (carrier concentration of 1 × 10 19 cm −3 , resistivity of 10 −2 Ω · cm) could be obtained. The film thickness was 2 μm.

ZnSeからなる3層のエピタキシャル層が導電層3上に
n型ZnSe発光層4、p型ZnSe発光層5、p型ZnSe導電層
6として順次積層されている。これら3はZn分子線強度
1×10-6Torr、Se分子線強度1×10-6Torrで成長させ、
n型ZnSe発光層4へのn型不純物としてはCdZnS導電層
3と同じAlを用い、その添加濃度は5×1017cm-3とし
た。成長時のAl分子線強度は5×10-11Torrとした。膜
厚は1μmである。p型ZnSe発光層5へはp型不純物と
してLiを1×1019cm-3添加した。成長時のLi分子線強度
は2×10-9Torrとした。膜厚は0.2μmである。p型ZnS
e導電層6はLi濃度を5×1019cm-3とし(Li分子線強度
は1×10-8Torrとした)、膜厚は0.5μmとした。これ
らのエピタキシャル層4,5,6を形成した後、p型ZnSe導
電層6上にAuを蒸着し、N2ガス中で200℃、数秒〜数分
の熱処理を行いオーミック性の正電極7とし、p型ZnSe
導電層6の正電極7の形成部分をフォトレジスト等でマ
スクし、CF4を用いた反応性イオンエッチング(RIE)に
よりエピタキシャル層4,5,6の一部並びにn型CdZnS導電
層3の一部表面をエッチングして低抵抗n型CdZnS導電
層3を露出させ、その表面にIn,Alを順次蒸着してオー
ミック性の負電極8とした。フォトレジストを除去後、
リード線8,9を接続してpn接続型Znse青色発光素子を作
製した。
Three epitaxial layers made of ZnSe are sequentially laminated on the conductive layer 3 as an n-type ZnSe light emitting layer 4, a p-type ZnSe light emitting layer 5, and a p-type ZnSe conductive layer 6. These 3 were grown with a Zn molecular beam intensity of 1 × 10 −6 Torr and a Se molecular beam intensity of 1 × 10 −6 Torr,
The same Al as that of the CdZnS conductive layer 3 was used as the n-type impurity for the n-type ZnSe light emitting layer 4, and the addition concentration thereof was 5 × 10 17 cm −3 . The Al molecular beam intensity during growth was set to 5 × 10 -11 Torr. The film thickness is 1 μm. To the p-type ZnSe light emitting layer 5, 1 × 10 19 cm −3 of Li was added as a p-type impurity. The Li molecular beam intensity during growth was set to 2 × 10 -9 Torr. The film thickness is 0.2 μm. p-type ZnS
The conductive layer 6 had a Li concentration of 5 × 10 19 cm −3 (Li molecular beam intensity was 1 × 10 −8 Torr) and a film thickness of 0.5 μm. After forming these epitaxial layers 4, 5 and 6, Au is vapor-deposited on the p-type ZnSe conductive layer 6 and heat treated in N 2 gas at 200 ° C. for several seconds to several minutes to form an ohmic positive electrode 7. , P-type ZnSe
A portion of the conductive layer 6 where the positive electrode 7 is formed is masked with a photoresist or the like, and a part of the epitaxial layers 4, 5 and 6 and one of the n-type CdZnS conductive layers 3 are formed by reactive ion etching (RIE) using CF 4. The surface of the portion was etched to expose the low resistance n-type CdZnS conductive layer 3, and In and Al were sequentially deposited on the surface to form an ohmic negative electrode 8. After removing the photoresist,
The lead wires 8 and 9 were connected to each other to fabricate a pn connection type Znse blue light emitting device.

このようにして作製したZnSe青色発光素子は、電流電
圧特性において、立ち上がり電圧1.5Vの良好な整流特性
を示し、駆動電圧2V、駆動電流10mAで、室温においてピ
ーク波長460nm、半値幅25nm、発光輝度20mcdの高輝度青
色発光を得ることができた。
The ZnSe blue light-emitting device produced in this manner exhibits good rectification characteristics with a rising voltage of 1.5 V in current-voltage characteristics, a driving voltage of 2 V and a driving current of 10 mA, and a peak wavelength of 460 nm, a half-value width of 25 nm, and an emission luminance at room temperature. It was possible to obtain a high brightness blue light emission of 20 mcd.

実施例2 第2図に本発明の第2の実施例であるZnSSepn接合型
青色発光素子の断面模式図を示す。同図において1はZn
S単結晶基板、12はCdS−ZnS歪超格子層、13は低抵抗n
型CdZnS導電層、14はn型ZnSSe発光層、15はp型ZnSSe
発光層、16はp型ZnSSe導電層、7は正電極、8は負電
極、9,10はリード線である。このZnSSepn接合型青色発
光素子において、基板1は実施例1と同様のZnS単結晶
基板であって、このZnS基板1上の5層からなるエピタ
キシャル層12,13,14,15,16の基本的な構造は実施例1と
同様であるが、発光層がZnSSeで構成されており、それ
に応じてCdS−ZnS歪超格子層12のCdS層とZnS層との層厚
比、ならびに低抵抗n型CdZn導電層14の組成が変えられ
ている。発光層をZnSSeで構成することにより、発光波
長をZnSeを用いた場合より短波長とすることができ、本
実施例においては、そのS組成を200原子%とした。各
エピタキシャル層は実施例1と同様にMBE法により成膜
した。
Example 2 FIG. 2 shows a schematic sectional view of a ZnS Sepn junction type blue light emitting device which is a second example of the present invention. In the figure, 1 is Zn
S single crystal substrate, 12 CdS-ZnS strained superlattice layer, 13 low resistance n
Type CdZnS conductive layer, 14 n-type ZnSSe light emitting layer, 15 p-type ZnSSe
A light emitting layer, 16 is a p-type ZnSSe conductive layer, 7 is a positive electrode, 8 is a negative electrode, and 9 and 10 are lead wires. In this ZnS Sepn junction type blue light emitting device, the substrate 1 is a ZnS single crystal substrate similar to that of Example 1, and the basic epitaxial layers 12, 13, 14, 15, 16 of the five layers on the ZnS substrate 1 are the same. The structure is the same as in Example 1, but the light emitting layer is composed of ZnSSe, and accordingly, the layer thickness ratio between the CdS layer and the ZnS layer of the CdS-ZnS strained superlattice layer 12 and the low resistance n-type The composition of the CdZn conductive layer 14 is changed. By forming the light emitting layer of ZnSSe, the emission wavelength can be made shorter than that of the case of using ZnSe. In this example, the S composition was 200 atomic%. Each epitaxial layer was formed by the MBE method as in Example 1.

ZnSSe発光層14,15とZnS基板1との間に設けられた低
抵抗n型CdZnS導電層13のAl濃度、膜厚は実施例1と同
じであるが、ZnSSe発光層との格子整合をとるため、そ
のS組成を49原子%とした。上記のZn組成を得るために
CdおよびZnの分子線強度をそれぞれ5.1×10-7Torr、4.9
×10-7Torrとした。
The Al concentration and film thickness of the low resistance n-type CdZnS conductive layer 13 provided between the ZnSSe light emitting layers 14 and 15 and the ZnS substrate 1 are the same as those in Example 1, but lattice matching with the ZnSSe light emitting layer is taken. Therefore, its S composition is set to 49 atom%. To obtain the above Zn composition
The molecular beam intensities of Cd and Zn are 5.1 × 10 -7 Torr and 4.9, respectively.
It was set to × 10 -7 Torr.

CdS−ZnS歪超格子層12についてもその平均的な格子定
数がZnSSe発光層14,15ならびにCdZnS導電層13と同程度
となるように層厚をCdS層では40Å、ZnS層では40Åとし
た。超格子の繰り返し周期は60周期とした。n型発光層
14、p型発光層15、p型同電層16の成長に際しては、Z
n、S、Seの各分子線強度をそれぞれ1×10-6Torr、2
×10-6Torr、1×10-6TorrとすることによりS組成比20
原子%のZnSSeエピタキシャル層を得た。n型ZnSSe発光
層14はAlを5×1017cm-3添加し、膜厚は1μmとした。
p型ZnSSe発光層15ならびにp型ZnSSe導電層16にはLiを
それぞれ1×1019cm-3、5×1019cm-3添加し、膜厚はそ
れぞれ0.2μm、0.5μmとした。各エピタキシャル層を
形成した後、実施例1と同様にして電極形成、リード線
接続を行いZnSSeのpn接合型発光素子を作製した。
The thickness of the CdS-ZnS strained superlattice layer 12 was set to 40 Å for the CdS layer and 40 Å for the ZnS layer so that the average lattice constant of the CdS-ZnS strained superlattice layer 12 was about the same as that of the ZnSSe light emitting layers 14 and 15 and the CdZnS conductive layer 13. The repetition period of the superlattice was 60 periods. n-type light emitting layer
When growing 14, the p-type light emitting layer 15, and the p-type same electric layer 16, Z
The molecular beam intensities of n, S, and Se are 1 × 10 −6 Torr and 2 respectively.
× S composition ratio 20 With 10 -6 Torr, 1 × 10 -6 Torr
An atomic% ZnSSe epitaxial layer was obtained. For the n-type ZnSSe light emitting layer 14, 5 × 10 17 cm −3 of Al was added and the film thickness was set to 1 μm.
Li was added to the p-type ZnSSe light emitting layer 15 and the p-type ZnSSe conductive layer 16 at 1 × 10 19 cm −3 and 5 × 10 19 cm −3 , respectively, and the film thickness was 0.2 μm and 0.5 μm, respectively. After forming each epitaxial layer, electrodes were formed and lead wires were connected in the same manner as in Example 1 to fabricate a ZnSSe pn junction type light emitting device.

このようにして作製したZnSSe発光素子は、電流電圧
特性で1.7Vの立ち上がり電圧を示し、室温において駆動
電圧2.2V、駆動電流12mAで発光ピーク波長430nm、半値
幅30nm、発光輝度20mcdの高輝度の青紫色発光を得るこ
とができた。
The ZnSSe light-emitting device produced in this manner exhibits a 1.7 V rising voltage in terms of current-voltage characteristics, a driving voltage of 2.2 V at room temperature, a driving current of 12 mA, an emission peak wavelength of 430 nm, a half-value width of 30 nm, and a high luminance of 20 mcd. It was possible to obtain blue-violet emission.

実施例3 第3図に本発明の第3の実施例のZnSepn接合型青色発
光素子の断面模式図を示す。同図において、1はZnS単
結晶基板、22はZnS−ZnSe歪超格子層、3は低抵抗n型C
dZnS導電層、4はn型ZnSe発光層、5はp型ZnSe発光
層、6はp型ZnSe導電層、7は正電極、8は負電極、9,
10はリード線である。
Example 3 FIG. 3 shows a schematic sectional view of a ZnSepn junction type blue light emitting device according to a third example of the present invention. In the figure, 1 is a ZnS single crystal substrate, 22 is a ZnS-ZnSe strained superlattice layer, and 3 is a low resistance n-type C
dZnS conductive layer, 4 n-type ZnSe light emitting layer, 5 p-type ZnSe light emitting layer, 6 p-type ZnSe conductive layer, 7 positive electrode, 8 negative electrode, 9,
10 is a lead wire.

本実施例においてZnS−ZnSe歪超格子層22を除く部分
はすべて実施例1のZnSepn接合型青色発光素子と同様の
構成、製法によるものであって、ZnS基板1とCdZnS導電
層3あるいはZnSe発光層4,5との間の格子不整合の緩和
層としてCdS−ZnS歪超格子層のかわりにZnS−ZnSe歪超
格子層22を用いている。
In this embodiment, all parts except the ZnS-ZnSe strained superlattice layer 22 have the same configuration and manufacturing method as the ZnSepn junction type blue light emitting device of the first embodiment, and the ZnS substrate 1 and the CdZnS conductive layer 3 or the ZnSe light emission. Instead of the CdS-ZnS strained superlattice layer, a ZnS-ZnSe strained superlattice layer 22 is used as a layer for relaxing lattice mismatch between the layers 4 and 5.

歪超格子層22の層厚構成としては、ZnS−ZnSe歪超格
子層22の平均格子定数がZnS基板1の格子定数とCdZnS導
電層3の格子定数との中間の値となるようにZnS層では3
0Å、ZnSe層では30Åとし、繰り返し周期数は格子緩和
が十分になされるように50周期とした。
The layer thickness configuration of the strained superlattice layer 22 is such that the average lattice constant of the ZnS-ZnSe strained superlattice layer 22 is an intermediate value between the lattice constant of the ZnS substrate 1 and the lattice constant of the CdZnS conductive layer 3. Then 3
0 Å, 30 Å for ZnSe layer, and the number of repetition cycles was 50 so that lattice relaxation could be sufficiently performed.

本実施例のZnSepn接合型青色発光素子においても実施
例1と同様の素子特性を有し、高輝度の青色発光を得る
ことができた。
The ZnSepn junction type blue light emitting device of this example also had the same device characteristics as in Example 1 and was able to obtain blue light emission with high brightness.

実施例4 本発明の第4の実施例であるZnSepn接合型青色発光素
子の断面模式図を第4図に示す。
Example 4 FIG. 4 shows a schematic sectional view of a ZnSepn junction type blue light emitting device which is a fourth example of the present invention.

同図において、1はZnS単結晶基板、32はZnSSe格子緩
和層、3は低抵抗n型CdZnS導電層、4はn型ZnSe発光
層、5はp型ZnSe発光層、6はp型ZnSe導電層、7は正
電極、8は負電極、9,10はリード線である。
In the figure, 1 is a ZnS single crystal substrate, 32 is a ZnSSe lattice relaxation layer, 3 is a low resistance n-type CdZnS conductive layer, 4 is an n-type ZnSe light emitting layer, 5 is a p-type ZnSe light emitting layer, and 6 is a p-type ZnSe conductive layer. Layers, 7 is a positive electrode, 8 is a negative electrode, and 9 and 10 are lead wires.

本実施例においては、ZnS−ZnSe歪超格子層22を除く
部分はすべて実施例1のZnSepn接合型青色発光素子と同
様の構成、製法によるものであって、ZnS基板1とCdZnS
導電層3あるいはZnSe発光層4,5との間の格子不整合の
緩和層としてCdS−ZnS歪超格子層のかわりにZnSSe格子
緩和層32を用いている。この格子緩和層32を構成するZn
SSeとしてはZnS基板1とCdZnS導電層3との中間の格子
定数を持つ組成とすることが好ましく、本実施例におい
てはそのS組成を50原子%とした。S組成50原子%のZn
SSe層を得るために、MBE成長時にZn分子線強度を1×10
-6Torrとし、SおよびSeの分子線強度をそれぞれ5×10
-6Torr、1×10-6Torrに設定した。膜厚は3μmとし
た。
In this embodiment, all parts except the ZnS-ZnSe strained superlattice layer 22 have the same configuration and manufacturing method as the ZnSepn junction type blue light emitting device of the first embodiment, and the ZnS substrate 1 and the CdZnS substrate.
A ZnSSe lattice relaxation layer 32 is used instead of the CdS-ZnS strained superlattice layer as a relaxation layer for lattice mismatch with the conductive layer 3 or the ZnSe light emitting layers 4 and 5. Zn forming the lattice relaxation layer 32
It is preferable that the SSe has a composition having a lattice constant intermediate between that of the ZnS substrate 1 and the CdZnS conductive layer 3. In this embodiment, the S composition thereof is 50 atom%. Zn with S composition of 50 atom%
To obtain the SSe layer, the Zn molecular beam intensity was set to 1 × 10 during MBE growth.
-6 Torr, S and Se molecular beam intensities of 5 × 10
-6 Torr and 1 x 10 -6 Torr were set. The film thickness was 3 μm.

このようにして作製したZnSepn接合型青色発光素子
は、実施例1と同様の素子特性を示し、高輝度の青色光
を得ることができた。
The ZnSepn junction type blue light emitting device produced in this manner exhibited the same device characteristics as in Example 1 and was able to obtain blue light of high brightness.

実施例5 本発明の第5の実施例のZnSepn接合型青色発光素子の
断面模式図を第5図に示す。
Example 5 FIG. 5 shows a schematic sectional view of a ZnSepn junction type blue light emitting device of a fifth example of the present invention.

同図において、1はZnS単結晶基板、42はCdZnS格子緩
和層、3は低抵抗n型CdZnS導電層、4はn型ZnSe発光
層、5はp型ZnSe発光層、6はp型ZnSe導電層、7は正
電極、8は負電極、9,10はリード線である。
In the figure, 1 is a ZnS single crystal substrate, 42 is a CdZnS lattice relaxation layer, 3 is a low resistance n-type CdZnS conductive layer, 4 is an n-type ZnSe light emitting layer, 5 is a p-type ZnSe light emitting layer, and 6 is a p-type ZnSe conductive layer. Layers, 7 is a positive electrode, 8 is a negative electrode, and 9 and 10 are lead wires.

本実施例において、CdZnS格子緩和層42を除く部分は
すべて実施例1のZnSepn接合型青色発光素子と同様の構
成、製法によるものであって、ZnS基板1とCdZnS導電層
3あるいはZnSe発光層4,5との間の格子不整合の緩和層
としてCdS−ZnS歪超格子層のかわりにCdZnS格子緩和層4
2を用いている。この格子緩和層42を構成するCdZnS層と
してはZnS基板1とCdZnS導電層3との間の格子定数を有
することが好ましく、本実施例においてはCdZnS格子緩
和層42のZn組成を30原子%に設定した。CdZnS格子緩和
層42の膜厚は1μmとした。格子緩和層42として用いた
Zn組成30原子%のCdZnS層は、発光層を構成するZnSeよ
りも禁制帯幅が狭く、青色発光を吸収するため膜厚を1
μm以下とすることが好ましい。
In this embodiment, all parts except the CdZnS lattice relaxation layer 42 have the same structure and manufacturing method as the ZnSepn junction type blue light emitting device of the first embodiment, and the ZnS substrate 1 and the CdZnS conductive layer 3 or the ZnSe light emitting layer 4 are used. CdS-ZnS strained superlattice layer instead of CdZ-ZnS strained superlattice layer
2 is used. The CdZnS layer forming the lattice relaxation layer 42 preferably has a lattice constant between the ZnS substrate 1 and the CdZnS conductive layer 3. In the present embodiment, the Zn composition of the CdZnS lattice relaxation layer 42 is set to 30 atomic%. Set. The thickness of the CdZnS lattice relaxation layer 42 was 1 μm. Used as the lattice relaxation layer 42
The CdZnS layer with a Zn composition of 30 atomic% has a narrower bandgap than ZnSe forming the light emitting layer and has a thickness of 1 for absorbing blue light emission.
It is preferable that the thickness is less than μm.

このようにして作製したznSepn接合型青色発光素子
は、実施例1と同様の良好な整流特性を示した。発光輝
度に関しては、CdZnS格子緩和層42での吸収のための発
光取り出し効率が低下するが、室温において駆動電圧2
V、駆動電流10mAにおいて20mcdの青色発光を得ることが
できた。
The znSepn junction type blue light emitting device produced in this manner showed the same good rectification characteristics as in Example 1. Regarding the emission brightness, the emission extraction efficiency due to absorption in the CdZnS lattice relaxation layer 42 decreases, but at room temperature the drive voltage 2
It was possible to obtain a blue light emission of 20 mcd at V and a driving current of 10 mA.

実施例6 第6図に本発明の第6の実施例のZnSepn接合型青色発
光素子の断面模式図を第5図に示す。同図において51は
ZnSSe単結晶基板、2はCdS−ZnS歪超格子層、3は低抵
抗n型CdZnS導電層、4はn型ZnSe発光層、5はp型ZnS
e発光層、6はp型ZnSe導電層、7は正電極、8は負電
極、9,10はリード線である。
Example 6 FIG. 6 shows a schematic sectional view of a ZnSepn junction type blue light emitting device according to a sixth example of the present invention in FIG. In the figure, 51 is
ZnSSe single crystal substrate, 2 CdS-ZnS strained superlattice layer, 3 low resistance n-type CdZnS conductive layer, 4 n-type ZnSe light emitting layer, 5 p-type ZnS
e is a light emitting layer, 6 is a p-type ZnSe conductive layer, 7 is a positive electrode, 8 is a negative electrode, and 9 and 10 are lead wires.

本実施例においてZnSSe単結晶基板51を除く他の部分
は実施例1のZnSepn接合型青色発光素子と同様の構成、
製法によるものである。単結晶基板51としては、ヨウ素
輸送法で作成したS組成50原子%のZnSSe単結晶基板を
用いている。ヨウ素輸送法で作成したZnSSeバルク単結
晶はS組成100〜30原子%の範囲で青色発光に対して高
い光透過率(約90%)を有し、ZnSe青色発光素子用の単
結晶基板として用いることができる。さらにまた、ZnS
単結晶基板を用いた場合と比較してCdZnS導電層3ある
いはZnSe発光層4,5との格子不整合を低くすることが可
能となり好適である。
In the present embodiment, the other parts except the ZnSSe single crystal substrate 51 have the same structure as the ZnSepn junction type blue light emitting device of the first embodiment,
It depends on the manufacturing method. As the single crystal substrate 51, a ZnSSe single crystal substrate having an S composition of 50 atomic% prepared by the iodine transport method is used. ZnSSe bulk single crystal prepared by iodine transport method has a high light transmittance (about 90%) for blue light emission in the S composition range of 100 to 30 atomic%, and is used as a single crystal substrate for a ZnSe blue light emitting device. be able to. Furthermore, ZnS
It is preferable because the lattice mismatch with the CdZnS conductive layer 3 or the ZnSe light emitting layers 4 and 5 can be reduced as compared with the case of using a single crystal substrate.

本実施例においても実施例1のZnSe青色発光素子と同
様に高輝度の青色発光を得ることができた。
Also in this example, it was possible to obtain blue light emission with high brightness as in the ZnSe blue light emitting device of Example 1.

実施例7 第7図に本発明の第7の実施例のZnSepn接合型青色発
光素子の断面模式図を示す。同図において、61は低抵抗
n型ZnS単結晶基板、62はn型低抵抗CdS−ZnS歪超格子
層、3は低抵抗n型CdZnS導電層、4はn型ZnSe発光
層、5はp型ZnSe発光層、6はp型ZnSe導電層、67は正
電極、68は負電極、9,10はリード線である。本実施例に
おいて単結晶基板61としては、例えばヨウ素輸送法で作
成したZnSバルク単結晶をAlを10重量%添加した熔融Zn
中で1000℃、10〜100時間の熱処理を行い低抵抗化した
抵抗率10Ω・cmのn型ZnS単結晶から切り出し、研磨し
た低抵抗n型ZnS基板ウエハーを用いた。このn型ZnS基
板61上のn型CdS−ZnS歪超格子層62を除く4層のエピタ
キシャル層3,4,5,6は実施例1と同様にして作成した。
n型CdS−ZnS歪超格子層62は層厚、繰り返し周期数は実
施例1の場合と同様に設定したが、素子電流がこの歪超
格子層中を流れる構造であるためAlをn型不純物として
5×1018cm-3添加することにより抵抗率5×10-2Ω・cm
の低抵抗n型導電層とした。正電極67はp型ZnSe導電層
6の上にAuを蒸着して作成し、負電極68はn型ZnS単結
晶基板の裏面にInを用いて形成した。
Example 7 FIG. 7 shows a schematic sectional view of a ZnSepn junction type blue light emitting device according to a seventh example of the present invention. In the figure, 61 is a low resistance n-type ZnS single crystal substrate, 62 is an n-type low resistance CdS-ZnS strained superlattice layer, 3 is a low resistance n-type CdZnS conductive layer, 4 is an n-type ZnSe light emitting layer, and 5 is p. Type ZnSe light emitting layer, 6 is a p-type ZnSe conductive layer, 67 is a positive electrode, 68 is a negative electrode, and 9 and 10 are lead wires. In the present embodiment, the single crystal substrate 61 is, for example, a molten Zn obtained by adding 10% by weight of Al to ZnS bulk single crystal prepared by an iodine transport method.
A low-resistivity n-type ZnS substrate wafer was cut out from an n-type ZnS single crystal having a resistivity of 10 Ω · cm and reduced in resistance by heat treatment at 1000 ° C. for 10 to 100 hours. The four epitaxial layers 3, 4, 5 and 6 except the n-type CdS-ZnS strained superlattice layer 62 on the n-type ZnS substrate 61 were formed in the same manner as in Example 1.
The thickness of the n-type CdS-ZnS strained superlattice layer 62 and the number of repetition periods were set in the same manner as in Example 1. However, since the device current has a structure flowing in this strained superlattice layer, Al is used as an n-type impurity. Resistivity of 5 × 10 -2 Ω ・ cm by adding 5 × 10 18 cm -3
Of low resistance n-type conductive layer. The positive electrode 67 was formed by vapor-depositing Au on the p-type ZnSe conductive layer 6, and the negative electrode 68 was formed by using In on the back surface of the n-type ZnS single crystal substrate.

このようにして作製したZnSepn接合型青色発光素子
は、上述の実施例と同様に高輝度の青色発光を得ること
ができた。
The ZnSepn junction type blue light emitting device manufactured in this manner was able to obtain blue light emission with high brightness as in the above-mentioned Examples.

(ト)発明の効果 以上のように本発明によれば、ZnSあるいはZnSSeを発
光層とした高輝度の青色、紫外発光素子を作製すること
が可能となり、フルカラー表示素子をはじめとする各種
表示素子用光源、高密度情報処理用光源、光化学反応処
理用光源等の各種オプトエレクトロニクス用光源として
極めて有望である。
(G) Effects of the Invention As described above, according to the present invention, it is possible to produce a high-intensity blue and ultraviolet light emitting device having ZnS or ZnSSe as a light emitting layer, and various display devices including a full color display device. It is extremely promising as a light source for various optoelectronics, such as a light source for light, a light source for high-density information processing, a light source for photochemical reaction processing, and the like.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の第1の実施例であるZnSepn接合型青色
発光素子を示す断面模式図、第2図は第2の実施例であ
るZnSSepn接合型青紫色発光素子を示す断面模式図、第
3付から第7図はそれぞれ本発明の第3から第7の実施
例であるZnSepn接合型青色発光素子を示す断面模式図、
第8図は従来のZnSepn接合型青色発光素子を示す断面模
式図である。 1……ZnS単結晶基板、 2,12……CdS−ZnS歪超格子層、 3.13……低抵抗n型CdZnS導電層、 4……n型ZnSe発光層、 5……p型ZnSe発光層、 6……p型ZnSe導電層、 7,67,74……正電極、 8,68,75……負電極、 9.10……リード線、 14……n型ZnSSe発光層、 15……p型ZnSSe発光層、 16……p型ZnSSe導電層、 22……ZnS−ZnSe歪超格子層、 32……ZnSSe格子緩和層、 42……CdZnS格子緩和層、 51……ZnSSe単結晶基板、 61……低抵抗n型ZnS単結晶基板、 62……低抵抗n型CdS−ZnS歪超格子層、 71……Si添加n型GaAs単結晶基板、 72……Ga添加n型ZnSe発光層、 73……O添加p型ZnSe発光層。
FIG. 1 is a schematic sectional view showing a ZnSepn junction type blue light emitting device according to a first embodiment of the present invention, and FIG. 2 is a schematic sectional view showing a ZnS Sepn junction type blue-violet light emitting device according to a second embodiment, 3 to 7 are schematic sectional views showing a blue light emitting device of ZnSepn junction type which is a third to a seventh embodiment of the present invention, respectively.
FIG. 8 is a schematic sectional view showing a conventional ZnSepn junction blue light emitting device. 1 ... ZnS single crystal substrate, 2,12 ... CdS-ZnS strained superlattice layer, 3.13 ... Low resistance n-type CdZnS conductive layer, 4 ... n-type ZnSe light emitting layer, 5 ... p-type ZnSe light emitting layer, 6 …… p-type ZnSe conductive layer, 7,67,74 …… positive electrode, 8,68,75 …… negative electrode, 9.10 …… lead wire, 14 …… n-type ZnSSe light-emitting layer, 15 …… p-type ZnSSe Light emitting layer, 16 …… p type ZnSSe conductive layer, 22 …… ZnS-ZnSe strained superlattice layer, 32 …… ZnSSe lattice relaxation layer, 42 …… CdZnS lattice relaxation layer, 51 …… ZnSSe single crystal substrate, 61 …… Low resistance n-type ZnS single crystal substrate, 62 …… Low resistance n-type CdS-ZnS strained superlattice layer, 71 …… Si-added n-type GaAs single crystal substrate, 72 …… Ga-added n-type ZnSe light-emitting layer, 73 …… O-doped p-type ZnSe emission layer.

Claims (6)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】単結晶基板上に半導体エピタキシャル層か
らなる発光素子層が積層され、前記発光素子層に電圧を
印加するための少なくとも1対の電極が設置された化合
物半導体発光素子であって、前記単結晶基板がZnSある
いはZnSSeであり、前記発光素子層中に設けられた発光
層がZnSeからなり、前記発光層と前記単結晶基板との間
に発光層を構成するZnSeと格子整合する組成を有するCd
ZnS導電層が設けられていることを特徴とする化合物半
導体発光素子。
1. A compound semiconductor light emitting device comprising a light emitting device layer made of a semiconductor epitaxial layer laminated on a single crystal substrate, and at least one pair of electrodes for applying a voltage to the light emitting device layer. The single crystal substrate is ZnS or ZnSSe, the light emitting layer provided in the light emitting element layer is made of ZnSe, the composition lattice-matched with ZnSe constituting the light emitting layer between the light emitting layer and the single crystal substrate. With Cd
A compound semiconductor light emitting device having a ZnS conductive layer.
【請求項2】単結晶基板上に半導体エピタキシャル層か
らなる発光素子層が積層され、前記発光素子層に電圧を
印加するための少なくとも1対の電極が設置された化合
物半導体発光素子であって、前記単結晶基板がZnSある
いはZnSSeであり、前記発光素子層中に設けられた発光
層がZnSSeからなり、前記発光層と前記単結晶基板との
間に発光層を構成するZnSSeと格子整合する組成を有す
るSdZnS導電層が設けられていることを特徴とする化合
物半導体発光素子。
2. A compound semiconductor light emitting device comprising: a light emitting device layer made of a semiconductor epitaxial layer laminated on a single crystal substrate; and at least one pair of electrodes for applying a voltage to the light emitting device layer. The single crystal substrate is ZnS or ZnSSe, the light emitting layer provided in the light emitting element layer is made of ZnSSe, a composition lattice-matched with ZnSSe forming a light emitting layer between the light emitting layer and the single crystal substrate. A compound semiconductor light emitting device, characterized in that an SdZnS conductive layer having is provided.
【請求項3】前記CdZnS導電層とZnSあるいはZnSSe単結
晶基板との間にCdS−ZnC歪格子層を設けてなる請求項1
および2に記載の化合物半導体発光素子。
3. A CdS-ZnC strained lattice layer is provided between the CdZnS conductive layer and a ZnS or ZnSSe single crystal substrate.
And the compound semiconductor light emitting device according to 2.
【請求項4】前記CdZnS導電層とZnSあるいはZnSSe単結
晶基板との間にZnS−ZnSe歪超格子を設けてなる請求項
1および2記載の化合物半導体発光素子。
4. The compound semiconductor light emitting device according to claim 1, wherein a ZnS—ZnSe strained superlattice is provided between the CdZnS conductive layer and the ZnS or ZnSSe single crystal substrate.
【請求項5】前記CdZnS導電層とZnSあるいはZnSSe単結
晶基板との間に、前記導電層を形成するCdZnS層の格子
定数と、前記基板を構成するZnSあるいはZnSSeの格子定
数との実質的に中間の格子定数を持つ組成を有するCdZn
S層を設けてなる請求項1および2記載の化合物半導体
発光素子。
5. The lattice constant of the CdZnS layer forming the conductive layer and the lattice constant of ZnS or ZnSSe forming the substrate are substantially between the CdZnS conductive layer and the ZnS or ZnSSe single crystal substrate. CdZn with a composition having an intermediate lattice constant
The compound semiconductor light emitting device according to claim 1 or 2, wherein an S layer is provided.
【請求項6】前記CdZnS導電層とZnSあるいはZnSSe単結
晶基板との間に、前記導電層を形成するCdZnS層の格子
定数と、前記基板を構成するZnSあるいはZnSSeの格子定
数との中間の格子定数を持つ組成比を有するZnSSe層を
設けてなる請求項1および2記載の化合物半導体発光素
子。
6. A lattice intermediate between the lattice constant of the CdZnS layer forming the conductive layer and the lattice constant of ZnS or ZnSSe forming the substrate between the CdZnS conductive layer and the ZnS or ZnSSe single crystal substrate. 3. The compound semiconductor light emitting device according to claim 1, further comprising a ZnSSe layer having a composition ratio having a constant.
JP17057490A 1990-06-27 1990-06-27 Compound semiconductor light emitting device Expired - Fee Related JP2540229B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17057490A JP2540229B2 (en) 1990-06-27 1990-06-27 Compound semiconductor light emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17057490A JP2540229B2 (en) 1990-06-27 1990-06-27 Compound semiconductor light emitting device

Publications (2)

Publication Number Publication Date
JPH0457371A JPH0457371A (en) 1992-02-25
JP2540229B2 true JP2540229B2 (en) 1996-10-02

Family

ID=15907363

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17057490A Expired - Fee Related JP2540229B2 (en) 1990-06-27 1990-06-27 Compound semiconductor light emitting device

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Country Link
JP (1) JP2540229B2 (en)

Also Published As

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