JP2532417B2 - Ringing reduction device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for reducing ringing of a television signal in a television receiver.

2. Description of the Related Art When transmitting a wideband video signal such as a high-definition television signal, a method of band-compressing the video signal has been studied. One of them is the so-called MUSE (Multiple Subny
quist Sampling Encading) method has been proposed. For details of the content, see, for example, Yuichi Ninomiya. "High-definition television satellite 1-channel transmission system (MUSE)", IEICE technical report, IE84-72, 1984.

An outline of this transmission method is shown in FIG. On the transmitting side, the video signal obtained by a high-quality camera, VTR, etc. 41 is converted into an A / D converter 42.
Is converted into a digital signal by the sub-sampling circuit 43, sub-sampling processing is performed, the signal is passed through the transmission matching filter 44, and the analog signal is re-converted by the D / A converter 45.
The M modulator 46 FM-modulates and transmits.

On the receiving side, this signal is received, demodulated by the FM demodulator 47, converted into a digital signal by the A / D converter 48, and subsampled by the subsampling circuit 49. Further, the two-dimensional interpolation circuit 410 performs interpolation processing, the D / A converter 411 converts it into an analog signal, and displays it on the high-quality display 412.

Here, in order to synchronize with the receiver side and the transmitter side, a horizontal synchronizing signal 51 is added to the video signal on the transmitter side as shown in FIG. On the receiving side, the level of the horizontal sync signal after A / D conversion (level at point b + level at point c) -2 × a point is calculated. If this result is zero, the phase of the sampling clock is correct. , If the phase is negative, the phase is delayed, and if the phase is positive, it is determined that the phase is advanced, and the phases are controlled to match.

However, even if the phases of the sampling clocks are matched in this way, the sampling position of the video signal may still be displaced and ringing may occur.

The reason is that overshoot and undershoot occur in the horizontal sync signal, point a cannot be detected correctly due to distortion of the transmission line, and the phase characteristics of the transmission line are not perfectly straight, so the video signal and the horizontal synchronization signal In some cases, the relative position of may change and the video signal may not be sampled at the correct position.

In this way, if the sampling position of the video signal shifts, the signal that is A / D converted at the receiving side will be different from the signal that is subsampled at the transmitting side, and the waveform will have ringing distortion, and ringing will also appear in the image. Occurs.

This causes frequency ringing when the input signal is A / D converted on the receiving side when the signal is D / A converted on the transmitting side, which is determined by the transmission bandwidth of the transmission line. ,
If the sampling phases on the sending and receiving sides are the same, the original waveform can be reproduced regardless of ringing because the center of the ringing waveform is sampled, while the subsampling phase on the receiving side is as described above. This is because if it is deviated, ringing distortion is generated as shown in FIG. 6c.

Next, FIG. 7 shows a basic configuration of a conventional sampling clock phase control circuit. The signal input to the input terminal 71 is demodulated by the FM demodulator 72, the low pass filter 73 limits the band, and the A / D converter 74 converts the signal into a digital signal. The phase detection circuit 75 outputs the result of the above calculation as the phase error of the synchronization signal, and the adder 76 adds the phase error of the previous synchronization signal and the addition data 710 to output the phase error of the video signal. Next, this is integrated by the integrator 47 to absorb a sudden change.

A voltage controlled oscillator (VCO) 78 generates a sampling clock for the A / D converter 74, and the output of the integrator 77 controls the phase of the sampling clock.

75 is an output terminal. The addition data 710 is data for adjusting the phase of the sampling clock of the A / D converter 74 and can be changed by a switch. FIG. 8 shows the frame pulse waveform and HD waveform of the MUSE signal, and FIG. 7 shows the clock reproduction system diagram. The HD waveform is inverted every 1H and either rises or falls at sample number 6, and this level is 128/256. Therefore, using this point as a reference, the sum of sample numbers 8 and 4 which are separated by 2 CK each before and after is taken, and this value is multiplied by 1/2 to obtain the difference from the value of sample number 6. This value is the phase error that is fixed once every 1H. This will be described below with reference to FIG. 7. This value is input to a flip-flop using HD as a clock, D / A converted via a loop filter, and then given to the VCO as an integrated value of the phase error. The clock signal that is the output of the VCO is returned as the clock of the flip-flop of the phase comparator. The MUSE decoder reproduces the clock signal by the PLL having such a configuration.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention However, in the above-mentioned configuration, when the input video signal is switched or the characteristics of the transmission path are changed, the receiving side should be minimized each time. The subsampling phase had to be adjusted manually.

INDUSTRIAL APPLICABILITY The present invention can automatically control the sampling clock phase of the A / D converter on the receiving side to obtain an image with less ringing even when the input video signal is switched or the transmission line characteristic is changed. A ringing reduction circuit is provided.

Means for Solving the Problems In order to solve the above problems, the present invention relates to a frame pulse detection circuit for detecting two points of a transient portion of a rectangular wave added in a frame or field period, and a pulse of the pulse. A comparison signal generating circuit that generates a normal level and a ringing detection circuit that outputs the data that corrects the phase of the VCO (sampling clock) by taking the difference between these two signals and automatically reduces the ringing Is.

Effect The present invention has the above-described configuration to correct the phase of the VCO by detecting the ringing of the frame pulse even if the input signal is changed to change the ringing state, without manually adjusting the image with less ringing. You can get it automatically.

Embodiment Hereinafter, a ringing reducing circuit according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a ringing reduction circuit according to an embodiment of the present invention. Here, 11 is a video input terminal, 12 is an FM demodulator, 13 is a low-pass filter, and 14 is
A / D converter, 15 is a phase detection circuit, 16 is an adder / subtractor, 17 is an integrator, 18 is a VCO, and 19 is an output terminal to a signal processing circuit such as two-dimensional interpolation. Is similar to. The present invention further provides a frame pulse detection circuit.
110, a ringing detection circuit 111, and a comparison signal generation circuit 112 are provided.

The operation of the ring reducing circuit configured as described above will be described below with reference to FIGS. 1 and 2. First, FIG. 2A is a waveform diagram of the frame pulse line, which is inserted in the video signal for one horizontal period in one frame. Here, 21 is a frame pulse, and a rectangular wave with a 16-MHz 4-clock width is 100%.
Repeated 117.5 pairs at the level.

This frame pulse waveform originally samples each sampling point a, b, c ... H in Fig. 3a, but it has ringing distortion as described above, and the sampling point of the frame pulse is as shown in Fig. 3c. Sample points a, b, c ... H are sampled. Therefore, the frame pulse detection circuit 11
For 0, each sample point is detected at least twice in order to improve the accuracy, and the average level of each sample point is output. Next, the comparison signal generating circuit 112 outputs the sampling points a, b, c ... Of the frame pulse without the original ringing distortion as shown in FIG.
Outputs the normal level of h.

Here, the normal level is a fixed value level defined by the transmission standard. (Low level (a, b, g, h) points in Fig. 3 are
16/255 (8-bit quantization) Hi level (c, d, e, f) points are 239/255
It is a fixed digital value. The ringing detection circuit 111 subtracts the output of the frame pulse detection circuit 110 from the output of the comparison signal generation circuit 112 to generate a third signal.
The ringing at each sampling point is detected as shown in FIG.
If the ringing at the point c is negative and the ringing at the point g is positive, the phase of the sampling clock is delayed, so data for correcting this is output. Similarly, if the ringing at the point c is positive and the ringing at the point g is negative, the phase of the sampling clock is advanced and data for correcting this is output. If the points c and f are combinations other than the above, the correction data is set to zero. The correction data output from this ringing detection circuit 111 is added to the phase error data output from the phase detection circuit 15, and this is integrated in the same manner as in the past, and the voltage controlled oscillator (VCO) 18.7, that is, the A / D converter 14 is added. The phase of the sampling clock of is controlled to obtain an image with less ringing.

As described above, according to the present embodiment, the frame pulse detection circuit 110, the comparison signal generation circuit 112, the ringing detection circuit
By providing 111, the input signal can be switched,
Even if the transmission path characteristics change, the sampling clock phase of the A / D converter is automatically controlled, and an image with little ringing can be obtained at all times.

EFFECTS OF THE INVENTION As described above, according to the present invention, a frame (field) pulse detection circuit for detecting at least two points of a transient portion of a rectangular wave added in a frame or field period, and a normal level of the pulse are detected. By providing the generated comparison signal generation circuit and ringing detection circuit,
Even if the input signal is switched or the transmission path characteristics change, there is no need to manually adjust while watching the playback screen, and the sampling clock of the A / D converter can always be automatically controlled to a point with less ringing. Therefore, the ringing of the reproduced image can be actively reduced.

[Brief description of drawings]

FIG. 1 is a block diagram of a ringing reduction device according to an embodiment of the present invention, FIG. 2 is a waveform diagram of a frame pulse used, FIG. 3 is a waveform diagram for explaining the operation of the device, and FIG. FIG. 5 is a block diagram showing a transmission configuration of a quality television system, FIG. 5 is a waveform diagram of the horizontal synchronizing signal thereof,
FIG. 6 is a waveform diagram showing the relationship between the ringing and sampling, FIG. 7 is a block diagram showing the configuration of the conventional example, and FIG. 8 is a diagram showing the frame pulse waveform and the HD waveform of the MUSE signal. 11 …… Input terminal, 12 …… FM demodulator. 13 …… Low-pass filter, 14 …… A / D converter, 15 …… Phase detection circuit, 16 ……
Adder / subtractor, 17 …… integrator, 18 …… VCO (voltage controlled oscillator), 19 …… output terminal, 110 …… frame pulse detection circuit, 111 …… ringing detection circuit, 112 …… comparison signal generation circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tetsuo Kuchiki 1006 Kadoma, Kadoma-shi, Matsushita Electric Industrial Co., Ltd. (72) Inventor Eiichi Hira, 1006 Kadoma, Kadoma-shi, Matsushita Electric Industrial Co., Ltd. (72) Invention Yuichi Ninomiya, 1-10-11 Kinuta, Setagaya-ku, Tokyo, Japan Broadcasting Technology Laboratory (72) Inventor Yoshimichi Otsuka 1-10-11 Kineta, Setagaya-ku, Tokyo, Japan Broadcasting Corporation Broadcasting Technology Laboratory (72) Inventor Ikki ▲ Yoshinori 1-10-11 Kinuta, Setagaya-ku, Tokyo Japan Broadcasting Corporation Broadcasting Technology Laboratory

Claims (1)

(57) [Claims] 1. An analog to which a television signal is input.
A digital converter, a means for detecting a phase error of a sampling clock of the analog-digital converter by a horizontal synchronizing signal added to the input signal, a rectangular wave having a frame or field period added to the input signal, etc. Means for detecting at least two points of an excessive portion of the pulse and generating a normal level which is a fixed value of the pulse, and means for comparing the detected rectangular wave with the normal level and outputting phase correction data, A ringing reduction device comprising means for adding and integrating a phase error and the phase correction data and adding the value to a voltage controlled oscillator to control the phase of a sampling clock.