JP2532258B2 - Error detection method - Google Patents

Description

The present invention relates to a method for detecting an error position when decoding a Reed-Solomon code.

[Outline of Invention]

In the first aspect of the present invention, the data for calculating the error position is stored in the ROM in advance, and the MSB of the data is used for continuous error detection. In the second aspect of the present invention, only about half of the coefficients for calculating the error position are
Stored in ROM.

[Background technology]

FIG. 3 schematically shows the structure of the code word. For example, four check words P, Q, R, and S are added to the four words A, B, C, and D. For Reed-Solomon codes, the test words P, Q, R, S are defined as the solution of the following simultaneous equations.

FIG. 2 is a block diagram of a conventional correction circuit for correcting such a data error. Data reproduced from a recording medium or the like is input to the generation circuit 1. The generation circuit 1 generates four syndromes S ₀ , S ₁ , S ₂ and S ₃ from the input data. Arithmetic circuit 2 Galois field the 2 ⁿ original exists GF (2 ⁿ⁾
In, a calculation is performed modulo a predetermined polynomial to calculate error positions α ⁱ and α ^j and their magnitudes e ⁱ and e ^j . The ROM 3 stores in advance the data necessary for performing this calculation.
The correction circuit 4 corrects a data error according to the calculation result of the calculation circuit 2.

For example, the error positions α ⁱ and α ^j of the two words are obtained as follows.

 First, the following error locator polynomial is defined.

(X + α ⁱ ) (X + α ^j ) = X ² + (α ⁱ + α ^j ) X + α ⁱ α ^j = X ² + σ ₁ X + σ ₀ (2) Coefficients σ ₁ and σ _{0 in the} equation (2) are syndromes S _{0 to} S _{0 to.} It is calculated from S _{3 as} follows.

σ ₀ = α ⁱ α ^j = (S ₂ ² + S ₁ S ₃ ) / (S ₁ ² + S ₀ S ₂ ) ...
(3) σ ₁ = α ⁱ + α ^j = (S ₀ S ₃ + S ₁ S ₂ ) / (S ₁ ² + S ₀ S ₂ ) ...
(4) It is possible to calculate α ⁱ and α ^j by solving the simultaneous equations of the formulas (3) and (4), but it is troublesome because there are two solutions. Therefore, the equation (2) is multiplied by σ ₀ ⁻¹ and the variables are converted by X = σ ₀ ^1/2 Y (5) to obtain the following equation.

σ ₀ ^-1 X ² + σ ₁ σ ₀ ^-1 X + 1 = Y ² + σ ₁ σ ₀ ^−1/2 Y + 1 = Y ² + (α ⁱ + α ^j ) (α ⁱ α ^j ) ^−1/2 Y + 1 = Y ² + {(Α ^ij ) ^1/2 + (α ^ij ) ^−1/2 } Y + 1 = {Y + (α ^ij ) ^1/2 } {Y + (α ^ij ) ^−1/2 } = (Y + Y ₀ ) (Y + Y ₁ ) (6) From the formula (6), Y ₀ = (α ^ij ) ^1/2 (7) Y ₁ = Y ₀ ^-1 (8) Therefore, the data of Y ₀ (or its index) (or Y ₁ (or its index)) satisfying the following equation for each coefficient σ ₀ , σ ₁ is stored in the ROM 3 in advance.

Y ₀ ² + σ ₁ σ ₀ ^−1/2 Y ₀ + 1 = 0 (9) At this time, since there is only one variable (Y ₀ only), a table (coefficients σ ₀ and σ ₁ and constant Y to be stored in ROM 3 is stored. The relationship of ₀ ) can be obtained relatively easily.

Then, the coefficient σ ₀ (σ calculated from equations (3) and (4)
^−1/2 ), σ ₁ as an argument and corresponding Y ₀ data in ROM3
Read more. The following equation is obtained from the equation (5).

α ⁱ = σ ₀ ^1/2 Y ₀ (10) Therefore, the first error position α ⁱ can be obtained by multiplying the data read by the ROM 3 by σ ₀ ^1/2 .

If the first error position α ⁱ is obtained, the second error position α ^j can be obtained by the following equation equivalent to the equation (4).

α ^j = σ ₁ + α ⁱ (11) [Problems to be solved by the invention] Conventionally, the position α ⁱ is first obtained from the data thus stored in the ROM 3, and then the position α ^j is obtained. Was there.
Therefore, two data are consecutively wrong (i = j +
In order to detect whether or not 1), it is necessary to further detect that Y ₀ is a predetermined value by a comparator or the like, which has a drawback that the configuration becomes complicated.

For example, when one word of data is composed of 8 bits, the ROM 3 also needs a word length of 8 bits, and must have a capacity of 256 pieces of data. Therefore, there is a drawback that not only the capacity of the ROM 3 increases but also the scale of the arithmetic circuit 2 increases.

Therefore, the present invention makes it possible to easily detect two consecutive errors and reduce the circuit scale.

Error detection method of the present invention Measure -1 for solving the problems], in the 2 ⁿ Galois field source it is present GF (2 ⁿ⁾ performs an operation modulo a predetermined polynomial, two words In an error detection method for detecting continuous errors, a syndrome of 4 words is generated from a data string of 1 bit of n bits, and (X + α ⁱ ) (X + α ^j ) = X ² + δ ₁ X + δ ₀ where δ ₀ = Α ⁱ α ^j = (S ₂ ² + S ₁ S ₃ ) / (S ₁ ² + S ₀ S ₂ ) δ ₁ = α ⁱ + α ^j = (S ₀ S ₃ + S ₁ S ₂ ) / (S ₁ ² + S ₀₎ The two coefficients δ ₀ and δ ₁ of the error locator polynomial represented by S ₂ ) are calculated, and the variables of the error locator polynomial are converted δ ₀ ⁻¹ X ² + δ ₁ δ ₀ ⁻¹ X + 1 = (Y + Y ₀ ). (Y + Y ₁₎ constant Y ₀ transformation polynomial represented by only a smaller one of Y ₁ when the pre-stored in the ROM as a n-1 bits of data together If an error occurs continuously in two words,
The larger _one of the constants Y ₀ and Y ₁ is stored in advance in the ROM as data with MSB = 1 or 0, and the stored data is read from the ROM using the coefficients δ ₀ and δ ₁ as an argument to calculate the error position. At the same time, the MSB of the data read from the ROM
It is characterized by detecting more consecutive errors.

[Operation-1] A 4-word syndrome is generated from a data string in which 1 word is n bits (for example, 8 bits), and the coefficients calculate σ ₀ and σ _{1 of the} error locator polynomial. Constants Y ₀ (or Y ₁ ) from ROM using these coefficients σ ₀ and σ ₁ as arguments
Is read out. The smaller one of constants Y ₀ and Y ₁ is stored in ROM
27 kinds of data are substantially stored in 7 bits (all of these MSBs are 0 (or 1)). Constants Y ₀ and Y ₁ when two words have consecutive errors
The larger one is 8-bit data (the MSB is 1
(Or 0)) is stored in the ROM. The MSB of the data read from the ROM is 0 when the errors are not continuous and is 1 when the errors are continuous, so that it can be determined from this whether or not the errors are continuous.

Therefore, continuous errors can be detected without providing a special circuit such as a comparator.

Error detection method of the present invention Measure -2 for solving the problem] is the Galois field the 2 ⁿ original exists GF (2 ⁿ⁾ performs an operation modulo a predetermined polynomial, detects an error In the error detection method, a syndrome of 4 words is generated from a data string in which 1 word is n bits, and from the syndrome, (X + α ⁱ ) (X + α ^j ) = X ² + δ ₁ X + δ ₀ where δ ₀ = α ⁱ α ^j = (S ₂ ² + S ₁ S ₃ ) / (S ₁ ² + S ₀ S ₂ ) δ ₁ = α ⁱ + α ^j = (S ₀ S ₃ + S ₁ S ₂ ) / (S ₁ ² + S ₀ S ₂ ) The two coefficients δ ₀ and δ ₁ of the error locator polynomial are calculated, and the variables of the error locator polynomial are converted to δ ₀ ⁻¹ X ² + δ ₁ δ ₀ ⁻¹ X + 1 = (Y + Y ₀ ) (Y + Y ₁ ). only smaller of the constants Y _0, Y ₁ transformation polynomial represented stored in advance in the ROM, the engagement number [delta] _0, is stored in the ROM of the [delta] ₁ as an argument Read out the constant number, to obtain a better corresponding to the mis-Ri solution alpha ⁱ position ^polynomial, alpha memories of the ROM of the ^j indicating error position by multiplying the coefficient of the number of the constant,
It is characterized in that the other solution is calculated from the obtained solution and the coefficient.

[Operation-2] A 4-word syndrome is generated from a data string in which 1 word is n bits (for example, 8 bits), and the coefficients σ ₀ and σ _{1 of the} error locator polynomial are calculated from the syndrome. Constants Y ₀ (or Y ₁ ) from ROM using these coefficients σ ₀ and σ ₁ as arguments
Is read out. The smaller one of constants Y ₀ and Y ₁ is stored in ROM
27 kinds of data are substantially stored in 7 bits. RO
The data read from M is multiplied by the 1/2 power of the coefficient σ ₀ to calculate one of the solutions α ⁱ and α ^j of the error locator polynomial. Α ⁱ when the stored data in ROM is Y ₀ , α when Y ₁
^j is obtained. The other solution is calculated from the coefficient σ ₁ and one solution.

Therefore, the capacity of the ROM is small, and the circuit for calculation can be easily configured.

〔Example〕

FIG. 1 is a block diagram of an error correction circuit of the present invention,
The parts corresponding to those in FIG. 2 are designated by the same reference numerals.

In the present invention, the smaller one of Y ₀ and Y ₁ (or its exponent) is stored in the ROM 3 as data when two consecutive data are not erroneous. So, for example, in the case of GF (2 ⁸ ), the solution of Y ₀ or Y ₁ is an index from 1 to
It becomes 127 of 127. As a result, the MSB is substantially unnecessary (0), and these data can be 7 bits. Therefore, the capacity of ROM3 may be small.

On the other hand, if an error occurs continuously in two words, i = j + 1 (12). At this time, Y ₀ is ^calculated from the formula (7) as follows: Y ₀ = (α ^ij ) ^1/2 = α ^1/2 = (α ²⁵⁶ ) ^1/2 = α ¹²⁸
(13) Further, Y ₁ is ^calculated from the equation (8) as follows: Y ₁ = Y ₀ ^-1 = α ^-128 = 1 / α ¹²⁸ = α ²⁵⁵ / α ¹²⁸ = α ¹²⁷
(14)

In this case, the larger α ¹²⁸ (Y ₀ ) is stored in the ROM 3 instead of the smaller α ¹²⁷ (Y ₁ ). Therefore, only this data has an MSB of 1 and has 8 bits. As a result, by monitoring the MSB, it is detected whether or not an error has occurred in two words consecutively.

When Y ₀ is stored in the ROM 3, the first error position α ⁱ is calculated from the equation (10) and the second error position α ^j is calculated from the equation (11) as in the case described above. To be done.

On the other hand, if Y ₁ is stored in ROM3, the formula (1
As in the case of 0), the following equation is established, so α ^j = σ ₀ ^1/2 Y ₁ (13) From this equation, the second error position α ^j is first calculated. Then, the first error position can be obtained from the following equation equivalent to equation (4).

α ⁱ = σ ₁ + α ^j (14) That is, in the conventional case, the first error position α ⁱ was always found first, and then the second position α ^j was found, but in the case of the present invention, ROM3 It is unknown whether α ⁱ or α ^j was obtained by multiplying the output of σ by σ ^1/2 . However, alpha ⁱ and alpha ^j is a computational equivalent, either alpha ^i, alpha
It can also be ^j . Therefore, no matter which one is obtained first, no operational problem occurs.

If the inspection word is 4 words, 2 words (double)
Error correction is possible. When the error of 2 words is not continuous, the error of 3 words or more may have been erroneously detected. On the other hand, if two word errors are consecutive, there is a possibility of erroneous detection, but it is empirically that such an error has a high probability of being caused by a defect (dropout) of a recording medium or the like. Has become clear. Therefore, when the correction is repeated a plurality of times, the erroneous correction can be reduced by first correcting the consecutive errors. Therefore, the correction circuit 4 monitors the MSB of the output of the ROM 3 and makes a correction corresponding to the result.

〔effect〕

As described above, according to the present invention, the data corresponding to the continuous error is stored in the ROM so as to be substantially larger than the data corresponding to the non-continuous error by one bit. Can also be detected
The capacity of ROM, arithmetic circuit, etc. can be reduced and the configuration can be simplified.

[Brief description of drawings]

FIG. 1 is a block diagram of an error correction circuit according to the present invention, FIG. 2 is a block diagram of a conventional error correction circuit, and FIG. 3 is an explanatory diagram of code words. 1 ... Generation circuit 2 ... Arithmetic circuit 3 ... ROM 4 ... Correction circuit

Claims (2)

(57) [Claims] 1. A performs the Galois field 2 ⁿ number of elements are present GF (2 ⁿ⁾ arithmetic modulo a predetermined polynomial, the error detection method for detecting a continuous error of two words, one word is n A 4-word syndrome is generated from the bit data string, and from the syndrome, (X + α ⁱ ) (X + α ^j ) = X ² + δ ₁ X + δ ₀ where δ ₀ = α ⁱ α ^j = (S ₂ ² + S ₁ S ₃ ) / (S ₁ ² + S ₀ S ₂ ) δ ₁ = α ⁱ + α ^j = (S ₀ S ₃ + S ₁ S ₂ ) / (S ₁ ² + S ₀ S ₂ ) ₀ and calculates the [delta] _1, said error Ri was converted variable position polynomial _{^{δ 0 -1 X 2 + δ 1}} δ 0 -1 X + 1 = (Y + Y 0) (Y + Y 1) constant Y ₀ transformation polynomial represented by, If only the smaller _one of Y ₁ is stored in the ROM as n-1 bit data in advance and two consecutive words have errors,
The larger _one of the constants Y ₀ and Y ₁ is stored in advance in the ROM as data with MSB = 1 or 0, and the stored data is read from the ROM using the coefficients δ ₀ and δ ₁ as an argument to calculate the error position. At the same time, the MSB of the data read from the ROM
An error detection method characterized by detecting more consecutive errors. 2. A Galois 2 ⁿ number of elements are present GF (2 ⁿ⁾ performs an operation modulo a predetermined polynomial, the error detection method for detecting an error, from one word data string n bits A 4-word syndrome is generated, and from the syndrome, (X + α ⁱ ) (X + α ^j ) = X ² + δ ₁ X + δ ₀ where δ ₀ = α ⁱ α ^j = (S ₂ ² + S ₁ S ₃ ) / (S ₁ ² + S ₀ S ₂ ) δ ₁ = α ⁱ + α ^j = (S ₀ S ₃ + S ₁ S ₂ ) / (S ₁ ² + S ₀ S ₂ ) Two coefficients δ ₀ and δ ₁ of the error locator polynomial Smaller _one of the constants Y ₀ and Y ₁ of the conversion polynomial represented by δ ₀ ⁻¹ X ² + δ ₁ δ ₀ ⁻¹ X + 1 = (Y + Y ₀ ) (Y + Y ₁ ) Write only stored in advance in the ROM, the engagement number [delta] _0, read the number of the constant stored in the ROM of the [delta] ₁ as an argument, false by multiplying the coefficient of the number of the constant Solution alpha ⁱ of said error Ri position polynomial indicating a ^position, to give the person corresponding to the storage of the ROM of the alpha ^j,
An error detection method characterized in that the other solution is calculated from the obtained solution and the coefficient.