JP2530378B2 - Crossbar network device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to a parallel processing system intended to perform high-speed arithmetic processing by simultaneously using a large number of processors and storage devices. The present invention relates to an arithmetic and control unit for preventing a decrease in economic efficiency due to the efficiency of parallel processing and a complexity of a coupling circuit by a crossbar network system connecting a processor and a storage device.

(Prior Art) As a conventional arithmetic control device using a crossbar network system, there is, for example, one shown in FIGS. 4 and 5 (issued in May 1982 Vol23 No23 Information Processing p20
1 to p209).

As shown in FIG. 5, in such a conventional crossbar network type arithmetic and control unit, a communication bus 1 which is a common line for bus so-called information transmission, and a memory unit which is a memory so-called information storage location. 2, a small electronic computer that controls transmission of information, a so-called microprocessor 3, and a dedicated control line 4 from the communication bus 1.
And a crossbar network 5 connected to each required intersection.

FIG. 4 shows an example of the connection state of the crossbar network 5.

The crossbar network 5 is configured such that the input lines (a to d) 6 and the output lines (to) 7 in which the signal transmission direction is determined intersect in a grid pattern, and a desired output is obtained from each input. As shown, a switch, a so-called crossbar switch 9, is provided at a crossing point 8, which is a crossing point of the input line 6 and the output line 7. In the figure, both are shown as being overlaid. However, in this figure C of input line 6
The crossbar switch 9 is not installed at the intersection 8'of the output line 7 and the output line 7 because the output from here is not necessary in the program.

 Next, the operation of this conventional example will be described.

The storage device 2 and the microprocessor 3 store the status of the crossbar network 5 in advance in response to an input to the crossbar network 5,
Information that meets the input requirements is extracted, and based on this information, which crosspoint 8 of the crossbar network 5 is to be found.
The microprocessor 3 determines whether to turn it on and off,
The crossbar network 5 operates so as to perform control in response to changes in the entire situation. The conventional one can cope with high-speed arithmetic processing by performing a huge amount of calculation in parallel in this way.

(Problems to be Solved by the Invention) By the way, in the conventional coupling method of the microprocessors 3 that jointly uses the storage devices 2, a plurality of microprocessors 3 are simultaneously stored in the shared storage device 2. Since information cannot be called, a certain waiting time is required to call one piece of information from the shared storage device 2.

Therefore, there is a drawback that the control time is taken as a whole system, that is, the calculation speed becomes slow. If an external device is provided to eliminate this drawback, the cost will increase accordingly.

In addition, the dedicated control line 4, which is a signal line required to transmit the control signal, must be arranged at each cross point 8 of the crossbar network 5, and there is a drawback that the coupling circuit becomes complicated. As a result, the economical efficiency of the entire device has been lowered.

The present invention has been made in view of such conventional problems, and an object of the present invention is to provide a crossbar network device that can perform rapid calculation and that does not reduce the economical efficiency of the entire device. .

[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, the present invention includes a first device group and a second device group each including a plurality of devices, and a first device group. A crossbar network including a first signal line connected to the second device group, a second signal line connected to the second device group, and a switch unit connecting the first signal line and the second signal line. In the device, a logic determining means for individually controlling the open / closed state of the switch means is provided corresponding to the switch means, and the logic determining means includes the first information regarding the connection request of the first device group and the switch means. The open / closed state of the switch means is determined based on the second information regarding the open / closed state of the switch, and the first and second information are determined based on the determination, and the first and second logic determination means are adjacent to each other in the first direction.
Information is output, and the second information is output to the logic determining means adjacent in the second direction.

(Operation) The logic determining means determines the open / closed state of the switch means based on the first information regarding the connection request of the first device group and the second information regarding the open / closed state of the switch means, and based on the determination. Determining the first and second information and determining the first
Output the first information to the logic decision means adjacent in the direction of
Since the second information is output to the logic determining means adjacent in the second direction, it is possible to individually control the open / closed state of the switch means that connects the first and second signal lines. , First in the logic decision means adjacent in the first direction
Can be output, and the second information can be output to the logic determining means adjacent in the second direction.

(Embodiment) An embodiment of the present invention will be described below with reference to the drawings shown in FIGS. FIG. 2 shows a principle diagram of a logic circuit (means) 23 according to the present invention.

 In this figure, X ... rapid input signal, Y ... input request signal
issue, ...... Output rapid signal, …… Output request signal, S ……
Indicates a contact output signal.

 FIG. 3 shows (a) and (b) of the logic circuit 23 shown in FIG.
In the case of 4 types of (c) and (d),
Combination of each signal of speed / output rapid and input demand / output demand
Indicates the truth value by. In this figure, 0 ... Logical "0", 1 ...
… Logical “1”, = X + Y, = X · Y, S = · Y
You.

FIG. 1 shows a block diagram of a crossbar network according to the present invention.

First, the configuration will be described. The crossbar network 10 has signal lines 14, 1 to which the storage devices 11, 12, 13 are connected along the horizontal axis.
5, 16 are arranged in order from the upper side to the lower side of the figure, and the signal lines 20, 21, 22 connected to the microprocessors 17, 18, 19 are arranged along the vertical axis from the left side of the figure. They are arranged in order toward the right. As a result, the respective signal lines intersect at reference numerals 26 to 34 in the figure. Reference numerals 26 to 34 are intersections at which the respective signal lines intersect, so-called cross points, and all the intersections are provided with the logic circuit 23 of FIG. 2 having a crossbar switch. For example, at the intersection 29 of the signal line 15 and the signal line 20, a switch so-called crossbar switch 9 shown by a circle in the figure for connecting the signal line 15 and the signal line 20 is provided, and each crossbar is connected. A logic circuit 23 is provided adjacent to the switch 9, and the crossbar switch 9 is turned on and off by a contact output signal (control signal) S of the logic circuit 23.

In addition, the logic circuit 23 provided at each of the intersections 26, 29, and 32.
The input rapid signal 24 input to the memory device
It is a signal indicating virtual operating states of 2 and 13, and a fixed value "0" is preset as shown in FIG.

In addition, signal transmission is specified from top to bottom in the order of 14 → 15 → 16 when the horizontal axis signal line is used as a reference, and 20 → 21 → when the vertical axis signal line is used as a reference. In order of 22,
The direction is specified from left to right. That is, signals are transmitted with priority given to the upper part of the vertical axis and the left part of the horizontal axis to the lower part of the vertical axis and the right part of the horizontal axis.

Next, the operation of the above embodiment will be described with reference to FIG.

First, in the crossbar network 10, for example, “0” is input as the input quick signal 24 and “1” is input request signal 25 to the logic circuit 23 provided at the intersection 26 of the signal line 14 and the signal line 20.
, The contact output signal “1” is output from the logic circuit 23 (see (b) of FIG. 3), the crossbar switch 9 is turned on, and the signal lines of the memory device 11 and the microprocessor 17 are turned on. Is connected and the control signal of the storage device 11 is transmitted to the microprocessor 17 to perform a predetermined calculation.

With the intersection 26 connected, for example, “1” is input as the input rapid signal 24 and “1” is input request signal 25 to the logic circuit 23 provided at the intersection 27 of the signal line 14 and the signal line 21. When input simultaneously, the contact output signal "0" is output from the logic circuit 23 and the crossbar switch 9 does not operate (see (d) in FIG. 3).

On the other hand, with the intersection 26 connected, “0” is input as the input quick signal 24 and “1” is input as the input request signal 25 to the logic circuit 23 provided at the intersection 30 between the signal line 15 and the signal line 21. When input at the same time, the logic circuit 23 outputs a contact output signal "1" (see (b) in FIG. 3), and the crossbar switch 9
Is turned on, the signal lines of the memory device 12 and the microprocessor 18 are connected, the control signal of the memory device 12 is transmitted to the microprocessor 18, and predetermined calculation is performed.

However, in the state in which the intersection 26 is connected, the logic circuit 23 provided at the intersection 29 between the signal line 15 and the signal line 20 has “0” as the input quick signal 24 and “0” as the input request signal 25. However, since the logic circuit 23 outputs the contact output signal “0” and the crossbar switch 9 does not operate (see (a) of FIG. 3), signals of the memory device 12 and the microprocessor 17 are input. The lines are not connected. Further, at this time, for example, “0” as the input rapid signal 24, the input request signal is input to the logic circuit 23 provided at the intersection 32 of the signal line 16 and the signal line 20.
Since "0" is simultaneously input as 25, the contact output signal "0" is output from the logic circuit 23 and the crossbar switch 9 does not operate (see (a) in FIG. 3).
The signal lines of 13 and the microprocessor 17 are also not connected.

In this way, the input rapid signal 24 and the input request signal 25 input to the logic circuit 23 provided at the uppermost and leftmost intersections 26 of the signal line 14 and the signal line 20 are the sides of the crossbar network 10. It is possible to turn on the crossbar net switch that is sequentially transmitted from the upper side to the lower side of the vertical axis and from the left side to the right side of the horizontal axis to the respective logic circuits 23 of the axis and the vertical axis, and which is suitable for each condition. Yes, it enables high-speed calculation.

 That is, the operation is performed by the following steps.

Regarding the intersection 26, the logic circuit of the intersection 26 becomes as shown in FIG. 3 (b) by the Y signal = "1" from the microcomputer 17, and the switch 9 is closed. Therefore, the microcomputer 17 and the storage device 11 communicate with each other.

 Regarding the intersection points 29 and 32 at the time of step, the theory of the intersection point 26
The logic circuit = 0 and the switches at intersections 29 and 32 are closed.
Never.

 About the intersection 27 at the time of step, from the microcomputer 18
Even if Y signal = "1" is output, The theory of intersection 26 where = 1
From the situation of the logic circuit, the logic circuit at the intersection 27 is as shown in Fig. 3 (d).
Switch 9 remains open.

Regarding the intersection 30 at the time of step, the logic circuit of the intersection 30 is shown in FIG. 3 (b) by Y signal = "1" from the microcomputer 18.
And the switch 9 is closed. Therefore, the microcomputer 18 and the storage device 12 communicate with each other.

For this reason, even if the Y signal = "1" is output from the microcomputer 19 in the steps 1 to 3, the switch 9 is open at the intersections 28 and 31, and the storage devices 11 and 12 already in use are connected. There is no.

 About the intersection 33, the logic circuit of the intersection 30 is By = 0
As shown in Fig. 3 (a), switch 9 cannot be closed.
Yes.

Therefore, when the Y signal = "1" is output from the microcomputer 19 in the conditions of steps 1 to 3, the intersection 9 is as shown in FIG. 3 (b) and the switch 9 is closed. Therefore, the microcomputer 19 communicates with the storage device 13 that is not in use.

Here, although the microprocessor and the storage device are provided, it is more effective if, for example, two printers are provided in a column and four devices that issue a print command to the printer are also provided in a row, and this crossbar network is configured. . That is, it is more appropriate that the column has no individuality such as a printer.

The present invention is not limited to the binary-type logic means, but can be similarly applied to other-type logic means.

[Effects of the Invention] As described above, according to the present invention, the logic determination means uses the first information regarding the connection request of the first device group and the second information regarding the open / closed state of the switch means. The open / closed state of the switch means is determined based on the determination, the first and second information are determined based on the determination, the first information is output to the logic determination means adjacent in the first direction, and the second information is output. Since the second information is output to the logic determining means adjacent in the direction, it is possible to individually control the open / closed state of the switch means that connects the first and second signal lines, and at the same time, Since it is possible to output the first information to the logic determining means adjacent in the direction of and the second information to the logic determining means adjacent in the second direction, from the upper side of the vertical axis to the lower side of the horizontal axis. Intersection that meets the conditions transmitted from one direction to the right As a result, the control speed of the entire system becomes faster, and the entire crossbar network has no dedicated control line to each crosspoint as compared to the conventional crossbar network. Therefore, there is an effect that it is possible to expect a significant economic improvement in device configuration or manufacturing.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG.
The principle diagram of the logic circuit used in the circuit diagram of FIG. 1, and FIG.
FIG. 4 is a diagram showing truth values of respective inputs and outputs by the logic circuit shown in FIG. 2, FIG. 4 is a circuit diagram showing an example of a conventional crossbar network, and FIG. 5 is a conventional crossbar network system. It is a block diagram showing an example of an arithmetic and control unit. 1 ... communication busbar, 2 ... storage device 3 ... microprocessor 4 ... dedicated control line 5 ... crossbar network 6 ... input line, 7 ... output line 8 ... crosspoint 9 ... crossbar switch 10 …… Crossbar network 11 ～ 13 …… Storage device, 14 ～ 16 …… Signal line 17 ～ 19 …… Microprocessor 20 ～ 22 …… Signal line, 23 …… Logic circuit 24 …… Input rapid signal, 25… … Input request signals 26 to 34 …… Intersection of signal lines

Claims (1)

(57) [Claims] 1. A first and a second device group composed of a plurality of devices, a first signal line connected to the first device group, and a first signal line connected to the second device group. In a crossbar network device comprising a second signal line and a switch means for connecting the first and second signal lines, a logic determining means for individually controlling the open / closed state of the switch means is provided. The logic determining means is provided corresponding to the switch means, and determines the open / closed state of the switch means based on the first information regarding the connection request of the first device group and the second information regarding the open / closed state of the switch means. , Determining the first and second information based on the determination, outputting the first information to the logic determining means adjacent in the first direction, and outputting the second information to the logic determining means adjacent to the second output. Output information of Scan bar network device.