JP2527830Z - - Google Patents

Description

[Detailed description of the invention] [Object of the invention] (Industrial application field) The invention relates to a liquid crystal display device. (Prior Art) In driving a liquid crystal panel, an AC voltage is applied so that the liquid crystal composition in the liquid crystal panel is not decomposed or broken. For example, in multiplex driving in which an XY matrix type liquid crystal display panel is line-sequentially scanned, a voltage polarity during a scanning period is inverted in each scanning line to obtain an AC, or
A method of inverting the polarity of the applied voltage for each frame and performing AC conversion is adopted. The driving IC of the liquid crystal panel is composed of a logic circuit for inputting and processing a display data signal and a scanning signal to convert them into AC, and a switching circuit for switching several kinds of voltages necessary for driving the liquid crystal (for example, a special circuit). See Japanese Patent Publication No. 62-31349). The driving IC is supplied with a display data signal, a scanning signal, and the like, a voltage for operating a logic circuit and a switching circuit, and a plurality of voltages for driving a liquid crystal. When the liquid crystal is turned on, the liquid crystal driving voltage is switched by a switching circuit according to a display data signal and a scanning signal, and an AC voltage is applied to the liquid crystal panel. (Problem to be solved by the invention) At the moment when the power switch is turned on, the drive IC does not operate normally, and during a transitional period until the operation is stabilized, the liquid crystal drive voltage is changed to AC. It is applied to the liquid crystal panel without being processed. At this time, the voltage applied to the liquid crystal panel is considerably higher than the threshold voltage of the liquid crystal, and significantly degrades the display quality of the liquid crystal panel. This transient period is a relatively short period of, for example, several hundred milliseconds. However, this high DC voltage disturbs the alignment of liquid crystal molecules, causes display defects, and poses a serious problem in practical use. When the power switch is repeatedly turned on and off and the abnormal DC voltage is applied many times, the liquid crystal composition is decomposed and deteriorated, and not only a desired display performance is obtained but also a normal operation is performed. You will not be able to do it. The present invention solves such a problem, and provides a highly reliable liquid crystal display device having no display defects due to disordered alignment of liquid crystal molecules and having good display performance even when used for a long time. . [Object of the Invention] (Means for Solving the Problems) The liquid crystal display device of the present invention includes a liquid crystal panel, a driving IC for driving the liquid crystal panel,
A first terminal supplied with logic power supply voltage for operating the driving IC, a liquid
A second terminal for receiving a high-voltage power supply voltage for driving the crystal panel ;
And after receiving the supply of the voltage to the second terminal, after the operation of the drive IC becomes a steady state by the logic power supply voltage, to transmit the power supply voltage of the high voltage to the driving IC, resistance
A liquid crystal display device incorporating a delay means composed of an anti-R and a capacitor C. (Operation) In the present invention, after the power switch is turned on, the power supply voltage V for operating the liquid crystal driving IC is obtained.
After DD reaches a predetermined voltage (for example, + 5V) and the logic section operates normally,
Since the liquid crystal driving voltage is applied to the driving IC, the abnormal high voltage described above is not applied to the liquid crystal panel, and the alignment of the liquid crystal molecules is not disturbed and the reliability is not adversely affected. At this time, after applying VDD, it is sufficient that a high liquid crystal driving voltage is not applied to the liquid crystal panel in a DC state before the driving IC enters a steady state, and the DC voltage is a low DC voltage. Then, the influence on alignment defects and reliability is relatively small. According to experiments by the inventors, if the voltage is as low as about twice the threshold voltage of the liquid crystal panel,
It has been shown that there is relatively no problem. Further, the time for delaying the application of the liquid crystal driving voltage from the VDD depends on the characteristics of the liquid crystal driving IC and the characteristics of the liquid crystal panel, but is preferably, for example, several hundred milliseconds to several seconds. (Embodiment) FIG. 1 is a block circuit diagram showing an embodiment of the present invention. The liquid crystal display device 1 includes a signal line drive IC 2 including a data latch and a switch circuit, a scan line drive IC 3 including a cyst register and a switch circuit, and each drive IC 2.
3 includes a super twist type liquid crystal panel 4 connected to an output of the control circuit 3, a drive voltage generation circuit 5 and a voltage adjustment circuit 11. Further, a first terminal 6 for receiving a first power supply voltage VDD for operating the driving ICs 2 and 3 and a second terminal 7 for receiving a high voltage second power supply voltage V0 for driving the liquid crystal panel. It has. The super twist type liquid crystal panel 4 is driven with a pixel number of 600 × 400 and a duty ratio of 1/200. The liquid crystal display device 1 is externally provided with a drive signal source 10, a logic power supply (VDD: + 5V) 12, a liquid crystal drive power supply (V0: -21V) 14, a power supply 16, and a power switch 18. The drive voltage generation circuit 5 generates a plurality of voltages necessary for AC driving the liquid crystal panel from VDD and V0. In this embodiment, the power supply delay circuit 8 is inserted between the terminal 7 receiving the voltage of the liquid crystal drive power supply 14 and the drive voltage generation circuit 5. Specifically, the power supply delay circuit 8 uses a switch circuit including a contact relay element 20 shown in FIG. After turning on the power switch 18, this circuit
After the data latches and shift registers of the drive ICs 2 and 3 start operating normally, the R and C of the delay circuit are set so that 21 V, which is V0 of the liquid crystal drive power supply 14, enters the drive voltage generation circuit 5. The delay was 1 second by setting the time constant according to According to this embodiment, the DC voltage applied to the liquid crystal panel 4 when the power was turned on was almost 0 V, and the occurrence of alignment defects as well as the disturbance of the screen when the power was turned on did not appear. Further, a blinking test of the display panel was performed by repeatedly turning on and off the power switch 18 for a long period of time. As a result, no alignment defect and no deterioration in display characteristics were observed, and a good display screen was maintained. In the above embodiment, the power supply connection is delayed by using the relay element. However, a semiconductor delay circuit may be formed as shown in FIG. In this circuit, the time constants of R and C are set so that the liquid crystal drive voltage gradually increases and the time required to reach the set voltage of 21 V is 600 milliseconds. In this case, the DC voltage applied to the liquid crystal panel 4 when the power was turned on was about 7 V, and the application time was 100 ms or less. In this case, similarly to the above-described embodiment, not only the screen disturbance at the time of turning on the power but also the occurrence of alignment defects did not appear. Further, a flicker test of the display panel was performed for a long period of time. As a result, no alignment defect and no deterioration in display characteristics were observed, and a good display screen was maintained. Further, as shown in FIG. 4, a delay circuit 8 may be inserted between the voltage setting terminal 9 of the drive power supply voltage circuit 5 and the voltage adjustment circuit 11. In this embodiment, the time constants of R and C are set so that the liquid crystal driving voltage gradually increases and the time required for reaching the input voltage V0 of 21 V is 600 milliseconds. Next, FIG. 4 will be described in detail. That is, the drive voltage generating circuit 5 shown in FIG. 4 is a circuit for generating a plurality of voltages necessary for driving the liquid crystal panel with AC from the power supply voltages VDD and V0. The drive voltage generation circuit 5 in FIG. 4 shows a general circuit. The voltage between the power supply voltages VDD and V0 is divided by a resistor, and the respective potentials are amplified (power amplified) via the operational amplifier OP.
3 (see FIG. 1). The voltage setting terminal 9 is generally connected to a voltage adjustment circuit 11 (
1 (see FIG. 1), and a voltage between the power supply voltage V0 and the ground voltage is supplied. Note that the variable resistor shown in the voltage adjusting circuit 11 is for obtaining an arbitrary voltage between the power supply voltage V0 and the ground voltage, and usually adjusts the contrast of the liquid crystal display with the set voltage of this volume. In FIG. 4, the voltage divided by the drive circuit generation circuit 5 is set to V1 from above VDD or lower.
, V2, V3, V4, and V5, VDD, V1, V4, and V5 are the driving ICs 3
VDD, V2, V3, and V5 are connected to the switch circuit (see FIG. 1) of the driving IC 2. Then, a general super twist type liquid crystal panel (see FIG. 1) is driven. That is, in the switch circuit of the driving IC 3, V
Upon receiving the voltages DD, V1, V4, and V5, one of the four potentials is selected according to the contents (scanning) of the cyst register, and a scanning pulse is output. Drive I
The switch circuit C2 receives the voltages VDD, V2, V3, and V5, selects one of the four potentials according to the contents (display) of the data latch, and outputs a video signal voltage. In this embodiment, a power supply delay circuit 8 of a characteristic part is added between the voltage setting terminal 9 and the voltage adjusting circuit 11 in place of the general connection for connecting the voltage setting terminal 9 to the voltage adjusting circuit 11 described above. I do. When the power is turned on, the output voltage of the potential adjusting circuit 11 instantaneously reaches a set voltage between the power supply voltage V0 and the ground voltage, and the power supply delay circuit 8 uses this voltage as the data latch and shift register of the driving ICs 2 and 3. Etc. (See Fig. 1)
Is set to reach the set voltage after normal operation is started. In this case, the DC voltage applied to the liquid crystal panel 4 when the power switch 18 is turned on is about 7
V, the application time was 100 milliseconds or less. In this case, similarly to the above-described embodiment,
In addition to the disturbance of the screen when the power was turned on, no generation of the alignment defect appeared. Further, a flicker test of the display panel was performed for a long time. As a result, no alignment defect and no deterioration in display characteristics were observed, and a good display screen was maintained. In order to solve the problem of the present invention, the present invention can also be achieved by providing a delay means outside the liquid crystal display device so that the liquid crystal driving power supply voltage is applied to the driving IC after being delayed from the logic power supply voltage. . However, in this case, the user who incorporates the liquid crystal display device into the set must additionally add a delay unit, which increases the user's trouble in using the liquid crystal display device. For this reason, it is desirable to provide delay means inside the liquid crystal display device as in the above-described embodiment. Also, instead of receiving a liquid crystal drive power supply voltage from outside the liquid crystal display device, a liquid crystal drive power supply is provided inside the liquid crystal display device, and a voltage is supplied from a logic power supply to reduce the liquid crystal drive voltage. It may be generated. In this case, the delay means may be provided between the logic power supply terminal and the driving IC. (Comparative Example) The delay circuit was removed from the above-described embodiment. In this case, at the same time when the power switch 18 was turned on, the screen was disturbed as if a high voltage was applied to the liquid crystal panel 4, and 10 seconds later, minute alignment defects began to occur. As a result of measurement, when the power switch was turned on, a DC voltage of 26 V was applied to the liquid crystal panel for 300 milliseconds. When the liquid crystal panel was turned on, although the AC drive was used, the alignment defects generated when the power was turned on did not disappear, the defective portions expanded over time, and after 30 minutes, the image quality was significantly deteriorated over the entire display area. Further, when a blinking test was performed over a long period of time, the liquid crystal was deteriorated, and the image quality was deteriorated. [Effects of the Invention] According to the present invention, when the power switch is turned on, a high voltage is not applied to the liquid crystal panel, there is no display defect due to disorder of the alignment of the liquid crystal molecules, and the display is performed even after long-term use. A highly reliable liquid crystal display device with good performance can be obtained.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block circuit diagram of the liquid crystal display device of the present invention, and FIGS. 2 to 4 show specific examples of delay means.

Claims (1)

(1) A liquid crystal panel, a driving IC for driving the liquid crystal panel, a first terminal receiving a logic power supply voltage for operating the driving IC, and a driving of the liquid crystal panel And a second terminal receiving a supply of a high-voltage power supply voltage. After the supply of the voltage to the first and second terminals, the operation of the drive IC is brought into a steady state by the logic power supply voltage. And a delay unit configured to transmit the high-voltage power supply voltage to the driving IC and configured by a resistor R and a capacitor C.