JP2519642Y2 - Parallel AD converter IC - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to a parallel AD converter IC, and more particularly to a parallel AD converter IC having a wide input band.

(Prior Art) An AD converter is a device that converts an input analog signal into a digital signal for processing by a computer, for example. Among these AD converters, the parallel AD converter IC is suitable for high-speed operation, and has been used for sampling applications up to several hundred MHz. Where conventional parallel AD
The input circuit of the converter IC will be described with reference to FIG. The input circuit is generally a comparator (not shown) having the emitter follower circuit shown in FIG.
2 ⁿ units are connected in parallel (for n-bit AD converter). Signal inputs to the comparator input buffers 1 are connected to each other by an internal wiring 2 using a metal thin film such as Al, and one end thereof is connected to a signal input pad 3. When this parallel type AD converter IC is used, a bonding wire is formed on the pad 3 by using a bonding wire 5 of gold, aluminum, copper or the like for electrical connection with the IC package (or external substrate) 4.

FIG. 4 shows a drive circuit array of the packaged parallel AD converter IC. In the figure, 11 is a buffer amplifier for amplifying an input analog signal, 12 is an IC package 4 shown in FIG.
Hereinafter, the AD converter includes the input buffer 1 and the comparison circuit. Here, a wideband buffer amplifier 11 is used for the AD converter 12
Input the signal to. In speeding up the AD converter 12,
Widening the input signal band is also an important issue.

Now consider the bandwidth of the circuit of FIG. An input equivalent circuit of the circuit of FIG. 4 is shown in FIG. In the figure,
V _S is the output signal of the buffer amplifier 11, R _S is the buffer amplifier
11 is the output impedance, C _PKG is the capacitance of the IC package 4, L _WIR is the inductance of the bonding wire 5, C _PAD is the capacitance of the pad 3, and R, L and C are the resistance, inductance and capacitance of the AD converter input buffer 11. is there. In the IC of the conventional AD converter 12, the influence of L and R is smaller than that of the capacitances C _PKG , C _PAD and C, and the input circuit is simplified to a circuit having impedance shown in FIG. The input capacitance C _{IN at} this time is as follows.

_{C IN = C PKG + C PAD} + C = C PKG + C PAD +2 n · C BC + C LINE [F] ...... (1) C BC is the input capacitance of the comparator dexterity input buffer 1. C _LINE is the capacitance of the internal wiring 2.
Therefore, the input band is In this example, a concrete numerical value is used for consideration. Now n
Consider the case of = 6. Each capacitance in FIG. 5 is as follows.

C _PKG = 1 _PF = 1 × 10 ^-12 F …… (3) C _PAD ＝ 0.2 _PF ＝ 0.2 × 10 ^-12 F …… (4) C _BC ＝ 11 _fF ＝ 11 × 10 ^-15 F …… (5 ) C _LINE = 1.6 _PF = 1.6 × 10 ^-12 F (6) The output impedance of the wideband buffer amplifier 11 is 40-50.
Since it is Ω, the value of output resistance R _S is as follows.

R _S = 50Ω (7) At this time, the input band becomes as shown in equations (2) to (7) to (8).

(Problems to be Solved by the Invention) In the circuit of FIG. 6 as well, if the output resistance R _S of the buffer amplifier 11 is reduced, a wider band can be achieved.
Generally, when R _S is made small, the buffer amplifier 11 must drive a large capacitance load, and the circuit tends to become unstable.

The IC package 4 the characteristic impedance Z _O even when the transmission line that was Z _O = R _S, can be canceled only the capacitance of the IC package 4, the input bandwidth f _c in this case, from equation (8) It is a degree.

As described above, the input band is largely controlled by the input capacitance.

The present invention has been made in view of the above points, and an object thereof is to realize a parallel AD converter in which the input band is not governed by the input capacitance and therefore the input band is widened. .

(Means for Solving the Problems) The present invention for solving the above problems is a parallel AD converter IC for converting an analog signal into a digital signal by using a plurality of comparators connected in parallel. the internal wiring having a signal input terminal at one end with each wiring, parallel capacitance between the comparator adjacent to each other among the comparator input capacitance (C) and of the internal wiring (C _L) and series inductance (L _L ) characteristics determined from the impedance _{Z0 = (L L / (C} L + C)) , further comprising a comparator input unit configured from a second end load resistor which terminates the internal wiring ^1/2 (R _L) It is characterized by.

(Function) Equivalent to the transmission line having the characteristic impedance by obtaining the characteristic impedance from the input capacitance of each comparator, the parallel capacitance of the internal wiring, and the series inductance L _L, and connecting a load resistance equal to the obtained characteristic impedance. By obtaining the comparator input section using a lumped constant circuit, the input signal band is widened regardless of the input capacitance.

Embodiment An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a circuit diagram of an input section of a parallel type AD converter IC according to an embodiment of the present invention. (A) In the figure, 20 is a comparator input section, C _L is a parallel capacitance of the internal wiring 2 of the comparator input section 20, L _L is a series inductance of the internal wiring 2, and C is the same.
Is the input capacitance of the comparator input 20. L _L ,
One unit is composed of three lumped constants C _L and C, and is composed of 2 ⁿ unit circuits. R _L is the load resistance. Inside the IC, the physical length per unit is about 1000 μm to 200 μm, which is extremely small.
It can be considered as the impedance per unit length of the distributed constant circuit. (B) is a diagram of a distributed constant circuit 21 equivalent to the comparator input section 20 by the lumped constant circuit of (a).
In the figure, P is a point of the distance X from the input end of the distributed constant circuit 21 of the total length L and the distance Y from the end. This distributed constant circuit 21
The characteristic impedance of is selected as Z _O , and the load resistance R _L is selected as the characteristic impedance Z _O.

At this time, the characteristic impedance Z _O is Becomes Therefore, the load resistance R _L may be selected from the following equation.

Putting concrete values, in the IC on the silicon substrate, A formed on SiO ₂ with a thickness of 2.5 μm and relative permittivity ε _r = 3.8
l In thin film (thickness of about 8000 Å), if an Al thin film is patterned on a line with a width of 3 μm and the unit length is 150 μm, L _L ≈5.79 × 10 ^-11 [H] …… (12) C _C ≈1.23 × 10 ^-14 [F] (13) Here, if the value of C is the same as the value of the equation (5), C = 1.1 × 10 ^-14 [F] (14) The characteristic impedance of 50 is widely used in measuring instruments.
It can be a system of Ω. Therefore, the load resistance R _L may be set to the following value.

R _L = 49.8Ω …… (16) 50Ω is sufficient in design.

Next, the operation of the above embodiment will be described. Expression (10) ~ (1
From the equation (5), the distributed constant circuit of the characteristic impedance Z _O can be equivalently formed on the IC by using the circuit configuration as shown in FIG. In the figure (b), P is a point on the equivalent distributed constant circuit 21 and is located at a distance X from the input end and a distance Y from the end. R _L is the load resistance selected for the value of the characteristic impedance Z _O. The signal at the point P on the distributed constant circuit 21 is calculated from the lossless telegraph equation. Becomes

Here, considering the frequency characteristics of V _P , equation (17) becomes Since it is, after all, the size of the V _P is ^{_{| V P | = | e jβ}} (Y-L) · V in | = | e jβ (Y-L) | · V in = V in ...... (20) ∵ | e ^{jβ (Y−L)} | = 1 (21), and the voltage V _{P at} point _P is V _in and does not depend on the frequency of the input signal. Since this applies to each point of the distributed constant circuit 21, the magnitude of the signal input to each comparator in FIG. 1 does not depend on the input signal frequency, and as a result, a very wide band comparator input section is configured. can do. In this way, if the lumped constant circuit is terminated with a load resistance equal to the characteristic impedance obtained from the capacitance of the comparator input section, the series inductance of the internal wiring, and the parallel capacitance, it can be equivalently replaced by the distributed constant circuit. , The frequency characteristic of the input circuit of the parallel type AD converter can be treated as if it were a distributed constant circuit, and it becomes a wide band circuit that does not depend on the input signal frequency, and the band limitation due to the input capacitance, which has been a problem in the past, is eliminated.

Further, by making the load resistance R _L equal to the characteristic impedance Z _O, it is possible to match the loads, and there is no fear that the input signal is reflected toward the signal source and disturbs the input signal waveform.

Furthermore, the input impedance of this type of AD converter is
Since it is Z _O , the input drive amplifier can also be designed with an output impedance of Z _O. In particular, if Z _O = 50Ω, a stable amplifier can be used by using the conventional circuit technology obtained by the measuring instrument. By matching the characteristic impedance Z _O of the package and substrate,
It is possible to escape from the effects of package capacitance and stray capacitance of the substrate. If a microstrip line is used in the substrate, unnecessary radiation and mixing of signals can be reduced, and a system with a high SN ratio can be realized. That is, the input section of the parallel AD converter IC according to this embodiment is an extremely effective means for widening the input band.

The present invention is not limited to the above embodiment.
FIG. 2 is an equivalent distributed constant circuit diagram of a circuit according to another embodiment of the present invention. 22 is a distributed constant circuit A equivalent to the lumped constant circuit composed of 2 ^n-1 unit circuits of characteristic impedance Z _O , and 23 is an equivalent distributed constant circuit similar to the equivalent distributed constant circuit of FIG. The equivalent distributed constant circuit B is exactly the same as A22. Equivalent distributed constant circuit A22 and equivalent distributed constant circuit B23
Two ⁿ 2 lumped constant circuits are connected in parallel to form 2 ⁿ circuits. In this example
Resistance for matching the characteristic impedance of the V _in the Z _O is inserting the input resistance R ₁ of Z _O in series.

(Effect of the Invention) As described in detail above, according to the present invention, it is possible to realize a parallel type AD converter having a wide input band without depending on the input capacitance, and the practical effect is great. .

[Brief description of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention and its equivalent distributed constant circuit, FIG. 2 is an equivalent distributed constant circuit diagram of another embodiment of the present invention, and FIG. 3 is a conventional parallel AD conversion. Of the input circuit of the converter IC, FIG. 4 is a diagram of an example of the driving circuit of the parallel AD converter IC, FIG. 5 is a diagram of the input equivalent circuit of the circuit of FIG. 4, and FIG. It is a simplified circuit diagram of an input unit equivalent circuit. 1 …… input buffer, 2 …… internal wiring 3 …… pad, 4 …… IC package 5 …… bonding wire 11 …… buffer amplifier, 12 …… AD converter 20 …… comparator input section 21 …… equivalent distribution Constant circuit 22 …… Equivalent distributed constant circuit A 23 …… Equivalent distributed constant circuit B L _L …… Internal wiring series inductance C _L …… Internal wiring parallel capacitance C …… Comparator input section input capacitance R _L …… Load resistance Z _O ...... Characteristic impedance

Claims (1)

(57) [Scope of utility model registration request] 1. A parallel AD converter IC for converting an analog signal into a digital signal by using a plurality of comparators connected in parallel.
In the above, in each of the comparators, an internal wire having a signal input terminal at one end thereof and an input capacitance (C) of the comparator and a parallel capacitance (C _L between adjacent comparators of the internal wires) ) and comparative constructed from series inductance (L _L) characteristic impedance obtained from _{Z0 = (L L / (C} L + C)) the other end terminating load resistance of the internal wiring ^1/2 (R _L) Parallel AD converter IC, which is equipped with a converter input section.