JP2517012B2 - How to diffuse impurities - Google Patents

How to diffuse impurities

Info

Publication number
JP2517012B2
JP2517012B2 JP62269659A JP26965987A JP2517012B2 JP 2517012 B2 JP2517012 B2 JP 2517012B2 JP 62269659 A JP62269659 A JP 62269659A JP 26965987 A JP26965987 A JP 26965987A JP 2517012 B2 JP2517012 B2 JP 2517012B2
Authority
JP
Japan
Prior art keywords
impurities
plasma
impurity
photoresist
diffusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62269659A
Other languages
Japanese (ja)
Other versions
JPH01111320A (en
Inventor
文二 水野
一郎 中山
正文 久保田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62269659A priority Critical patent/JP2517012B2/en
Publication of JPH01111320A publication Critical patent/JPH01111320A/en
Application granted granted Critical
Publication of JP2517012B2 publication Critical patent/JP2517012B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】 産業上の利用分野 本発明は固体中の不純物拡散方法に関するものであ
る。
TECHNICAL FIELD The present invention relates to a method for diffusing impurities in a solid.

従来の技術 シリコンに導入した不純物を高温熱処理により拡散さ
せる従来の方法に就いて第4図を用いて説明する。シリ
コンのLSI製造工程に於いては第4図の様に通常フォト
レジストを用いて所望の部位を開口8し、イオン注入法
によって不純物イオン9を導入する。この不純物を拡散
させる場合、通常bの様にフォトレジスト6を除去して
から、数百℃から千数百℃の間で、シリコン基体全体を
熱して不純物を拡散させCのごとく拡散層16を得る。
2. Description of the Related Art A conventional method for diffusing impurities introduced into silicon by high temperature heat treatment will be described with reference to FIG. In the silicon LSI manufacturing process, as shown in FIG. 4, an opening 8 is formed at a desired portion using a normal photoresist, and impurity ions 9 are introduced by an ion implantation method. In the case of diffusing the impurities, the photoresist 6 is usually removed as shown in b, and then the entire silicon substrate is heated to diffuse the impurities at a temperature of several hundreds to several hundreds of degrees Celsius to form the diffusion layer 16 like C. obtain.

発明が解決しようとする問題点 今日のLSI製造工程に於いては10数回のイオン注入が
必要であり、それらのプロファイルは複数回の熱処理後
に於いて、綿密に計算して把握している必要がある。
又、基体全体が熱せられる為、不必要な部位の不純物ま
で拡散が生じてしまう。
Problems to be solved by the invention In today's LSI manufacturing process, it is necessary to perform ion implantation ten times or more, and those profiles must be carefully calculated and grasped after multiple heat treatments. There is.
Further, since the entire substrate is heated, impurities in unnecessary parts are diffused.

問題点を解決するための手段 本発明は、不純物を含む固体を電子サイクロトロン共
鳴条件(ECR)及び高周波(RF)を用いた放電により発
生したプラズマ中に曝すことにより、固体中に不純物を
拡散する方法である。
Means for Solving Problems The present invention diffuses impurities into a solid by exposing the solid containing the impurity to plasma generated by discharge using electron cyclotron resonance conditions (ECR) and radio frequency (RF). Is the way.

作用 プラズマに曝された固体表面近傍は、特にプラズマ中
の電子の衝突により電離が生じる。電離された電子が他
の電子と衝突する事により2次的に電離を生じ、多数の
電子−正孔対が発生する。この電子−正孔対が再結合す
る際に、電子系のもつエネルギーが格子系に移る。これ
により励起された格子振動の中でも特に格子移動のモー
ドが優勢に成る事によって固体基体の構成原子及び不純
物の移動が起こり、結果的に不純物の拡散が生じる。す
なわち、プラズマによる励起の影響が及ぶ表面数十nmか
ら百数十nmまでの範囲で、格子,空孔,不純物の拡散が
生じる訳である。この現象は電気炉,ランプ炉やDCグロ
ー放電の様に基板全体の温度が上昇して生じる所謂熱拡
散ではないので、マスク材料を用いて選択的に開口した
部位の不純物のみを拡散の対象とする事が出来る。
Action In the vicinity of the surface of a solid exposed to plasma, ionization occurs due to the collision of electrons in the plasma. The ionized electrons collide with other electrons to cause secondary ionization, and a large number of electron-hole pairs are generated. When this electron-hole pair is recombined, the energy of the electron system is transferred to the lattice system. As a result, the lattice movement mode becomes dominant among the excited lattice vibrations, so that the constituent atoms of the solid substrate and the impurities move, resulting in the diffusion of the impurities. That is, the diffusion of lattices, vacancies, and impurities occurs in the range of several tens nm to hundreds of tens nm of the surface, which is affected by plasma excitation. This phenomenon is not so-called thermal diffusion that occurs when the temperature of the entire substrate rises like in electric furnaces, lamp furnaces, and DC glow discharges, so only the impurities in the sites that are selectively opened using a mask material are targeted for diffusion. You can do it.

実施例 本発明の一実施例について第1図〜第3図を用いて説
明する。この実施例はシリコン基板中の不純物に関する
ものである。第1図aの様に、シリコン基板2にCVDオ
キサイド膜4やフォトレジスト6をマスクとして用い、
所望の開口部位8を設ける。不純物を例えばイオン注入
で導入し、不純物層10を形成する。この様にして導入し
た不純物層10の所望の部位のみ先ほどと同様にフォトレ
ジスト6等でマスク開口し、プラズマに曝す。
Embodiment An embodiment of the present invention will be described with reference to FIGS. This example concerns impurities in a silicon substrate. As shown in FIG. 1a, using the CVD oxide film 4 and the photoresist 6 as a mask on the silicon substrate 2,
A desired opening portion 8 is provided. Impurities are introduced by, for example, ion implantation to form the impurity layer 10. In the same manner as described above, the photoresist 6 or the like is used as a mask to open only a desired portion of the impurity layer 10 thus introduced, and the exposed portion is exposed to plasma.

プラズマは典型的には以下の方法を用いた。第2図で
チェンバー12にHeガスを6sccm流し、真空度を5×10-4t
orrに保った。このガスを電子サイクロトロン共鳴条件
(ECR)及び高周波(RF)を用いて放電させる。このプ
ラズマ中の陰極14に先程のシリコン基板2を置く。第1
図cはプラズマ照射後のシリコン基板であるが、開口部
の不純物層は拡散して、拡散層16となる。
The plasma typically used the following method. In Fig. 2, 6 sccm of He gas was made to flow through the chamber 12, and the vacuum degree was 5 × 10 -4 t.
kept at orr. This gas is discharged using electron cyclotron resonance conditions (ECR) and radio frequency (RF). The silicon substrate 2 is placed on the cathode 14 in this plasma. First
Although FIG. C shows the silicon substrate after plasma irradiation, the impurity layer in the opening is diffused to become the diffusion layer 16.

第3図は▲BF ▼イオンをイオン注入機を用いてエ
ネルギー10KeVで、ドーズ1×1015ions/cm2注入したシ
リコン基板を前記プラズマ中に10分間曝した後のボロン
(B)のプロファイルである。イオン注入直後のピーク
(投影飛程〜8nm)に対して、表面側と基板奥部に向か
ってボロンが拡散している事が分る。この様に深さの異
るプロファイルをフォトレジストをマスク材に用いて、
低温で選択的に形成できる。
Fig. 3 shows BF + 2 ▼ ions of boron (B) after being exposed to the plasma for 10 minutes at a dose of 1 × 10 15 ions / cm 2 at a dose of 10 KeV with an ion implanter. It is a profile. It can be seen that boron diffuses toward the surface side and the back of the substrate with respect to the peak (projection range ~ 8 nm) immediately after ion implantation. In this way, using photoresists as mask materials with different depth profiles,
It can be formed selectively at low temperatures.

又、拡散の状態は、先に述べたプラズマ発生条件の内
例えば、操作中の真空度,プラズマキャリアガスの流量
率,放電に加えるパワー,プラズマに曝す時間,放電の
形式等を変更する事によりコントロールする事ができ
る。又、フォトレジストを使用する事が大きなメリット
となるからその保護のために、シリコン基板を100℃以
下に冷却する事が望ましい。
In addition, the diffusion state can be changed by changing, for example, the degree of vacuum during operation, the flow rate of the plasma carrier gas, the power applied to discharge, the time of exposure to plasma, the type of discharge, etc., among the plasma generation conditions described above. You can control. Further, since the use of photoresist is a great advantage, it is desirable to cool the silicon substrate to 100 ° C. or lower for protection thereof.

又、上記の例では、シリコン中に導入した不純物いわ
ば半導体装置製造に必要な不純物の拡散について述べた
が、不要な不純物例えばCZ type Si中の酸素等も内部か
ら、自由表面に向けて所謂外向拡散をプラズマにより生
じされ、表面付近の濃度を低くする事もできる。
Also, in the above example, the diffusion of impurities introduced into silicon, so to speak, necessary for semiconductor device manufacturing was described, but unnecessary impurities such as oxygen in CZ type Si are also called outward from the inside toward the free surface. Diffusion is caused by the plasma and the concentration near the surface can be lowered.

発明の効果 以上のように本発明によれば、固体表面近傍の不純物
拡散にプラズマ照射を用いる事により、室温から100℃
程度でフォトレジストを用いたまま拡散させる事ができ
る。つまり、基体全体が高温にならないため、選択的に
開口した部位のみの不純物を拡散させ得るので、今後ま
すます複雑に成るLSI製造工程の不純物プロファイルを
きめ細くコントロールする事ができ、高性能半導体装置
製造に寄与する。
Effects of the Invention As described above, according to the present invention, by using plasma irradiation for impurity diffusion in the vicinity of the surface of a solid, the temperature from room temperature to 100 ° C
It can be diffused to some extent while using the photoresist. In other words, since the temperature of the entire substrate does not rise, it is possible to diffuse impurities only in the selectively opened parts, which makes it possible to finely control the impurity profile in the LSI manufacturing process, which will become more and more complicated in the future, and to improve the performance of high-performance semiconductor Contribute to manufacturing.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例方法を説明するための工程
図、第2図はプラズマ照射を行う装置の概略構成図、第
3図はプラズマ照射による拡散の様子を示す特性図、第
4図は従来方法を説明するための工程図である。 2……シリコン基板、4……CVDオキサイド膜、6……
フォトレジスト、8……開口部、9……イオン、10……
不純物層、12……チェンバー、14……陰極、16……拡散
層。
FIG. 1 is a process diagram for explaining an embodiment method of the present invention, FIG. 2 is a schematic configuration diagram of an apparatus for performing plasma irradiation, FIG. 3 is a characteristic diagram showing a state of diffusion by plasma irradiation, and FIG. The drawings are process drawings for explaining a conventional method. 2 ... Silicon substrate, 4 ... CVD oxide film, 6 ...
Photoresist, 8 ... Aperture, 9 ... Ion, 10 ...
Impurity layer, 12 ... Chamber, 14 ... Cathode, 16 ... Diffusion layer.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】マスクの形成された半導体基板に対してイ
オン注入により不純物を導入する工程と、前記不純物の
導入された前記半導体基板上に選択的にフォトレジスト
を形成する工程と、電子サイクロトロン共鳴条件及び高
周波を用いて放電させることによって生じたプラズマを
前記フォトレジストの形成された前記半導体基板に曝す
ことにより熱拡散を起こすことなく前記不純物の拡散を
行なう工程とを有する不純物の拡散方法。
1. A step of introducing an impurity into a masked semiconductor substrate by ion implantation, a step of selectively forming a photoresist on the impurity-doped semiconductor substrate, and electron cyclotron resonance. Exposing the plasma generated by discharging under the condition and high frequency to the semiconductor substrate on which the photoresist is formed to diffuse the impurity without causing thermal diffusion.
JP62269659A 1987-10-26 1987-10-26 How to diffuse impurities Expired - Fee Related JP2517012B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62269659A JP2517012B2 (en) 1987-10-26 1987-10-26 How to diffuse impurities

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62269659A JP2517012B2 (en) 1987-10-26 1987-10-26 How to diffuse impurities

Publications (2)

Publication Number Publication Date
JPH01111320A JPH01111320A (en) 1989-04-28
JP2517012B2 true JP2517012B2 (en) 1996-07-24

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ID=17475428

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62269659A Expired - Fee Related JP2517012B2 (en) 1987-10-26 1987-10-26 How to diffuse impurities

Country Status (1)

Country Link
JP (1) JP2517012B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005277220A (en) * 2004-03-25 2005-10-06 Matsushita Electric Ind Co Ltd Method for leading impurity, impurity leading apparatus and semiconductor device formed by using the method
JP4964736B2 (en) * 2007-10-25 2012-07-04 東京エレクトロン株式会社 Plasma processing equipment

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58111324A (en) * 1981-12-25 1983-07-02 Hitachi Ltd Preparation of semiconductor device
JPS60138973A (en) * 1983-12-27 1985-07-23 Fuji Electric Corp Res & Dev Ltd Manufacture of insulated gate type field effect transistor

Also Published As

Publication number Publication date
JPH01111320A (en) 1989-04-28

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