JP2510522B2 - Signal processor - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a device for converting a signal such as a video signal into a signal having a desired frequency characteristic, and particularly to S / N and waveform distortion of a signal in a transmission system. The present invention relates to a signal processing method and apparatus suitable for improving the above.

[Conventional technology]

In a recording / reproducing apparatus such as a video tape recorder or a video disc player for recording / reproducing a video signal, or a signal transmission medium such as a satellite broadcast, a method of frequency-modulating (FM) the video signal and transmitting (or recording / reproducing) is generally used. Is used for. Of the signal received by such an FM transmission system
In order to prevent a decrease in S / N, the so-called de-emphasis signal processing method that emphasizes the high frequency component of the modulated signal in advance, that is, so-called pre-entasis, and suppresses the high frequency component after demodulating the FM signal has been used. It is commonly used.

In such a signal processing method, in order to faithfully transmit the signal, the transfer function of the pre-emphasis circuit for emphasizing the high frequency component of the signal is G ₁ (s). When the transfer function of the de-emphasis circuit to be suppressed is G ₂ (s), the following expression must be satisfied regardless of the frequency.

G ₁ (s) × G ₂ (s) = k (1) where S = jω, ω is the angular frequency of the signal, and k is a constant.

If this equation (1) is not satisfied, the transmitted (or recorded / reproduced) signal will have phase distortion and amplitude distortion, and the reproduced signal will be distorted. As a pre-emphasis circuit and a de-emphasis circuit that satisfy the equation (1), their transfer functions are Since the circuit network given by is easily and economically realized by resistors and capacitors, it has been widely used.

However, this conventional method does not consider the phase characteristics of the emphasis circuit and the de-emphasis circuit.

Regarding the method of improving the phase characteristics of the emphasis circuit, Japanese Patent Laid-Open Nos. 53-131814, 53-131815 and 61
Although the methods described in -8632 are well known, they have not been sufficiently considered with respect to the de-emphasis method that satisfies the above expression (1).

The methods described in JP-A-59-221126 and JP-A-60-7279 are well known as methods for improving the S / N ratio of a signal by using the emphasis circuit represented by the above formula (2). Sufficient consideration was not given to the stable operation of the de-emphasis circuit.

[Problems to be solved by the invention]

In the above conventional method, as is obvious from the equation (2),
Since the linearity of the phase characteristic of the emphasis circuit is poor, for example, when the above-mentioned pre-emphasis is applied to a rectangular pulse signal, a large level of overshoot and undershoot is generated only in one direction of rising and falling of the signal. When frequency modulation is performed as a modulation signal, there is a problem that the frequency shift amount increases correspondingly and the FM signal occupied band increases, which requires a wider transmission band. In the recording / reproducing apparatus such as the video tape recorder and the video disc player, the signal band that can be recorded on the medium is naturally limited. In the above conventional pre-emphasis method, a large peak waveform in one direction is generated with respect to the high frequency components of the signal, so that the instantaneous frequency of the FM signal becomes extremely high against overshoot and the high frequency due to the band limitation of the medium. Signal cannot be reproduced at a sufficient level, causing so-called reversal development (black horizontal noise is generated at the contour part of the video signal changing from black to white), and FM signal for undershoot. The instantaneous frequency is extremely lowered and so-called spectrum folding causes beat-like noise at the image contour portion, which significantly deteriorates the reproduced image quality.
In order to prevent this, it is common to configure the overshoot and undershoot waveforms of the signal after emphasis to be forcedly clipped (amplitude limited). Since it is lost, the above equation (1) no longer holds, and there is a problem that the reproduced waveform is greatly distorted. In order to prevent this, a method of reducing the amount of emphasis or the amount of frequency shift is also commonly used. However, although the waveform distortion is improved, it goes without saying that S / N
Remains the essential problem of deterioration.

The object of the present invention is to eliminate the above-mentioned drawbacks of the prior art, to satisfy the above equation (1), to have good linearity of phase characteristics, to prevent amplitude distortion and phase distortion, and to increase the amount of emphasis. It is to provide an emphasis circuit and a de-emphasis circuit that can improve the S / N of a signal.

[Means for solving problems]

In order to achieve the above object, the present invention has an exponential function exp (p with an amplitude characteristic of a complex frequency P (P = jωT and T time constant).
Using the network having the characteristics approximated in ² ), [1+
K · exp (p ² )] (where K is a constant greater than −1) has an amplitude characteristic approximated by a linear phase characteristic
The signal processing circuit of FIG. 2 is realized, and the amplitude characteristic opposite to this is realized, and the amplitude characteristic approximated by a function of 1 / [1 + K · exp (p ² )] is provided, and the phase characteristic is linear. The first feature is that the signal processing circuit is realized.

The second feature of the present invention is that an n-th order polynomial of complex frequency P is set with a _n being a positive coefficient. By using the exponential function by power series expansion And a filter circuit having a transfer function corresponding to the function 1 / [Xn (p)] ² obtained by the above, and phase equalization so that the phase characteristics become almost linear in the signal pass band of the filter circuit. A first circuit in which a phase equalizing circuit for cascading is continuously connected, and the input signal is delayed by a time substantially equal to the delay time of the output signal with respect to the input signal of the first circuit to obtain an all-pass type amplitude characteristic (amplitude characteristic). Equivalent to 1)
And a second circuit having the following circuit, and by synthesizing the input signal via the first circuit and the input signal via the second circuit at a predetermined ratio (K), [1 + K · exp ( p ² ))
It is to realize the first signal processing circuit having an amplitude characteristic approximated by the following function.

A third feature of the present invention is to apply the above exponential function approximation and to use two functions Xn (p) and Yn (p) which are all n-th order polynomials of complex frequency P and have positive coefficients. , And obtain the function Xn (p) / Yn
A third circuit having a transfer function corresponding to (p), a first time axis conversion means for inversely converting the time series for each unit cycle of the input signal, and an output from the first time axis conversion means. To the third circuit, and a fourth circuit configured by second time axis conversion means for inversely converting the time series for each unit cycle of the output signal from the third circuit; A fifth circuit having the same transfer function as the third circuit, and the fourth circuit and the fifth circuit.
1 / [1 + K ・
exp (p ² )] to realize the second signal processing circuit having an amplitude characteristic approximated by a function of exp (p ² )].

The above function Yn (p) is the following polynomial that satisfies K + Xn (p) · Xn (−p) = Yn (p) · Yn (−p) As will be described later, this Yn (p) can be mathematically obtained by appropriately cutting off the order n.

In addition, as described later, the following Bessel polynomial Bn (p) Can approximate the above exponential function relatively well, so instead of the above function Xn (p), this Bessel polynomial Bn (p)
Is used to obtain the following polynomial Zn (p) that satisfies K + Bn (p) · Bn (−p) = Zn (p) · Zn (−p), From these Bn (p) and Zn (p), as in the case of the above equation, Xn (p) → Bn (p), Yn (p) → Zn (p), 1 / [1 + K · exp (p ² )] = [Bn (p) / Zn (p)] · [Bn (−p) / Zn (−p)], an approximate expression is obtained.
The transfer function of the third circuit may be realized by Bn (p) / Zn (p).

It should be noted that this Zn (p) can be mathematically obtained by appropriately cutting off the order n, as in the case of Yn (p).

[Action]

The first signal processing circuit and the second signal processing circuit have amplitude characteristics opposite to each other and both have linear phase characteristics. One of them is operated as a pre-emphasis circuit and the other is operated as a de-emphasis circuit. By constructing the system so that it operates as an emphasis circuit, the overall transfer characteristic of this system will be that the phase characteristic will be linear, and therefore no phase distortion will occur, and the amplitude characteristic will be constant regardless of frequency. Therefore, no amplitude distortion is generated, and therefore a signal can be transmitted extremely faithfully without waveform distortion.

Further, the pre-emphasis circuit realized by either the first signal processing circuit or the second signal processing circuit operates so as to emphasize the level of the high frequency component of the input signal, and its phase characteristic is Since it is linear, an output waveform in which the waveform symmetry of the input signal is maintained can be obtained. More specifically, a pre-shoot and a post-shoot occur in the rectangular pulse signal in an odd and symmetric manner at substantially the same peak level before and after each of the rising and falling edges of the signal. In this way, the high-frequency components of the input signal are almost evenly distributed as pre-shoots and post-shoots before and after each rising and falling edge of the signal due to the enhancement, so that the peak value (peak-to-peak value) ) Is significantly smaller than the conventional emphasis system in which the phase characteristic expressed by the above equation (2) is not linear, and therefore the transmission band can be narrowed in the case of FM transmission, and due to the above-mentioned overmodulation. It is possible to suppress the occurrence of beat noise due to the inversion phenomenon and the spectrum folding, and it is not necessary to forcibly clip the waveform after emphasis, so that the waveform distortion can be prevented.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a signal processing circuit 100 according to an embodiment of the present invention.
FIG. The transfer function F ₀ (p) of the signal processing circuit 100 is approximately given by the following expression, where the signal supplied to the input terminal 1 is Vi and the signal Vo output from the output terminal 2 is Vi.

Here, P is a complex frequency, P = ST = jωT, ω is the angular frequency T of the input signal, and K is a constant. The signal processing circuit 100 includes a first basic circuit 10 having a transfer function F ₁ (p) and a transfer function F ₂ (p _2).
The second basic circuit 20 having (p) and the second basic circuit 20 are connected in cascade, and the following equation is established.

F ₀ (p) = F ₁ (p) × F ₂ (p) (4) On the other hand, in the above formula (3), exponential function power series expansion Is applied, the function F ₀ (p) can be approximated as follows.

As an example, when each coefficient when K = 4 is calculated, a ₁ = 1.9769, a ₂ = 1.4540, a ₃ = 0.4082, b ₀ = 2.2361, b ₁ = 1.
3123, b ₂ = 0.7610, b ₃ = 0.1826. From the equations (4) and (6), the transfer function F of the first basic circuit 10 is
₁ (p) and the transfer function F ₂ (p) of the second basic circuit 20
Are respectively given by the following equations.

The above is the case where the power series expansion of the exponential function is truncated at n = 3, but as another example, the first basic circuit 10 and the second basic circuit 20 when truncated at n = 2. Each transfer function is given by the following equation.

However, each coefficient when K = 4 is a ′ ₁ = 1.5538, a ′
₂ = 0.7071, b ' ₀ = 2.2361, b' ₁ = 0.9124, b ' ₂ = 0.31
Given at 62.

Next, FIG. 2 shows an embodiment in which the first basic circuit 10 having the transfer function F ₁ (p) in the equation (8) is realized by a digital filter.

As a method for realizing a digital filter, a method using the so-called bilinear Z transform of the following equation is known.

However, Z = e × p (ST ₀ ), T ₀ is a sampling period.

By substituting the equation (9) into the transfer function F ₁ (p) of the equation (8), the following equation is obtained.

As an example, the above coefficients are calculated for T / T ₀ = 10. C ₀ = 0.9664, c ₁ = 1.7298, c ₂ = 0.7756, d ₁ = 1.722
It is given by 1, d ₂ = 0.7495.

The embodiment of FIG. 2 has a transfer function equal to F ₁ (Z) in the above equation (10). In the figure, the input signal Vi is converted into a digital signal by an A / D converter (not shown), and the digital signal from the A / D converter is input terminal 1
Supplied to 0a. Reference numerals 11 and 12 are adders, and reference numerals 13 and 14 are delayers that delay T ₀ with time. 15,16,17,18,19
Is a coefficient unit, and the coefficient of the above equation (10) is
It has a coefficient value equal to d ₁ , d ₂ , c ₀ , c ₁ , c ₂ . The input signal from the terminal 10a is supplied to the + side terminal of the adder 11. Adder
The output of 11 is delayed by time T ₀ by the delay device 13 and then the coefficient value 15
Is amplified by d ₁ times and the output is supplied to the + side terminal of the adder 11. Further, the output from the delay device 13 is the delay device 14
After being delayed by the time T ₀ at, the coefficient multiplier 16 amplifies it by d ₂ times, and its output is supplied to the-side terminal of the adder 11. The adder 11 performs addition / subtraction calculation on the input signal from the terminal 10a, the output signal from the coefficient unit 15, and the output signal from the coefficient unit 16. Next, the output from the adder 11 is amplified by the coefficient multiplier 17 by c ₀ , and the output is added by the adder.
Supplied to the 12+ terminals. The output from the delay unit 13 is amplified by c ₁ times in the coefficient unit 18, and the output is added by the adder.
It is supplied to the 12-side terminal. The output from the delay unit 14 is amplified by c ₂ times in the coefficient unit 19, and the output is added by the adder 12
Is supplied to the + side terminal of. Each coefficient unit 1 in the adder 12
The addition / subtraction calculation of each output signal from 7, 18 and 19 is performed, and the output is output to the terminal 10b. With the configuration shown in FIG.
The transfer function F ₁ (Z) of the above equation (10) is realized, and therefore,
This means that the first basic circuit 10 having the transfer function F ₁ (p) of the equation (8) has been realized.

Note that the function F ₁ (p) of the above equation (7) obtained by truncating the above equation (5) with n = 3 can be realized in exactly the same manner as above, and is generally obtained by truncating approximation with an arbitrary order. The obtained function F ₁ (p) can be realized by the above-mentioned bilinear Z transformation.

Next, FIG. 3 shows an embodiment of the second basic circuit 20 which realizes the equation (7) and the other function F ₂ (p).

In the above equation (7), conversion of P → −P (that is, S →
It is clear that F ₁ (−p) = F ₂ (p) (11) holds if (S transformation) is applied. Based on this, the embodiment of FIG. 3 equivalently performs the function F ₂ (p) by performing P → −P conversion (so-called time axis conversion) and then filtering by the first basic circuit 10. ) Is realized. Hereinafter, the first basic circuit 10 shown in FIG.
The operation of the case where the second basic circuits 20 shown in FIG. 3 are connected in cascade will be described.

In FIG. 3, reference numeral 21 is an input terminal for the signal Ei, and the output signal from the terminal 10b of the first basic circuit 10 shown in FIG. 2 is supplied to this input terminal 21 as the signal Ei.

Reference numeral 200 denotes a time axis conversion circuit that performs time axis conversion so that the time series of the input signal Ei has a reverse time series. The time-axis conversion circuit 200 is configured by a memory for buffering the time-axis, and when the input signal Ei is appropriately input in every unit cycle, for example, when a video signal is input as the signal Ei, the horizontal axis of the video signal is set as the unit cycle. The data is sequentially written in the memory at a scanning cycle or a cycle that is an integral multiple thereof, or at a field cycle or a frame cycle that is a vertical scanning cycle of a video signal, and after writing is completed, at every unit time in an order opposite to the order of writing. It is read from the sequential memory and output. By this time axis conversion, the time series is converted in the opposite direction and the circuit 20
The signal output from 0 is the first basic circuit 10 having the transfer function F ₁ (p) realized in the embodiment shown in FIG.
After being filtered by, the time axis conversion circuit 300 again performs time axis conversion into a time series in the opposite direction. This time-axis conversion circuit 300 is composed of a memory for time-axis buffer similarly to the circuit 200, and sequentially writes the output signal from the circuit 10 to the memory at each unit cycle, and after the writing is completed, the writing order is changed. Is read out from the sequential memory and output in the reverse order. Therefore, the output signal Eo from the time axis conversion circuit 300 has the same original correct time series as the input signal Ei. Through the above series of signal processing, the conversion of P → −P and the function operation corresponding to F ₁ (−p) are performed. Therefore, the transmission from the input terminal 21 to the output terminal 22 of the basic circuit 20 is performed. The function becomes equal to F ₂ (p) as shown in the above equation (11), which means that this function could be realized.

In the embodiment of FIG. 3, the time axis conversion circuit is
For both 200 and 300, a digital memory such as a RAM or a shift register is used. Therefore, the terminal
When converting the digital signal output from 22 to an analog signal and outputting the analog signal, the output from the terminal 22 may be supplied to a D / A converter and converted into an analog signal, although not shown. Note that a certain dead time (delay time) occurs due to the time axis conversion processing in the circuits 200 and 300, and therefore
Strictly speaking, this dead time element needs to be added as the transfer function F ₂ (p) from 21 to the terminal 22, but it is omitted here for the sake of simplicity of explanation. Even if this dead time element is added, only a certain time delay occurs, the obtained effect remains unchanged, and this does not deviate from the gist of the present invention.

The first basic circuit 10 realized by the above embodiment
The transfer function F ₀ (p) of the signal processing circuit 100 shown in FIG. 1 constructed by connecting the second basic circuit 20 and the second basic circuit 20 in cascade is approximated by the above equation (3). It is clear that the circuit has an exponential function exp (p ² ) in the denominator, and thus the amplitude characteristic is monotonic with respect to frequency and has a linear phase characteristic.

Next, FIG. 4 shows the frequency characteristic of the signal processing circuit 100 of FIG. 1 which is determined by the transfer function F ₀ (p) of the equation (3). Accordingly, the signal processing circuit 100 is a pre-emphasis circuit that emphasizes the high frequency component of the input signal Vi when the constant K is set to be positive (K> 0) with K = 0 as a boundary. It operates, and when the constant K is set to a negative value (K <0), it obviously operates as a de-emphasis circuit that suppresses the high frequency component of the input signal Vi.

Next, FIG. 5 shows a response waveform to the rectangular pulse type input signal Vi when the signal processing circuit 100 is operated as a pre-emphasis circuit by setting K> 0. In the figure, (a) shows the waveform of the input signal Vi, and (b) shows the output signal Vo.
Shows the waveform of. As described above, the response waveform with respect to the rectangular pulse-like signal causes pre-shoot and post-shoot in odd symmetry at almost the same peak level before and after each rising and falling edge of the signal. That is, since the high frequency components of the input signal Vi are almost evenly distributed between the preshoot and the postshoot due to the enhancement, the peak-to-peak value of the output signal Vo is
It is smaller than the conventional emphasis method shown by the above equation (2).

Therefore, the signal Vo output after being processed in this way
In the case of frequency-modulating and transmitting (or recording / reproducing), the frequency shift amount can be suppressed to be small, so that the occupied band of the FM signal can be narrowed by that amount, and the restriction of the transmission band can be made less likely. Further, since overmodulation can be prevented, occurrence of spurious due to inversion phenomenon or spectrum aliasing can be suppressed, and since there is no need to forcibly clip a waveform, waveform distortion can be prevented.

Next, an example of the signal processing circuit 50 capable of restoring the original signal correctly by matching the pre-emphasis characteristic and the de-emphasis characteristic almost completely by applying the signal processing circuit 100 in a complementary manner Is shown in FIG.

This signal processing circuit 50 is the same as the signal processing circuit 10 shown in FIG.
Amplitude characteristics (| F ₀ (p) |) of ₀ and amplitude characteristics (| F
₀ (p) ^-1 ).

In the power series expansion of the exponential function e × p (p ² ) shown in the above equation (5), if it is cut off at n = 3, for example, the following approximate equation holds.

exp (p ² ) = H ₁ (p) × H ₂ (p) …… (12) However, each coefficient is a ₁ = 1.9769, a ₂ = 1.4540, a ₃ = 0.4082
And the denominator of this function H ₁ (p) and H ₂ (p) is given by
_They respectively match the numerator of the functions F ₁ (p) and F ₂ (p) of the above formula (7).

Similarly, if the above equation (5) is cut off with n = 2, the following approximate equation holds, Each coefficient is given by a ′ ₁ = 1.5538, a ′ ₂ = 0.7071, and in this case as well, each function H ₁ (p) and H _{2 of the} above equation (14) is given.
The denominator of (p) is the function F ₂ (p) of the above equation (8), respectively.
And the molecule of F ₂ (p).

Next, FIG. 7 shows an embodiment of the third basic circuit 30 configured to have the same transfer function as the function H ₁ (p) of the equation (12). The embodiment shown in FIG. 7 has the same transfer function as the function H ₁ (p) of the equation (13).

In the figure, 31 is a resistance R, 32 is an inductance L ₂ ,
33 and 34 represent capacitances C ₁ and C ₃ , respectively. The values of the inductance L ₂ and the capacitances C ₁ and C ₃ are given by the following equations using the resistance R and the time constant T.

From this, the transfer function H ₁ (p) of the output voltage V ₂ with respect to the input voltage V ₁ of the third basic circuit 30 in FIG. 7 matches the function H ₁ (p) shown in the above equation (13). The function has been realized. The above (14) function H ₁ (p) is also shown in the expression, not shown can be realized in the same manner, the function H ₁ generally denominator is represented by n-th order polynomial P (p) is the seventh It can be realized by the LC ladder network similar to the figure.

By the way, as is clear from the above equation (13) or equation (14), if attention is paid to the fact that | H ₁ (p) | = | H ₂ (p) | (16) holds, the above (16 ) And (12), it is clear that the following equation holds.

exp (p ² ) = | H ₁ (p) | × | H ₁ (p) | (17) That is, the exponential function exp (p ² ) is the transfer function H ₁ (p)
7 and the amplitude characteristic obtained by continuously connecting the circuit network 30 of FIG. 7 for two stages.

In the embodiment shown in FIG. 6, the circuit network 30 shown in FIG. 7 is cascaded in two stages (30a and 30b) for the above reasons. In addition, instead of connecting the circuit network 30 in two stages,
Since the transfer function of (H ² ₁ ) (p) can be realized by one stage of the LC ladder network having the same number of elements as in FIG. 7, one stage of this network may be used.

In the figure, the signal Si input to the terminal 51 is filtered by the two networks 30a and 30b connected in cascade, and its output is passed by the phase equalizer 56 to the pass band of the input signal Si. Phase equalization is performed so that the phase becomes linear (delay flat) sufficiently. As the phase equalizer 56, a so-called quadratic all-pass network is connected in multiple stages so that only the phase characteristic is changed without changing the amplitude characteristic and the delay flattening is sufficiently performed. it can. Assuming that the delay time from the input terminal 51 to the output of the phase equalizer 56 is T ₁ , the transfer function H ₃ (p) to the output of the phase equalizer 56
Is given by the following equation from the above.

_{H 3 (p) = | H} 1 (p) | 2 · exp (-ST 1) = e × p (p 2) · exp (-ST 1) ...... (18) the phase equalizer 56 these outputs Is amplified K times in the coefficient unit 53 and then supplied to one + side terminal of the adder 54.

On the other hand, the input signal Si from the terminal 51 is delayed by the delay device 55 for the same time as the delay time T _1, and its output is added by the adder.
It is supplied to the other + terminal of 54. With this adder 54,
The output from the delay unit 55 and the output from the coefficient unit 53 are added, and the output signal So thereof is output to the terminal 52.

With the above configuration, the transfer function H ₀ (p) from the input terminal 51 to the output terminal 52 is given by the following equation using the equation (18).

H ₀ (p) = [1 + K ・ exp (p ² ) ・ e × p (-ST ₁ ) ...
(19) FIG. 8 shows frequency characteristics of the signal processing circuit 50 shown in FIG. 6 which is determined by the transfer function H ₀ (p). Than this,
When K> 0 (that is, when the coefficient unit 53 operates as a non-inverting amplifier), the signal processing circuit 50 operates as a de-emphasis circuit that suppresses the high frequency component of the input signal Si, and K <0. In the case of (that is, when the coefficient unit 53 is operated as an inverting amplifier), it is apparent that it operates as a pre-emphasis circuit that emphasizes the high frequency component of the input signal Si.

As is clear from the comparison between the above equations (19) and (3), the following equation holds. However, the dead time element of F ₀ (p) is omitted.

F ₀ (p) × H ₀ (p) = exp (−ST ₁ ) (20) That is, the signal processing circuit 100 of FIG. 1 and the signal processing circuit 50 of FIG. 6 have mutually opposite amplitudes. Has characteristics,
If the system is configured so that one operates as a pre-emphasis circuit and the other operates as a de-emphasis circuit, the overall transfer characteristics of this transmission system will be a constant delay time, as shown in equation (20). When it occurs, the phase characteristic becomes linear and there is no phase distortion.
Further, since the amplitude characteristic is constant regardless of the frequency, no amplitude distortion occurs, and therefore the signal can be transmitted extremely faithfully without waveform distortion, and the transmission can be performed in accordance with the emphasis amount according to the above K value. The noise received on the road can be suppressed to improve the S / N. Particularly, according to the method of the present invention, the amount of emphasis can be increased as compared with the conventional method described above, and the effect of improving the S / N can be obtained. .

In the present invention, in particular, the signal processing circuit 10 shown in FIG.
By operating 0 as a pre-emphasis circuit and operating the signal processing circuit 50 shown in FIG. 6 as a de-emphasis circuit, the most stable system can be constructed.

That is, considering the case where the signal processing circuit 100 of FIG. 1 which requires the time axis converting means is operated as a de-emphasis circuit for a video signal, the input terminal 1 is subjected to pre-emphasis video signal Vi. Is entered.

In the signal processing circuit 100, as described above, the time axis conversion is performed for each unit cycle of the video signal, for example, for each horizontal scanning cycle or vertical scanning cycle, and therefore the horizontal synchronizing signal or the vertical synchronizing signal included in the video signal, etc. Is separated, and the time axis conversion for each unit cycle is performed based on the separated synchronization signal. However, since the video signal Vi input to the terminal 1 is pre-emphasized and has a sharp peak waveform before and after the rising and falling edges, the video signal subjected to such pre-emphasis. It is generally difficult to stably separate the sync signal from Vi.

As a method to avoid this problem, input video signal
This signal processing circuit 100 does not separate the sync signal from Vi.
The system may be configured to separate the sync signal from the signal Vo output from the terminal 2 after being subjected to de-emphasis at. However, because the negative feedback loop is configured for synchronization separation, the input video signal may contain abrupt changes in the time axis, such as skew.
If the sync signal is lost due to dropout or the like, the system is disturbed by the influence of the drop and the operation becomes unstable.

On the other hand, as described above, the signal processing path of FIG.
If 50 is operated as a de-emphasis circuit, it is possible to perform extremely stable signal processing because the above-described means for synchronizing separation is not particularly required. If the signal processing circuit 100 shown in FIG. 1 is operated as a pre-emphasis circuit in a complementary manner, the input video signal has a normal waveform, so that the synchronization separation necessary for the signal processing is performed. Can be performed stably without any change from the conventional method.

In the above embodiments, the case where the exponential function exp (p ² ) is approximated based on the above formula (5) is shown, but the present invention is not limited to this, and it is well known, for example. Since a so-called Bessel polynomial approximates the above exponential function relatively well, this Bessel polynomial may be used instead of the above exponential function, which is the gist of the present invention. One example will be shown below. As an example, consider the following second-order (generally n-th order) Bessel polynomial: 1 / instead of the exponential function exp (p ² ) shown in equation (3) above
By substituting the function (X (p) · X (−p)) and finding each coefficient of the function F ₁ (p) of the above equation (8) for K = 4, a ′ ₁ = 1, a ′ ₂ = 1/3, b ′ ₀ = 2.2361, b ′
₁ = 0.6040, given by b _'2 = 0.1491. This function F
₁ (p) can be realized by a digital filter having the same configuration as that shown in FIG. Similarly, instead of the exponential function exp (p ² ) shown in the equation (12), the above function I / (X (p) ·
If X (-p)) is used, then H ₁ (p) = 1 / X (p) (22) holds, and therefore each coefficient of the function H ₁ (p) in the above equation (14) is a ′. ₁ = 1 Given in. This function H ₁ (p) can be realized by the passive network 30 'shown in FIG. In the figure, 35 is a resistance R, 36 is an inductance L, and 37 is a capacitance C, and their respective values are given by the following equations.

Next, in the embodiment shown in FIG. 2, the function F ₁ (p) is realized by a digital filter, but the present invention is not limited to this, and the function F ₁ (p) is constituted by a passive circuit network. Is also good. However, since the function F ₁ (p) cannot be realized only by the passive network, it can be realized by the passive network by slightly changing the coefficient value of the function F ₁ (p). . As an example, considering the case where the function F ₁ (p) shown in the above equation (8) is realized by a passive network, it cannot be realized as it is because a passive element having a negative value is required. If you increase the value of ′ ₁ a little (without changing other coefficients) and set b ′ ₁ = 0.95,
This can be easily realized by a passive network 10 'having a simple structure as shown in FIG.

In FIG. 10, 40, 41, 42 are resistors R ₀ , R ₁ , R ₂ , 4 respectively.
Reference numeral 3 indicates a capacitance C, and reference numeral 44 indicates an inductance L.
Here, the values of the resistors R ₁ and R ₂ , the inductance L and the capacitance C are based on the value of the resistor R ₀ ,
It is given by the following equation using the above time constant T.

The transfer function F ′ ₁ (p) of the output voltage V ₂ with respect to the input voltage V ₁ of the passive network 10 ′ of FIG. 10 is, as described above,
The value of the coefficient b _'1 above (8) of the function F ₁ (p) to match those changed to 0.95. Therefore, this function F ′ ₁ (p)
The amplitude characteristic determined by the function F ₁ (p) is slightly different from the amplitude characteristic determined by the function F ₁ (p), but they can be regarded as approximately equal to each other, and the circuit realized by the embodiment shown in FIG. Even if the network 10 'is used as the first basic circuit 10, the object of the present invention can be achieved and the same effect can be obtained. According to the present invention, the signal processing circuit 100 shown in FIG. 1 and the signal shown in FIG. 6 are caused by a slight difference between the two functions F ′ ₁ (p) and F ₁ (p). The mismatch with the processing circuit 50 can be reduced by the approximation by the above Bessel polynomial.

That is, in contrast to the emphasis circuit constructed by using the circuit network 10 'of FIG. 9 in the first basic circuit 10 of the signal processing circuit 100 of FIG. 1, the signal processing circuit of FIG.
The transfer functions H ₁ (p) (Equation (22)) based on the Bessel polynomial X (p) of Eq. (21) are applied to the 50 networks 30a and 30b.
'By complementarily using the de-emphasis circuit constructed using the above two functions F' passive network 30 of the FIG. 9 with a slight 1 and _(p) F ₁ (p) The difference is corrected by the function H ₁ (p) of the above formula (22), and as a result, the above formula (20) can be almost satisfied, and therefore, amplitude distortion and phase distortion do not occur, or even if they occur, they are slight and practically problematic. It is possible to realize a transmission system that does not meet the requirement.

〔The invention's effect〕

As described above, according to the present invention, a signal to be transmitted or to be recorded / reproduced is converted into a signal having a linear phase characteristic and a desired amplitude characteristic, and in particular, a phase characteristic linear signal for amplitude emphasizing a high frequency band of the signal is used. The relatively simple structure of the pre-emphasis circuit and the de-emphasis circuit which has characteristics opposite to the amplitude characteristics thereof, has linear phase characteristics and can be sufficiently matched with the above pre-emphasis circuit over a wide frequency range. Can be achieved with. Also, these can be easily constituted by digital circuits, the accuracy and stability of signal processing can be improved, and the integration of circuits can be facilitated. Also, if this is applied to an FM transmission system, it is possible to obtain a large amount of frequency deviation without widening the transmission band,
In addition, there is no need for a waveform clipping means to prevent overmodulation, and S / N can be improved without waveform distortion.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a signal processing circuit of the present invention, FIG. 2 is a block diagram showing an embodiment of a first basic circuit constituting the signal processing circuit, and FIG. 3 is the signal processing. A block diagram showing an embodiment of a second basic circuit that constitutes the circuit,
FIG. 4 is a characteristic diagram showing the amplitude characteristic of the signal processing circuit, and FIG.
FIG. 6 is a waveform diagram showing a response waveform of the signal processing circuit, FIG. 6 is a block diagram showing another embodiment of the signal processing circuit of the present invention,
FIG. 7 is a connection diagram showing an embodiment of a third basic circuit constituting the signal processing circuit, FIG. 8 is a characteristic diagram showing amplitude characteristics of the signal processing circuit, and FIG. 9 is a diagram showing the third basic circuit. FIG. 10 is a connection diagram showing another embodiment, and FIG. 10 is a connection diagram showing another embodiment of the first basic circuit. 50, 100 ... Signal processing circuit, 10 ... First basic circuit, 20 ... Second basic circuit, 30 ... Third basic circuit, 200,300 ... Time axis conversion circuit.

Claims (7)

(57) [Claims] 1. An apparatus for converting an input signal into a signal having a predetermined frequency characteristic, wherein ω is an angular frequency of the input signal, T is a constant having a unit of time, P is a plurality of frequencies (P = jωT), and K is −1, a first circuit and a second circuit having a common input terminal and having a common input terminal, and a circuit for adding the outputs of these first and second circuits, wherein the first circuit is within the signal pass band. Has a linear phase characteristic and an amplitude characteristic approximated by a function exp (p ² ) and the second circuit has a linear phase characteristic and an all-pass amplitude characteristic (amplitude characteristic 1 Equivalent to) and outputs the outputs of these first and second circuits to a predetermined ratio K: 1.
A signal processing device, characterized in that the addition is performed by. 2. A signal processed with a transfer characteristic having a linear phase characteristic and an amplitude characteristic approximated by a function of 1 / [1 + K · exp (p ² )], where K is a positive constant, The signal processing device according to claim 1, further comprising means for inputting to the first and second circuits. 3. The n-th degree polynomial of a plurality of frequencies P, wherein an is a positive coefficient in the first circuit. The above exponential function is approximated by using exp (p ² ) = [1 + Xn (p)] · [1 / Xn (−p)], and is equivalent to the function 1 / [Xn (p)] ² obtained by this The signal processing apparatus according to claim 1, further comprising a filter circuit having a transfer function that controls 4. The n-th order Bessel polynomial of complex frequency P, wherein Cn is a positive coefficient. The signal processing device according to claim 1, further comprising a filter circuit having a transfer function of 1 / [Bn (p)] ² using 5. The signal processing apparatus according to claim 1, wherein the first circuit includes a phase equalization circuit configured by cascading one or more stages of secondary all-pass network. 6. An apparatus for converting an input signal into a signal having a predetermined frequency characteristic, wherein ω is an angular frequency of the input signal, T is a constant having a unit of time, P is a plurality of frequencies (P = jωT), and K is A polynomial of degree n of complex frequency P, with a constant greater than -1 and an positive coefficient The exponential function is approximated by using exp (p ² ) = [1 / Xn (p)] · [1 / Xn (−p)], and K + Xn (p) · Xn (−p) = Yn ( p) · Yn (-p) satisfying n-th order polynomial of complex frequency P And a first circuit having a transfer function corresponding to Xn (p) / Yn (p), and first time axis conversion means for inversely converting the time series for each unit cycle of the input signal, Second time axis conversion means for supplying the output from the first time axis conversion means to the first circuit and inversely converting the time series for each unit cycle of the output signal from the first circuit; And a third circuit having the same transfer function as the first circuit, and the second circuit and the third circuit are connected in cascade. A signal processing device characterized by the above. 7. An apparatus for converting an input signal into a signal having a predetermined frequency characteristic, wherein ω is an angular frequency of the input signal, T is a constant having a unit of time, P is a plurality of frequencies (P = jωT), and K is A Bessel polynomial of degree n of complex frequency P, where Cn is a positive coefficient and Cn is a positive coefficient. By using K + Bn (p) · Bn (−p) = Zn (p) · Zn (−p) And a first circuit having a transfer function corresponding to Bn (p) / Zn (p), and first time axis conversion means for inversely converting the time series for each unit cycle of the input signal. Second time axis conversion means for supplying the output from the first time axis conversion means to the first circuit and inversely converting the time series for each unit cycle of the output signal from the first circuit; And a third circuit having the same transfer function as the first circuit, and the second circuit and the third circuit are connected in cascade. A signal processing device characterized by the above.