JP2507624B2 - Phase synchronization method for digital color demodulation - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention is based on the ratio of the color demodulation output during the burst period of the color carrier in the composite signal of the color television system etc. The present invention relates to a phase synchronization method for digital color demodulation, which detects a phase difference from a local color carrier generated in 1 and corrects the phase of the local color carrier.

[Conventional technology]

Conventionally, color demodulation of a color television signal has been mainly performed by analog processing, but digital processing is being applied because it can be adjusted and hardly deteriorates with age. This movement is expected to accelerate due to the digitization of communication networks such as ISDN, the development of digital TV / VTR, and the progress of digital LSI technology.

When digitizing an NTSC color television signal, the sampling clock is four times the color carrier frequency of 3.579545MHz because of the simplicity of the color demodulation process.
It is generally set to Hz. However, it was internationally standardized as an encoding parameter for digital television for studios.
CCIR Rec.601 defines the sampling clock as 13.5 MHz.

FIG. 6 shows a configuration example of a conventional digital color demodulation circuit when the sampling clock is not four times the color carrier frequency as described above. In the figure, a is an input terminal of an analog composite signal, 1 is a sampling clock generation circuit, 2 is an A / D converter, 3 is Y for separating a luminance signal (Y) and a chrominance signal (C) modulated carrier wave. / C separation circuit, b is a luminance signal (Y) output terminal, 4 and 5 are multiplication circuits, 6 and 7 are digital low-pass filters, and c and d are color demodulation output terminals of color signals C1 and C2, 8 Is a phase synchronization circuit, 81 is a burst signal period extraction circuit, 82 is a phase difference detection circuit, 83 is a phase correction circuit, 84 is a local color carrier generation circuit, and 9 is a color demodulation circuit.

The sampling clock generation circuit 1 generates a sampling clock frequency-locked to the color carrier burst signal during the synchronizing signal period of the signal input from the input terminal a, and the analog clock input from the input terminal a in the A / D converter 2 The composite signal is sampled by the sampling clock output from the sampling clock generation circuit 1 and converted into a digital composite signal. In the Y / C separation circuit 3, the digital composite signal output from the A / D converter 2 is subjected to a luminance signal (Y) and a color signal (C) by a bandpass filter or a comb filter that passes the band of the chrominance modulated carrier. It is separated into a modulated carrier wave, a luminance signal (Y) is output from the output terminal b, and a chrominance signal (C) modulated carrier wave is output to a color demodulation circuit 9 described later. Color demodulation circuit 9
The operation of will be described. Y / in multiplication circuits 4 and 5
The color signal (C) modulated carrier wave input from the C separation circuit 3 and the first and second local color carrier waves input from the local color carrier wave generation circuit 84, which will be described later, are respectively multiplied, and digital low-pass filters 6 and 7 are used. Only the required color signal band is taken out from the outputs of the multiplication circuits 4 and 5, and output to the output terminals c and d as color demodulation outputs of the color signals C1 and C2. In the phase synchronization circuit 8, first, in the burst signal period extraction circuit 81, the color demodulation circuit output C1 is output line by line only during the burst signal period.
And C2 are extracted, and the phase difference detection circuit 82 is calculated from the ratio C2 / C1.
At, the phase difference between the color carrier and the local color carrier is obtained, and the difference from the determined phase difference is calculated as the phase correction amount. The phase correction circuit 83 advances or delays the phases of the first and second local color carrier waves by the amount of phase correction input from the phase difference detection circuit 82, thereby generating a color part color carrier wave generation circuit.
At 84, first and second local color carrier waves having a phase difference determined at the same frequency as the color carrier wave are generated based on the phase corrected by the phase correction circuit 83.

Next, the color demodulation circuit outputs C1 and C2 during the burst signal period
From here, the principle of the phase synchronization method for digital color demodulation for obtaining the phase correction amount φ for the local color carrier will be described.

First, it is assumed that the waveform A of the first local color carrier is represented by the following equation.

A = sin ωt (where ω = 2π × Fsc (Fsc is the frequency of the color carrier)) Furthermore, since the waveform B of the second local color carrier has a phase difference of 90 degrees from the first local color carrier, Shall be represented by.

B = cosωt On the other hand, the waveform C of the input burst signal is represented by C = M · sin (ωt + θ), where the amplitude is M and the phase is shifted by θ with respect to the first local color carrier. It In this case, the first and second multiplication circuits 4 and 5
Outputs C1 'and C2' are C1 '= AxC = M * sin ωt * sin (ωt + θ) = {cosθ * (1-cos2ωt) + (sinθ * sin2ωt)}
M / 2 C2 ′ = B × C = M · cosωt · sin (ωt + θ) = {cosθ · sin2ωt + sinθ · (1-cos2ωt)} M / 2. By passing this through the first and second digital low-pass filters 6 and 7, the terms of cos2ωt and sin2ωt become zero, so the color demodulation circuit outputs C1 and C2 are C1 = (cosθ) M / 2C2 = (Sin θ) · M / 2. Here, when the ratio of the color demodulation circuit outputs C1 and C2 is calculated, it is expressed by C2 / C1 = sin θ / cos θ = tan θ, and conversely, the phase difference θ is θ = tan ^-1 (C2 / C1)… ... (1) However, the phase difference θ obtained from equation (1)
Is -90 degrees ≤ θ ≤ +90 degrees. Therefore, when +180 degrees ≧ θ> +90 degrees or −90 degrees> θ ≧ −180 degrees, that is, C1 <0, the actual phase difference is the value obtained by adding or subtracting 180 degrees to the equation (1).

In the NTSC system, it is necessary to perform phase correction so that the phase difference between the burst signal and the first local color carrier is 180 degrees, so if -90 degrees ≤ θ ≤ +90 degrees, that is, C1 ≥ 0, the first local color The phase correction amount φ for the carrier wave is expressed by the following equation in which 180 degrees is added or subtracted.

φ = θ ± π (2) In addition, if +180 degrees ≧ θ> +90 degrees or −90 degrees> θ ≧ −180 degrees, that is, C1 <0, the phase correction amount φ is as shown in equation (3). It becomes the phase difference θ itself obtained by the equation (1).

φ = θ (3) In the following description, the phase correction will be performed by taking the case of the NTSC system in which the phase difference between the burst signal and the first local color carrier is 180 degrees. Therefore, the phase difference detection circuit 82 (1)
Since the phase correction amount φ is obtained by performing the calculation of (3) to (3), the phase correction amount φ is given to the phase correction circuit 83 to correct the phase of the first and second local color carrier waves by φ. Therefore, phase synchronization between the color carrier and the local color carrier is established, and highly accurate color demodulation is possible.

Two examples of flow charts of the phase correction operation in such a conventional phase synchronization system for digital color demodulation are shown in FIGS. 7 and 9. In FIG. 7, after a burst signal period is extracted in a certain line, θ is calculated, and if C1 ≧ 0 is YES, φ = θ + 180 degrees of phase correction is performed. If NO, the phase is corrected by φ = θ.

In another example shown in FIG. 9, the burst signal period is extracted in a certain line, and in the case of −90 ° <θ <+ 90 °, that is, C1> 0, φ is set in that line for the time being.
= 180 degree phase correction, and in the next line inevitably +180 degree ≧ θ> +90 degree or −90 degree> θ ≧ −180 degree, that is, C1 <0, so φ = θ phase correction is performed. When C1 = 0, θ is either −90 degrees to +90 degrees, so if C2 is positive, −90 degrees phase correction is performed, and if C2 is negative, +90 degrees phase correction is performed. To do. In the case of FIG. 9, compared with FIG. 7, there is a drawback that a phase correction that requires two lines occurs, but there is an advantage that the addition operation of (θ + 180) is not required.

8 and 10 show examples of the structure of the phase difference detection circuit for realizing the phase correction operation of FIGS. 7 and 9, respectively. In FIG. 8, 820 and 822 are ROMs, 821 is a multiplier, 823 is an adder, 824 is a comparator, and 825 is a switch circuit. The same reference numerals as those in FIG. 6 are omitted.

The operation of FIG. 8 will be described below. From the color demodulation circuit outputs C1 and C2, only the burst signal period is first extracted by the burst signal period extraction circuit 81 and input to the phase difference detection circuit 82. The extracted color demodulation circuit output C1 is converted to an inverse number in the ROM 820 and output, and the extracted color demodulation circuit output
C2 is input to the multiplier 821 together with 1 / C1. The output C2 / C1 of the multiplier 821 is input as the address of the ROM822, and the phase difference of θ = tan ^-1 (C2 / C1) is output as the amount of phase correction for the generated phase of the local color carrier. This phase correction amount is
It becomes one input of the switch circuit 825 and the other input of the switch circuit 825 after 180 degrees is added by the adder 823. On the other hand, the extracted color demodulation circuit output C1 is input to the comparator 824, which outputs “0” if it is positive and is zero or more, and outputs “1” if it is negative. When the output of the comparator 824 is “1”, the switch circuit 825 outputs +180 degrees ≧ θ> +90 degrees or −90 degrees> θ ≧ −180 degrees, and therefore outputs the output of the ROM 822 as it is as the phase correction amount φ. When the output of the comparator 824 is “0”, −90 degrees ≦ θ ≦ + 90 degrees, so the output of the adder 823 is output as the phase correction amount φ. Therefore, the phase correction converges line by line.

In FIG. 10, 826 and 827 are switch circuits, and 828.
Is a comparator, and the explanation of the same symbols as those in FIG. 8 is omitted.
The operation of FIG. 10 is selected by the switch circuits 825 to 827 when the output of the comparator 824 is “0”, that is, −90 degrees ≦ θ ≦ + 90 degrees.
The procedure is the same as in FIG. 8 except that the phase correction is performed at any one of degrees, -90 degrees, and +90 degrees. In the comparator 828, 180 degrees is selected when C1 ≠ 0, and the output of the switch circuit 827 is selected when C1 = 0. C1 = 0 and C2 <
When 0, +90 degrees is selected, and when C1 = 0 and C2 ≧ 0, −9
0 degree is selected. Therefore, if -90 degrees ≤ θ ≤ +90 degrees in a certain line, unless a new phase difference occurs until the next line, it is always +180 degrees ≥ θ> +90 degrees or -90 degrees> θ ≥-in the next line. It becomes 180 degrees and the phase correction converges.

[Problems to be Solved by the Invention]

In such a conventional phase-locked circuit for digital color demodulation, the operation of the expression (1) is generally performed by the ROM table reference method. However, if -90 degrees ≤ θ ≤ +90 degrees, then -∞ ≤ (C2 / C1) ≤ ∞, and as the phase difference detection accuracy increases, the number of ROM address bits increases, so that a large capacity ROM is used. There are drawbacks that need it. For example, when the phase difference detection unit is set to about 1 degree and the phase difference calculation range is set to -90 degrees to +90 degrees, the outside of the range of -89.5 degrees to +89.5 degrees is either from -90 degrees to +90 degrees. All right. Also, the phase difference is -0.5 degrees to +
If it is 0.5 degree, it can be regarded as 0 degree. Therefore, tan (± 89.5 degrees) and tan
It is enough to handle the range of (± 0.5 degrees). tan (89.5
The degree is 114.5859 ... in decimal number, and 01110010.100 ... in 2's complement display that shows positive / negative, and requires 8 bits after the decimal point. tan (0.5 degree) is 0.007 in decimal
8 ..., 0.0000001 ... in 2's complement display, requiring 7 bits below the decimal point. The ROM address input bit requires 15 bits, and the data output bit requires 8 bits if the phase difference ± 90 degrees is expressed in two's complement in units of 1 degree, so the ROM capacity requires about 262 Kbits. To do. In addition to such a large capacity ROM, it is difficult to integrate a color demodulation circuit including a separation circuit for a luminance signal and a color signal into one chip by the conventional phase synchronization method. On the other hand, in FM modulators,
Although there is a method to detect the phase difference from the ROM output from only one demodulation output, it has a drawback that the circuit becomes complicated because it requires the AGC function to keep the input amplitude of the color bust constant. Also, as shown in the following equation, the two demodulation outputs are
Once the logarithmic conversion is done using the table, the small difference can be
There is a method to detect the phase difference by using the ROM table, but in addition to the need for two logarithmic conversion ROM tables and a ROM table for phase difference calculation, there is a drawback that the ROM capacity cannot be significantly reduced even if the phase difference calculation range is narrowed. is there.

θ = tan ⁻¹ {log ⁻¹ (log C2−log C1)} (4) The object of the present invention is to eliminate such drawbacks.
By limiting the range of the phase difference that can be detected for each line from the outputs of the two color demodulation circuits during the burst signal period,
An object of the present invention is to provide a phase synchronization method for digital color demodulation that can significantly reduce the phase difference calculation ROM capacity without impairing the phase synchronization accuracy.

[Means for solving the problem]

FIG. 1 shows the principle configuration of the present invention. In the figure, a is an analog composite signal input terminal, 1 is a sampling clock generating circuit, 2 is an A / D converter, and 3 is Y / for separating a luminance signal (Y) and a chrominance signal (C) modulated carrier wave. C separation circuit, b is output terminal of luminance signal (Y), 4 and 5 are multiplication circuits, 6
And 7 are digital low-pass filters, c and d are color signals
C1 and C2 color demodulation output terminals, 8 phase synchronization circuit, 81 burst signal period extraction circuit, 82 'phase difference detection circuit with limiter, 83 phase correction circuit, 84 local color carrier generation circuit, 9 This is a color demodulation circuit.

The configuration shown in FIG. 1 differs from the conventional configuration shown in FIG. 6 in that instead of the phase difference detection circuit 82 shown in FIG.
The point is that a phase difference detection circuit 82 'with a limiter is used. The basic operation is the same as that shown in FIG. 6, but in the phase difference detection circuit 82 'with a limiter shown in FIG. 1, the value of the ratio C2 / C1 of the color signals is -1 to +1. It is configured to calculate θ = tan ^-1 (C2 / C1) only in the range of.

[Work]

Since the operation is substantially the same as the case shown in FIG. 6, the description will not be repeated, but in the phase difference detection circuit 82 'with the limiter, the value of the ratio C2 / C1 of the color signals is -1.
In the case of taking the range from 1 to +1, θ = tan ⁻¹ (C1 / C2) is extracted.

〔Example〕

2 and 4 respectively show the phase difference calculation range of -45 degrees using the phase difference detection circuit with limiter in the present invention.
An example of a flow chart of the phase correction operation when limited to +45 degrees is shown. Further, FIGS. 3 and 5 show a configuration example of a phase difference detection circuit with a limiter for realizing the phase correction operation in the cases of FIGS. 2 and 4, respectively. FIG. 2 and its corresponding FIG. 3, and FIG. 4 and its corresponding FIG. 5 correspond to FIG. 7 and its corresponding FIG. 8, and FIG. 9 and its corresponding FIG. , To limit the phase difference calculation range from -45 degrees to +45 degrees, set the value of C2 / C1 to -1 to +
A limiter that limits to 1 is newly inserted,
The other phase correction operation and the phase synchronization circuit configuration are the same.

In FIG. 3, 829 is a limiter, and the explanation of the same symbols as in FIG. 8 is omitted. The operation of the configuration shown in FIG. 3 will be described below. From the color demodulation circuit outputs C1 and C2, only the burst signal period is first extracted by the burst signal period extraction circuit 81 and input to the phase difference detection circuit 82 '. The extracted color demodulation circuit output C1 is converted into the reciprocal in the ROM 820 and output, and the extracted color demodulation circuit output C2 is multiplied by 1 / C1 together with the multiplier.
Entered in 821. The output C2 / C1 of the multiplier 821 is the limiter 8
After being limited to the range of -1 to +1 by 29, it is input as the address of ROM822, and the phase difference of θ = tan ^-1 (C2 / C1) is output as the phase correction amount for the generated phase of the local color carrier. This phase correction amount becomes one input of the switch circuit 825, and also becomes the other input of the switch circuit 825 after adding 180 degrees by the adder 823. On the other hand, the extracted color demodulation circuit output C1 is input to the comparator 824, and outputs “0” if it is positive and is zero or more, and outputs “1” if it is negative. In the switch circuit 825, the output of the comparator 824 is "1".
In the case of, since +180 degrees ≧ θ> +90 degrees or −90 degrees> θ ≧ −180 degrees, the output of ROM822 is directly output as the phase correction amount φ, and when the output of the comparator 824 is “0”, Since −90 degrees ≦ θ ≦ + 90 degrees, the output of the adder 823 is output as the phase correction amount φ. For example, if the phase difference of a certain line is 80 degrees, the phase correction amount φ of that line is limited to 45 degrees, so that even if no new phase difference occurs until the next line, 35 degrees will be output as the phase correction amount φ. Therefore, it takes a maximum of 2 before the phase correction converges.
Will need a line.

The circuit symbols in FIG. 5 are the same as those in FIG. 3 and FIG. The operation of the configuration shown in FIG. 5 is selected by the switch circuits 825 to 827 when the output of the comparison range 824 is “0”, that is, −90 degrees ≦ θ ≦ + 90 degrees.
Degree, -90 degree, or +90 degree phase correction,
This is the same as the case of the configuration shown in FIG. In the comparator 828, 180 degrees is selected when C1 ≠ 0, and the output of the switch circuit 827 is selected when C1 = 0. When C1 = 0 and C2 <0, +90 degrees is selected and C1 = 0
If C2 ≧ 0, then −90 degrees is selected. Therefore, if -90 degrees ≤ θ ≤ +90 degrees in a certain line, unless a new phase difference occurs until the next line, it is always +180 degrees ≥ θ> +90 degrees or -90 degrees> θ ≥-in the next line. It will be 180 degrees.

The reason why there is no problem even if the range of the phase difference that can be detected for each line is limited in this way is as follows.

When the power of a television or video conference / telephone device having a digital color demodulation circuit is turned on, or when the input signal source such as a camera is switched, the phase correction convergence time increases by several line hours until the phase difference converges to zero. There is no problem in practice.

Once the phase correction has converged once, the simplified form with a lot of jitter
Even in the VTR reproduction output, there is little phase variation of the color carrier for each line.

Therefore, the smaller the ROM phase difference calculation range, the more C2 / C1
Since and θ are linear, the ROM capacity can be significantly reduced. For example, if the phase difference detection unit is 1 degree and the phase difference calculation range is limited to the range from −45 degrees to +45 degrees, the range outside −44.5 degrees to +44.5 degrees is either −45 degrees to +45 degrees. All right. Therefore, tan (± 44.5 degrees) and tan (± 0.5 degrees) are used as the phase difference calculation ROM address input.
It is enough to handle the range of. tan (44.5 degrees) is 0.984 in decimal, and is 0.1 in 2's complement display that displays positive and negative.
111110 ... and only needs one bit above the decimal point. The ROM address input bit requires 8 bits including the decimal point, and the data output bit requires 7 bits if the phase difference +45 degrees is expressed in 2's complement in units of 1 degree, so the ROM capacity is approximately It only requires 1.8Kbit. This ROM capacity is greatly reduced to about 1/146 compared to the conventional phase synchronization method.

〔The invention's effect〕

As described above, by limiting the range of the ratio C2 / C1 of the color demodulation circuit outputs extracted during the burst signal period, the phase difference calculation ROM capacity can be significantly reduced without impairing the phase synchronization accuracy. There is.

In addition, there is also an advantage that the entire digital color demodulation circuit including the phase difference calculation ROM can be integrated into one chip by greatly reducing the capacity of the phase difference calculation ROM.

Note that the phase difference calculation range is limited to −45 degrees to +45 degrees for convenience of explanation, but may be limited to any value if it is narrower than −90 degrees to +90 degrees. The smaller the phase difference calculation range, the more the capacity of the phase difference calculation ROM can be reduced, but the number of lines required for the phase correction to converge increases. In the case of NTSC signals as a color television system, the sampling clock was set to 13.5 MHz and the color carrier frequency was set to 3.579545 MHz, but it is clear that it can be applied to other color television systems, and the modulation system is If similar, it can be applied to demodulation of other video signals that may appear in the future such as color FAX.

[Brief description of drawings]

FIG. 1 is a block diagram of the principle of the present invention, FIGS. 2 and 4 are flow charts when a phase difference detection circuit with a limiter is used in the present invention, and FIGS. 3 and 5 are FIG. 2 and FIG. A configuration example of a phase difference detection circuit with a limiter corresponding to FIG. 4, FIG. 6 is a configuration example of a conventional digital color demodulation circuit, FIGS. 7 and 9 are flowcharts in the conventional case, FIG. 8 and FIG. Fig. 10 shows Fig. 7 and 9 respectively.
The structural example of the phase difference detection circuit corresponding to the figure is shown. a: Analog composite signal input terminal b: Digital luminance signal (Y) output terminal c, d: Chromatic signal demodulation circuit output C1, C2 output terminal 1: Sampling clock generation circuit 2: A / D Converter 3 …… Y / C separation circuit 4,5 …… Multiplier 6,7 …… Digital low-pass filter 8 …… Phase synchronization circuit 9 …… Color demodulation circuit 81 …… Burst signal period extraction circuit 82 …… Phase difference Detection circuit 83 …… Phase correction circuit 84 …… Local color carrier generation circuit 820,822 …… ROM 821 …… Multiplier 823 …… Adder 824,828 …… Comparator 825,826,827 …… Switch circuit 829 …… Limiter

Claims (1)

(57) [Claims] 1. A ratio of two color signal components output from a color demodulation circuit during a burst signal period of a color carrier is obtained, and a color carrier on the image sending side and a local color carrier on the image receiving side are obtained from the value of the ratio. The phase synchronization method for digital color demodulation that establishes the phase synchronization between the color carrier and the local color carrier by detecting the phase wave of the When calculating the value of the ratio from the ratio of the two color signal components output from the color demodulation circuit during the burst signal period of, the phase difference calculation range between the color carrier and the local color carrier is set to -90 degrees. Digital color demodulation characterized by limiting from a large first limit value to a second limit value less than +90 degrees and correcting only the phase difference obtained by calculation with respect to the generated phase of the local color carrier For phase synchronization .