JP2810424B2 - Color subcarrier recovery circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a color subcarrier reproduction circuit for reproducing a color subcarrier used for synchronous detection when separating a color difference signal from a digitized color television signal. An extraction circuit that extracts a color burst from a digitized color television signal, and generates an initial value of a sine wave synchronized with the color burst extracted by the extraction circuit and a sign of a cosine wave corresponding to the extraction circuit. A generation circuit, a selection circuit for selecting and outputting one of a sine wave and a cosine wave code or a reproduced sine wave and a cosine wave code, and generating the sine wave based on the sine wave and the cosine wave code selected by the selection circuit. A conversion circuit for converting to a cosine wave, a cosine wave generation circuit for generating a cosine wave at the next sampling point based on the selected sine wave and the cosine wave from the conversion circuit,
And a sine wave generation circuit for generating a sine wave at the next sampling point based on the selected sine wave and the cosine wave from the conversion circuit, and the sine wave and cosine wave generation circuit reproduced by the sine wave generation circuit And the cosine code reproduced in step (1) are input to the selection circuit.

The present invention relates to a separation circuit for separating a luminance signal and a chrominance signal from a digitized color television signal using a sampling clock which is not an integral multiple of a chrominance subcarrier frequency (f _sc = 3.58 MHz), for example. The present invention relates to a chrominance subcarrier reproduction circuit for reproducing a chrominance subcarrier necessary for periodic detection of a carrier chrominance signal.

At present, digitization of color television signals is being promoted, and CCIR (International Radio Advisory Committee) is working toward international standardization.
Recommends a sampling clock of 13.5 MHz that can be commonly used for the two current television systems (NITS and PAL). However, since the frequency of 13.5 MHz is not an integral multiple of the color subcarrier (about 3.579 MHz), the color subcarrier (sine wave phase-synchronized with the color burst and A chrominance subcarrier recovery circuit that generates a cosine wave whose phase is delayed by π / 2
It cannot be realized with a simple circuit configuration, but has to be configured with a complicated digital circuit, thus increasing the circuit scale. For this reason, it is necessary to reduce the hardware scale of such a color subcarrier reproduction circuit.

[Prior Art] FIG. 5 shows a conventional example of a luminance signal / color difference signal separation circuit. In the figure, 61 is a clamp circuit, 62 is a phase locked oscillator (PLO: Phase Locked Oscillator), 63 is an A / D converter, 64 is a delay unit, 65 is a comb filter, 66 is an initial value calculation unit, and 67 is a sine wave・ Cosine wave generator, 68, 69 are multipliers, 70 ~
73 is a low-pass filter.

An analog NTSC color television signal (hereinafter abbreviated as NTSC signal) a is clamped by a clamp circuit 61 to reproduce a DC component, and at the same time, a horizontal synchronizing signal b is detected from the NTSC signal a. This horizontal synchronizing signal b is input to a phase synchronizing oscillator 62 having a center oscillation frequency of 13.5 MHz, where a sampling clock c having a frequency of 13.5 MHz synchronized with the horizontal synchronizing signal b is generated. The sampling clock c is input to the A / D converter 63, and the NTSC output from the clamp circuit 61
Used as the sampling clock for the signal, thereby
The converter 63 outputs a digitized NTSC signal d.
The 13.5 MHz sampling clock c is also used as an operation timing clock for each part of the separation circuit.

Digital NTSC signal d output from A / D converter 63
Is input to the comb filter 65 after being given a fixed time adjustment delay by the delay unit 64.

FIG. 6 shows an example of the configuration of the comb filter 65.
As shown, a one-line delay circuit 651, a bandpass filter 652,
It is composed of subtractors 653, 654 and the like. Comb filter 66
Separates the NTSC signal d into a luminance component signal g and a carrier chrominance signal h and outputs them. This luminance component signal g is supplied to the low-pass filter 70.
And is output as a luminance signal Y. Comb filter
In the digital NTSC signal d input to 65, the phase of the color subcarrier is inverted between the horizontal scanning lines. Therefore, the NTSC signal d and the NTSC signal obtained by delaying the NTSC signal by one line by the delay circuit 651 are subtracted by the subtractor 653. Then, the color sub-carrier component is extracted by band-limiting with the band-pass filter 652 to obtain the next carrier chrominance signal h.

h = (B−Y) sin (ωt) + (R−Y) cos (ωt) The aforementioned luminance signal component g is obtained by subtracting the NTSC signal d and the carrier color difference signal h by the subtractor 654.

To obtain the color difference signals (BY) and (RY) from the carrier color difference signal h output from the comb filter 65, the color reproduced by the initial value calculation unit 66 and the sine wave / cosine wave generation unit 67 The carrier chrominance signal h is synchronously detected by the multipliers 68 and 69 using the sub-carriers i and j, and the detection outputs k and l are respectively subjected to low-pass filters 71 and 72.
You can pass it through. Here, the initial value calculation unit 66 and the sine wave / cosine wave generation unit 67 constitute a color sub-carrier reproduction circuit.

An output i from the sine wave / cosine wave generation unit 67 is a normalized sine wave si phase-synchronized with a color burst (color synchronization signal).
The output j is a component of the cosine wave cos (ωt) shifted by 90 degrees from the component of the sin (ωt). In order to generate sin (ωt) and cos (ωt), the initial values Sn ₁ and Cn ₁ are obtained by the initial value calculation unit 6 from the color burst portion in the digital NTSC signal from the A / D converter 63. As output signals e and f, respectively.
7 and the above-mentioned sin (ωt) and cos
By generating the aforementioned output signals i and j which are components of (ωt). Note that the delay of the delay unit 64 functions to delay the NTSC signal d by the calculation time of the initial value calculation unit 66.

The above-described initial value calculation unit 66 and sine wave / cosine wave generation unit 67
FIG. 7 shows an example of the conventional configuration. Here, the initial value calculation unit 66 extracts a color burst from the digital NTSC signal d, and based on the color burst, a normalized sine wave / cosine wave generation unit 67 in a subsequent stage normalizes the color subcarrier necessary for automatic reproduction. color subcarrier of the sine wave and the initial value Sn ₁ of (phase components synchronizing color burst), the same is to generate a cosine wave Cn ₁ phase-shifted [pi / 2.

That is, the DC component is removed from the color burst of the digital NTSC signal d by the bandpass filter 81, and the detector 82
By extracting a sample signals S ₁ and S ₂ of the two successive sampling points t1, t2 near the center portion of the color burst. Based on the sample signals S ₁ and S ₂ , the sine wave initial value Sn ₁ of the color subcarrier normalized by the following procedure is obtained. First, the amplitude A of the color burst is obtained by the following equation.

Here, φ is a phase angle between two sampling points.

The operation of this equation (1) is performed by a subtracter 83, a × cosφ operation unit 84,
This is executed by a circuit including the × 1 / sinφ arithmetic unit 85, the squarers 86 and 87, the adder 88, and the square root arithmetic unit 89, and the square root arithmetic unit 89 outputs the amplitude value A.

Next, the amplitude value A from the square root calculator 89 is normalized by the maximum value B that can be represented by the number of output bits (for example, when the number of output bits is 8 bits, B = 128). That is, the normalized value Sn ₁ = S ₁ · B / A is obtained. This is to calculate a B / A value in a B / A calculator 90 based on the amplitude value A,
In can be done by multiplying the sample value S _1, the sine wave Sn ₁ normalized is obtained from the multiplier 91. The sine wave Sn ₁ is sent as an output e to the sine / cosine wave generator 67 and is also input to the sine / cosine converter 93. further,
The cosine wave code detection circuit 92 determines the code _{1 of the} cosine wave based on the sample values S ₁ , S ₂ and the amplitude value A, and inputs this to the converter 93.

The sine wave / cosine wave converter 93 converts the normalized sine wave Sn ₁ and the cosine wave Cn normalized based on the cosine wave sign bit _1.
1 is calculated and output to the sine wave / cosine wave generation unit 67 as an output f. The above-described processing is periodically performed for each line to which a color burst is input.

Based on the initial values Sn ₁ and Cn ₁ input from the initial value calculation unit 66, the sine wave / cosine wave generation unit 67 generates a normalized sine wave {Sn _k } for the remaining one line by the following recurrence formula. Cosine wave ｛C
_nk } data are sequentially generated and output. In other words, the sine wave Sn _k and cosine wave Cn _k a K-th sample data, when the Sn _k-1 and Cn _k-1 a (K-1) th sample data, Sn _k and Cn _k are, Sn _{k = Sn k-1 · cosφ +} Cn k-1 · sinφ ··· (2) is calculated by _{Cn k = Cn k-1 ·} cosφ-Sn k-1 · sinφ ··· (3). The operations of the equations (2) and (3) are executed by multipliers 97 to 100 for multiplying by constants sinφ and cosφ, and an adder 101 and a subtracter 102 for adding and subtracting the multiplication result.

The operation of the sine / cosine wave generating section 67 is as follows. When the calculated initial value 66 calculates the initial values Sn ₁ and Cn ₁ from the color burst and inputs the calculated values to the generating section 67, the selectors 93 and 94 enter the input terminals (I )
To select the output e, f side, and thereby adder 1
01 and the data Sn ₂ of the next sample point t2 to the output of the subtractor 102.
To generate a Cn _2. After inputting the initial values, the selectors 93 and 94 are switched to the input (II) side to generate the generated data Sn ₂ and Cn ₂
Is returned to the input side of the generator 67, and the following (2) and (3)
Sequentially to generate data Sn _k and Cn _k according to the equation. As a result, the sine wave / cosine wave generator automatically generates a sine wave {Sn _k } and a cosine wave {Cn _k } for one line automatically based on the initial values Sn ₁ and Cn _1. .

[Problems to be Solved by the Invention] The conventional sine wave / cosine wave generation unit has a problem that the circuit scale becomes too large.

For example, the multipliers 97 to 101, the adder 101, the subtractor 102, etc.
OM, but in that case, each multiplier
Since separate ROMs need to be prepared for each of the adders 97 to 101, the adder 101, and the subtractor 102, the circuit scale increases and the power consumption also increases. Therefore, in order to reduce the number of ROMs, for example, the multipliers 97 and 99 and the adder 101 are connected to one R
An OM may be used, but in this case, the address input to the ROM is a parallel input of data Sn _k and CN _k , and the number of address bits becomes very large. Realization is difficult. Since the number of bits of the input signal handled by the sine / cosine wave generation circuit is large,
There is a problem that the circuit scale becomes large.

Therefore, an object of the present invention is to provide a chrominance subcarrier reproduction circuit which can be constituted by small-scale hardware.

[Means for Solving the Problems] FIG. 1 is an explanatory view of the principle according to the present invention.

The color sub-carrier reproduction circuit according to the present invention includes an extraction circuit 201 for extracting a color burst from a digitized color television signal, and an initial value of a sine wave phase-synchronized with the color burst extracted by the extraction circuit 201 and corresponding to the initial value. A generation circuit 202 that generates a sign of a cosine wave, a selection circuit 203 that selects and outputs one of a sine wave initial value and a cosine wave code, or a reproduced sine wave and a cosine wave code, selected by the selection circuit 203 A conversion circuit 204 that converts the sine wave into a cosine wave based on the sine wave and the cosine wave sign, and generates a cosine wave at the next sampling point based on the selected sine wave and the cosine wave from the conversion circuit 204 Circuit 205, and selected sine wave and conversion circuit 2
A sine wave generating circuit 206 for generating a sine wave at the next sampling point based on the cosine wave from 04; a sine wave reproduced by the sine wave generating circuit 206 and a cosine reproduced by the cosine wave generating circuit 205 The wave code is input to the selection circuit 203.

[Operation] A color burst is extracted from a digital color television signal, and the center of the color burst is sampled to generate a color burst.
Generates the initial value of the sine wave and the corresponding cosine wave code. The selection circuit 203 selects and outputs the sine wave initial value and the cosine wave code from the generation circuit 202, for example, once every horizontal scanning line. The conversion circuit 204 calculates and outputs a cosine wave based on these signals. Accordingly, the cosine wave generation circuit 205 and the sine wave generation circuit 206 calculate and output the values of the sine wave and the cosine wave at the next sample point, respectively. Of these outputs, the sine wave output of the sine wave generation circuit 206 and the cosine wave code output of the cosine wave generation circuit 205 are returned to the input side of the reproduction circuit via the selection circuit 203 to form an inner loop. As a result, the sine wave and the cosine wave are sequentially calculated based on the initial value and are continuously generated.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

The chrominance subcarrier recovery circuit according to one embodiment of the present invention
Shown in the figure. In FIG. 2, reference numeral 1 denotes an initial value setting unit, which generates a normalized sine wave initial value Sn ₁ synchronized with a phase of a color burst and a sign _{1 of the} cosine wave initial value Cn ₁ to generate one of the selectors 2. To the input terminal (I). The other input terminal of the selector 2 (II), the sign bit _k of the sinusoidal Sn _k and cosine wave Cn _k reproduced by the color subcarrier regeneration circuit
The selector 2 selects an input signal on either side, outputs the selected sine wave Sn and cosine wave code to the sine wave / cosine wave conversion unit 3, and converts the sine wave Sn into a cosine wave. It is configured to output to the generator 4 and the sine wave generator 5, respectively.

Sine wave / cosine wave conversion unit 3 input signal Sn _k, based on the _k is configured to convert a sine wave Sn _k to the cosine wave Cn _k, the cosine wave Cn _k that the converted cosine wave generator 4 Output to the sine wave generator 5 respectively.

Cosine wave generator 4 input signal Sn _k, a circuit for generating the cosine wave Cn _{k + 1} of the next sample point on the basis of the Cn _k, likewise, the sine wave generation section 5 the input signal Sn _k, Cn _This is a circuit that calculates and generates a sine wave Sn _{k + 1} based on _k . The sign bit _{k + 1} of the sine wave Sn _{k + 1} from the sine wave generator 5 and the cosine wave Cn _{k + 1} from the cosine wave generator 4 are returned to the input side of the selector 2 to form an internal loop. It has become.

FIG. 3 shows a configuration example of the initial value setting unit 1 in the circuit of the embodiment. The initial setting unit 1 is a circuit having substantially the same configuration as the initial value calculating unit 66 described in the above-described conventional example.
In the figure, reference numeral 10 denotes a register which functions as a detector for detecting two consecutive sample values S ₁ and S ₂ . Subtractor 11, × co
A circuit composed of the sφ arithmetic unit 12, the × 1 / sin φ arithmetic unit 13, the squarers 14, 15, the adder 16, and the square root arithmetic unit 17 is a circuit for executing the above-described equation (1).

The multiplier 18 and the divider 19 normalize the sample value S ₁ with the maximum value B that can be represented by the number of output bits.
The multiplier 18 outputs the B · S ₁ by multiplying the B sample value S _1, the divider 19 by dividing the output B · S ₁ with an amplitude A from a square root calculator 17, the normalized The sine wave Sn ₁ is output. Further, the comparator 20 determines the sign ₁ of the cosine wave Cn ₁ by comparing the sample values S ₁ and S ₂ and outputs the sign.

Compared with the conventional initial value calculation unit, the initial value setting unit 1 does not include the sine wave / cosine wave converter 93. Therefore, the signal output to the subsequent selector 2 is a sine wave Sn ₁ and a cosine wave signal C. Becomes ₁ .

FIG. 4 shows a detailed configuration example of the sine / cosine wave converter 3, the cosine wave generator 4, and the sine wave generator 5 in the circuit of the embodiment. The sine wave / cosine wave converter 3 is a square calculator 30,
The square calculator 30 includes a subtractor 31, a square root calculator 32, and a delay circuit 33. The square calculator 30 outputs the sine wave Sn output from the selector 2.
performs squaring of _k, the subtracter 31 performs an operation to reduce the square output Sn _k ² from B ^2, square-root calculator 32 thereof subtracter (B ² -
Calculate the square root of Sn _k ² ). As a result, the square root
32 the absolute value of the cosine wave Cn _k for Sinusoidal Sn _k the normalized from | Cn _k | is obtained and output. That is, Is output. This sign bit _k output from the selector 2 is outputted appended to the cosine wave Cn _k via the delay circuit 33 to. Here, the delay circuit 33 is for correcting a signal delay in each of the arithmetic units 33 to 32.

Cosine wave generator 4 multipliers 35 and 36, is constituted by the subtractor 39, the multiplier 35 multiplies the coefficient cosφ to the cosine wave Cn _k, multiplier 36
Is multiplied by a coefficient sinφ sinusoidal Sn _k, subtractor 39 is configured to determine a difference between them multiplication results, thereby running the aforementioned (3), the following equation sample points cosine wave Cn _{k + 1}
Is generated and output. In exactly the same manner, the sine wave generator 5 is configured by multipliers 37 and 38 and an adder 40, and generates the sine wave Sn _{k + 1} by executing the above-mentioned equation (2).

 Hereinafter, the operation of the circuit of this embodiment will be described.

In the initial setting section, the input digital NTSC signal d
Based on signals S ₁ and S ₂ at two consecutive sample points near the center of the color burst of the (or carrier color difference signal h), a normalized sine wave initial value Sn ₁ phase-synchronized with the color burst
And the sign _{1 of the} cosine wave.

That is, the amplitude A of the color burst is obtained by executing the above-described equation (1) by the circuits 11 to 17, and then, using the obtained amplitude A and the maximum value B that can be represented by the number of output bits,
Normalized sample values S ₁ in Number of Circuits 18 and 19 determine the sine wave Sn ₁ by the following equation.

Sn ₁ = S ₁ · B / A Next, the phase relationship between the sample values S ₁ and S ₂ is compared by the comparator 20, thereby obtaining the sign ₁ of the cosine wave Cn ₁ corresponding to the sample value S ₁ . And the sine wave Sn obtained as described above
₁ and the cosine wave code ₁ are sent to the selector 2.

The selector 2 takes in the signal Sn ₁ , ₁ from the initial value setting unit 1 as an initial value only once per line, and then switches to the signals Sn _k , _k from the generating units 4 and 5 to execute the inner loop. The switching operation is performed so as to form.

Sine wave / cosine wave conversion unit 3 generates a cosine wave Cn _k based on the sine wave Sn _k and the cosine wave code C _k transmitted from the selector 2. That is, the absolute value of the cosine wave Cn _k running (4) of the aforementioned circuits 30 to 32 | Cn _k | look, which generates a cosine wave Cn _k by adding the cosine wave code _k on.

Cosine wave generator 4 on the basis of the sine wave Sn _k and cosine wave Cn perform the above (3), the following equation sample points cosine wave Cn _{k + 1}
Execute Similarly, the sine wave generator 5 generates a sine wave Sn _{k + 1} based on the equation (2). And these sine waves S
The n _{k + 1} and the cosine code C _{k + 1} are fed back to the input terminal (II) of the selector 2.

Various modifications are possible in implementing the present invention. In the above-described embodiment, each circuit as a component has been described as being constituted by a dedicated hardware circuit. However, it is possible to further reduce the circuit scale by constituting these circuits with a ROM.

That is, the sine / cosine wave converter 3 and the cosine wave generator 4 or the sine / cosine wave converter 3 and the sine wave generator 5
Is a circuit in which the output is uniquely determined for each of the input signals Sn _k and _k , and this can be realized by a ROM. Therefore, these circuits are combined into two RO
Realized by M. In this case, since the total number of bits of the input signal is not large, a ROM having a small capacity can be used.

The initial value setting unit 1 can also be constituted by a ROM. In this case, since the initial value setting unit 1 operates only once per line, an EPROM is used, while the cosine wave and sine wave generation units 4 and 5 are used. Can be implemented using RROM.

[Effects of the Invention] According to the present invention, the total number of bits of a signal input to a circuit portion that generates a sine wave and a cosine wave can be reduced. The size of the wear can be reduced. Also ROM circuit
By doing so, the delay in the arithmetic circuit can be reduced, and a margin can be provided.

[Brief description of the drawings]

FIG. 1 is an explanatory view of the principle according to the present invention, FIG. 2 is a block diagram showing a color subcarrier transmitting / reproducing circuit as one embodiment of the present invention, and FIG. FIG. 4 is a block diagram showing a detailed configuration of a value setting unit. FIG.
FIG. 5 is a block diagram showing a detailed configuration of a cosine wave conversion unit, a cosine wave generation unit, and a sine wave generation unit. FIG. 5 is a block diagram showing a conventional example of a luminance signal / color difference signal separation circuit. FIG. 6 is a configuration of a comb filter. FIG. 7 is a block diagram showing an example of a conventional configuration of a chrominance subcarrier reproducing circuit. In the figure, 1... Initial value setting section 2... Selector 3... Sine wave / cosine wave generating section 4... Cosine wave generating section 5... Sine wave generating section 10. … Subtractors 12, 84… × cos φ calculators 13, 85… × 1 / sin φ calculators 14, 15, 86, 87… Squares 16, 40, 101… Adders 17, 32, 89… Square root calculator 18, 35-38, 68, 69, 97-101 Multiplier 1 19 Divider 20 Comparator 30 Square calculator 33, 34, 64 Delay circuit 61 Clamp Circuit 62 Phase-locked oscillator 63 A / D converter 65 Comb filter 66 Initial value calculator 67 Sine / cosine wave generator 70 to 72 Low-pass filter

Claims (1)

(57) [Claims] An extraction circuit (201) for extracting a color burst from a digitized color television signal, an initial value of a sine wave phase-synchronized with the color burst extracted by the extraction circuit (201), and a cosine corresponding thereto. A generation circuit (202) for generating a sign of a wave; and a selection circuit (20) for selecting and outputting one of the sine wave initial value and the cosine wave code or the reproduced sine wave and cosine wave code.
3) a conversion circuit (20) for converting the sine wave into a cosine wave based on the sine wave and the cosine wave code selected by the selection circuit (203);
4) a cosine wave generation circuit (205) for generating a cosine wave at a next sampling point based on the selected sine wave and the cosine wave from the conversion circuit (204); A sine wave generation circuit (206) for generating a sine wave at the next sampling point based on the cosine wave from the conversion circuit (204), wherein the sine wave reproduced by the sine wave generation circuit (206) and the sine wave A chrominance subcarrier reproduction circuit configured to input the cosine code reproduced by the cosine wave generation circuit (205) and the cosine code to the selection circuit (203).