JP2505272B2 - Video signal playback device - Google Patents
Video signal playback deviceInfo
- Publication number
- JP2505272B2 JP2505272B2 JP1024345A JP2434589A JP2505272B2 JP 2505272 B2 JP2505272 B2 JP 2505272B2 JP 1024345 A JP1024345 A JP 1024345A JP 2434589 A JP2434589 A JP 2434589A JP 2505272 B2 JP2505272 B2 JP 2505272B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- video
- field
- video signal
- reproduced
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Television Signal Processing For Recording (AREA)
Description
【発明の詳細な説明】 (産業上の利用分野) この発明は、ヘルカルスキヤン方式のビデオテープレ
コーダ(以下、「VTR」という)に関し、詳しくは、再
生画質の改善を図つたVTRに関する。Description: TECHNICAL FIELD The present invention relates to a Herkarskian video tape recorder (hereinafter referred to as “VTR”), and more particularly to a VTR for improving reproduction image quality.
第5図は対向するヘツドを持たない単独のビデオヘツ
ド(以下「単独のヘツド」という)が装着された回転ド
ラムの平面図、第6図は従来のビデオ信号再生系のブロ
ツク回路図である。FIG. 5 is a plan view of a rotary drum having a single video head (hereinafter referred to as "single head") having no opposing head, and FIG. 6 is a block circuit diagram of a conventional video signal reproducing system.
第5図において、(1)は回転ドラム、(21)は単独
のヘツド、(2)は磁気テープである。In FIG. 5, (1) is a rotary drum, (21) is a single head, and (2) is a magnetic tape.
第6図において、(11)は回転トランス、(12)は増
幅器、(13)はヘツド(21)で再生された再生FM信号、
(18)は切換信号(17)によつて制御される信号切換
器、(20)は復調器、(44)はビデオ信号の同期信号の
先端レベルを一定値に固定するクランプ回路、(24)は
A/D変換器、(26)はA/D変換器(24)によつてデイジタ
ル値化された信号を記憶する記憶素子、(31)は記憶素
子(26)への書き込みおよび読み出し制御を行なう記憶
素子制御回路、(33)は記憶素子(26)から読み出され
たデイジタル信号をアナログ値化するD/A変換器、(3
4)はアナログ値化された再生ビデオ信号である。In FIG. 6, (11) is a rotary transformer, (12) is an amplifier, (13) is a reproduced FM signal reproduced by a head (21),
(18) is a signal switcher controlled by the switching signal (17), (20) is a demodulator, (44) is a clamp circuit for fixing the tip level of the synchronizing signal of the video signal to a constant value, (24) Is
An A / D converter, (26) a storage element that stores the signal digitized by the A / D converter (24), and (31) controls writing to and reading from the storage element (26). A storage element control circuit, (33) is a D / A converter for converting the digital signal read from the storage element (26) into an analog value, (3
4) is a reproduced video signal converted into an analog value.
次に動作について説明する。第6図において、ヘツド
(21)で再生され、増幅器(12)で増幅され、信号切換
器(18)で切換えられた再生FM信号(19)は、復調器
(20)でビデオ信号(43)に復調され、クランプ回路
(44)で同期信号の先端が所定値にクランプされて、A/
D変換器(24)に入力され、A/D変換器(24)によつてデ
ジタル値化されたビデオ信号(25)は、記憶素子(26)
に入力される。Next, the operation will be described. In FIG. 6, the reproduced FM signal (19) reproduced by the head (21), amplified by the amplifier (12) and switched by the signal switch (18) is reproduced by the demodulator (20) as the video signal (43). The signal is demodulated by the clamp circuit (44) and the tip of the sync signal is clamped to a specified value by the A /
The video signal (25) input to the D converter (24) and digitized by the A / D converter (24) is stored in the storage element (26).
Is input to
記憶素子制御回路(31)は、第7図に示すビデオ信号
(25)の有信号フイールドの始点WRから書き込み動作を
始め、有信号フイールド内では、書き込むとともに読み
出す動作がサンプリング周期で繰り返される。つづい
て、無信号フイールドの始点RRから、記憶素子(26)に
書き込まれている直前の有信号フイールドのビデオ信号
が読出される。この記憶素子(26)から読出されたビデ
オ信号(32)はD/A変換器(33)によつてアナログ値化
され、再生ビデオ信号(34)(第7図(c)図示、水平
同期信号のみ示す)となる。The memory element control circuit (31) starts the write operation from the starting point WR of the signal signal field of the video signal (25) shown in FIG. 7, and the writing and reading operations are repeated in the sampling cycle within the signal signal field. Then, from the starting point RR of the non-signal field, the video signal of the signal field immediately before being written in the storage element (26) is read. The video signal (32) read out from the storage element (26) is converted into an analog value by the D / A converter (33), and the reproduced video signal (34) (shown in FIG. 7 (c), horizontal synchronization signal). Only shown).
従来の装置は以上のように構成され、無信号フィール
ドの始点から直前の有信号フィールドのビデオ信号がそ
のまま読み出されるため、再生ビデオ信号がインターレ
ースする信号である場合には、無信号フイールドと有信
号フイールドの切換り点で水平同期信号の周期が第7図
(c)に示すように1.5Hとなり、水平同期信号の連続性
が損なわれるため、1フイールド毎にスキユーを発生し
てしまう等の問題点があつた。The conventional device is configured as described above, and since the video signal of the signal field immediately before the start point of the no signal field is read as it is, when the reproduced video signal is an interlaced signal, the no signal field and the signal At the switching point of the field, the period of the horizontal sync signal becomes 1.5H as shown in Fig. 7 (c), and the continuity of the horizontal sync signal is impaired, so that there is a problem that a skew is generated for each field. There was a point.
この発明は上記のような問題点を解消するためになさ
れたものでスキユーのない安定した画質で再生できる単
独の回転ヘツドを用いた磁気記録再生装置を得ることを
目的としている。The present invention has been made to solve the above problems, and an object of the present invention is to obtain a magnetic recording / reproducing apparatus using a single rotating head capable of reproducing a stable image quality without skew.
この発明に係る、映像信号再生装置は、有信号フイー
ルドにおける記憶素子へのビデオ信号の書き込みおよび
これと同時に行う読み出しを、有信号フイールドの水平
同期信号に同期して行い、これにつづく無信号フイール
ドにおける記憶素子からのビデオ信号の読み出しを、直
前の有信号フィールドの最後の水平同期信号から1H後の
時点で開始するように制御する手段を備えた点を特徴と
する。A video signal reproducing device according to the present invention writes a video signal to a storage element in a signal signal field and reads the video signal simultaneously with the video signal in synchronization with a horizontal synchronizing signal of the signal signal field, followed by a non-signal field. It is characterized in that it is provided with a means for controlling the reading of the video signal from the storage element in 1) so as to start at 1H after the last horizontal synchronizing signal of the immediately preceding signal field.
この発明における、記憶素子からの読み出制御手段
は、有信号フイールドと無信号フイールドの切換り点に
おいて、直前の有信号フィールドの最後の水平同期信号
から1H後の時点で読み出し動作を開始するようにしてい
るため、有信号フイールドと無信号フイールドの切換わ
り点でも水平同期信号の連続性が保たれ、同期乱れのな
い、安定した再生画像を得ることが出来る。In the present invention, the read control means from the storage element starts the read operation 1H after the last horizontal synchronizing signal of the immediately preceding signal field at the switching point between the signal field and the no signal field. Therefore, the continuity of the horizontal synchronizing signal is maintained even at the switching point of the signal field and the non-signal field, and a stable reproduced image without synchronization disturbance can be obtained.
以下、この発明の一実施例を第1図ないし第4図を用
いて説明する。An embodiment of the present invention will be described below with reference to FIGS.
第1図において、第5図および第6図の従来例と同一
符号は同一部分を示しており、(21a),(21b)は第2
図に示すように、単独のヘツド(21)とは別に回転ドラ
ム(1)に180゜の相対向する位置に配設された1対の
ビデオヘツド(以下、「ヘツド」という)(11a),(1
1b)は回転トランス、(12a),(12b)は増幅器、(1
4)は切換信号(16)によつて切換制御される第2の信
号切換器、(29)は第1の同期分離回路、(35)は読み
出し制御回路、(37)は記憶素子(26)の書き込み制御
回路、(46)は第2のクランプ回路、(48)は第2の同
期分離回路である。In FIG. 1, the same reference numerals as those in the conventional example of FIGS. 5 and 6 indicate the same parts, and (21a) and (21b) are the second parts.
As shown in the figure, apart from a single head (21), a pair of video heads (hereinafter referred to as "heads") (11a) are arranged on the rotary drum (1) at 180 ° opposite positions. (1
1b) is a rotary transformer, (12a) and (12b) are amplifiers, (1
4) is a second signal switcher which is switch-controlled by a switching signal (16), (29) is a first sync separation circuit, (35) is a read control circuit, and (37) is a storage element (26). Write control circuit, (46) is a second clamp circuit, and (48) is a second sync separation circuit.
次に動作について説明する。第1図において、単独ヘ
ツド(21)で再生され、増幅器(12)で増幅された再生
FM信号(13)(第3図(d)図示)は信号切換器(18)
に入力される。Next, the operation will be described. In Fig. 1, regenerated by a single head (21) and amplified by an amplifier (12).
The FM signal (13) (shown in Fig. 3 (d)) is the signal switch (18)
Is input to
また、ヘツド(21a),(21b)で再生され、増幅器
(12a),(12b)で増幅された再生FM信号(13a),(1
3b)は、信号切換器(14)で切換信号(16)(第3図
(a)図示)によつて切換えられて再生FM信号(15)
(第3図(c)図示)となり信号切換器(18)に入力さ
れる。信号切換器(18)は、切換信号(17)(第3図
(b)図示)によつて切換えられ、再生FM信号(13)の
無信号フイールドに、同時に再生された再生FM信号(1
5)が挿入された再生FM信号(19)(第3図(e)図
示)が出力される。この再生FM信号(19)は、復調器
(20)によつてビデオ信号(43)(第3図(f)図示)
に復調され、更に、クランプ回路(44)に入力されて同
期信号の先端レベルが所定の値に固定される。Also, reproduced FM signals (13a), (1) reproduced by the heads (21a), (21b) and amplified by the amplifiers (12a), (12b).
3b) is switched by the switching signal (16) (shown in FIG. 3 (a)) in the signal switching device (14) to reproduce the FM signal (15).
(Shown in FIG. 3 (c)) is input to the signal switch (18). The signal switching device (18) is switched by the switching signal (17) (shown in FIG. 3 (b)), and the reproduced FM signal (1) reproduced at the same time is reproduced in the no-signal field of the reproduced FM signal (13).
The reproduced FM signal (19) (shown in FIG. 3 (e)) in which 5) is inserted is output. The reproduced FM signal (19) is converted into a video signal (43) by the demodulator (20) (shown in FIG. 3 (f)).
Demodulated, and further input to the clamp circuit (44) to fix the tip level of the synchronizing signal to a predetermined value.
この場合、再生ビデオ信号(43)は、連続した信号で
あるので、クランプ回路(44)を通過してもサグは発生
しない。In this case, since the reproduced video signal (43) is a continuous signal, sag does not occur even if it passes through the clamp circuit (44).
つぎにクランプされたビデオ信号(45)は、同期分離
回路(29)およびA/D変換器(24)に入力され、同期分
離回路(29)で分離された同期信号(30)が書込み制御
回路(37)へ入力され、A/D変換器(24)でデジタル値
化されたビデオ信号(25)は記憶素子(26)へ入力され
る。Next, the clamped video signal (45) is input to the sync separation circuit (29) and the A / D converter (24), and the sync signal (30) separated by the sync separation circuit (29) is written into the write control circuit. The video signal (25) inputted to the (37) and digitized by the A / D converter (24) is inputted to the storage element (26).
書込み制御回路(37)は切換信号(17)(第4図
(a)図示)によつて再生FM信号(13)の有信号フイー
ルドと無信号フイールドとを判別し、第4図に示すよう
に、有信号フイールドとなつた後の、最初の水平同期信
号(50)に同期して、第4図に示すWR点から記憶素子
(26)への書込みを開始し、この書き込み/読み出し期
間(W/R)は、サンプリング周期で書込みと読出しが繰
り返される。The write control circuit (37) discriminates the signaled field and the non-signaled field of the reproduced FM signal (13) by the switching signal (17) (shown in FIG. 4 (a)), and as shown in FIG. , The writing to the storage element (26) is started from the WR point shown in FIG. 4 in synchronization with the first horizontal synchronizing signal (50) after the signal field is reached, and this writing / reading period (W For / R), writing and reading are repeated in the sampling cycle.
つぎに記憶素子(26)から読み出されたビデオ信号
(32)はD/A変換器(33)によつてアナログ値化されて
ビデオ信号(34)となりクランプ回路(46)によつて同
期信号の先端レベルが所定の値に固定され、クランプさ
れたビデオ信号(47)から同期分離回路(48)で分離さ
れた同期信号(49)が読出し制御回路(35)へ入力され
る。読出し開始制御回路(35)は、切換信号(17)によ
つて有信号フイールドと無信号フイールドを判別し、有
信号フイールドから無信号フイールドへ切換つたとき、
直前の有信号フイールドの最後の水平同期信号(第4図
LH点)から1H後の時点(第4図RR点)から記憶素子(2
6)に記憶されている前フイールドのデータの読出しを
開始し、この読み出し期間Rは読出しを行なう。Next, the video signal (32) read from the storage element (26) is converted into an analog value by the D / A converter (33) and becomes a video signal (34), which is then synchronized by the clamp circuit (46). The leading edge level is fixed to a predetermined value, and the sync signal (49) separated by the sync separation circuit (48) from the clamped video signal (47) is input to the read control circuit (35). The read start control circuit (35) discriminates the signaled signal field and the signalless field from the switching signal (17), and when switching from the signaled field to the signalless field,
The last horizontal sync signal of the signal field immediately before (Fig. 4
From the point 1H after LH point (RR point in Fig. 4), the storage element (2
The reading of the previous field data stored in 6) is started, and the reading is performed during this reading period R.
以上の様な書込み、読出し制御によつて得られたビデ
オ信号(34)は、ビデオ信号(43)が、インターレース
信号であるかノンインターレース信号であるかにかかわ
らず有信号フイールドと無信号フイールドの境界におい
ても水平同期信号の1Hの連続性が確保された第4図
(c)のビデオ信号となる。The video signal (34) obtained by the above write / read control has a signal field and a non-signal field regardless of whether the video signal (43) is an interlaced signal or a non-interlaced signal. The video signal shown in FIG. 4 (c) has the 1H continuity of the horizontal synchronization signal even at the boundary.
以上のように、この発明によれば、無信号フイールド
を有信号フイールドのビデオ信号で補間した境界におい
て、直前の有信号フィールドの最後の水平同期信号から
1H後の時点で、記憶素子に書き込まれたビデオ信号の読
み出し動作を開始するように構成したので、同期の乱れ
ない安定した再生画像を得ることが出来る効果がある。As described above, according to the present invention, at the boundary where the no-signal field is interpolated by the video signal of the signal field, from the last horizontal synchronizing signal of the immediately preceding signal field.
Since it is configured to start the reading operation of the video signal written in the storage element at the time point after 1H, there is an effect that a stable reproduced image without disturbance of synchronization can be obtained.
第1図はこの発明の一実施例のブロツク回路図、第2図
はこの実施例の回転ドラムのヘツド配置を示す平面図、
第3図はこの実施例の各部の波形図、第4図はこの実施
例の記憶素子における書き込みおよび読み出しタイミン
グの説明図、第5図は従来の回転ドラムの平面図、第6
図は従来のビデオ信号再生系の回路図、第7図はこの従
来例の記憶素子における書き込み、読み出しタイミング
の説明図である。 (1)……回転ドラム、(14),(18)……信号切換回
路、(20)……復調器、(21)……独立のヘツド、(21
a),(21b)……1対のヘツド、(24)……A/D変換
器、(26)……記憶素子、(29),(48)……同期分離
回路、(33)……D/A変換器、(35)……読出制御回
路、(37)……書込制御回路、(44),(46)……クラ
ンプ回路。 なお、各図中、同一符号は同一、または相当部分を示
す。FIG. 1 is a block circuit diagram of an embodiment of the present invention, and FIG. 2 is a plan view showing a head arrangement of a rotary drum of this embodiment.
FIG. 3 is a waveform diagram of each part of this embodiment, FIG. 4 is an explanatory view of writing and reading timings in the storage element of this embodiment, FIG. 5 is a plan view of a conventional rotary drum, and FIG.
FIG. 7 is a circuit diagram of a conventional video signal reproducing system, and FIG. 7 is an explanatory diagram of writing and reading timings in the storage element of this conventional example. (1) ... Rotary drum, (14), (18) ... Signal switching circuit, (20) ... Demodulator, (21) ... Independent head, (21)
a), (21b) ... a pair of heads, (24) ... A / D converter, (26) ... storage element, (29), (48) ... sync separation circuit, (33) ... D / A converter, (35) ... Read control circuit, (37) ... Write control circuit, (44), (46) ... Clamp circuit. In each figure, the same reference numerals indicate the same or corresponding parts.
Claims (1)
と、これとは別の少なくとも一対のビデオヘッドとを有
し、上記独立のヘッドで再生した信号を無信号フィール
ドに補完して連続したビデオ信号に再生する映像信号再
生装置であって、上記独立のヘッドで再生したFM再生信
号の無信号フィールド期間に、上記一対のヘッドで再生
されたFM再生信号を挿入する手段と、この挿入されて連
続したFM再生信号を復調し、この復調された再生ビデオ
信号から、同期信号を分離する手段と、この分離された
同期信号に同期して上記再生ビデオ信号のうち上記単独
のヘッドで再生されたビデオ信号を記憶素子に書き込む
動作およびこの書き込んだビデオ信号を同時に読み出す
動作を行う手段と、有信号フィールドから無信号フィー
ルドへの切り替わり時に、直前の有信号フィールドの最
後の水平同期信号から1H後の時点で、上記記憶素子に書
き込まれたビデオ信号の読み出し動作を開始する手段と
を備えた映像信号再生装置。1. A continuous video having one video head independent of a rotary drum and at least a pair of video heads other than the video head, the signal reproduced by the independent head being complemented to a non-signal field. A video signal reproducing device for reproducing a signal, the means for inserting the FM reproduction signal reproduced by the pair of heads in the no-signal field period of the FM reproduction signal reproduced by the independent head, and the insertion means. A means for demodulating a continuous FM reproduction signal and separating a sync signal from the demodulated reproduction video signal, and a part of the reproduction video signal reproduced by the single head in synchronization with the separated sync signal. Means for performing an operation of writing a video signal to a memory element and an operation of simultaneously reading out the written video signal, and switching from a signal field to a non-signal field To, at a later time 1H from the last horizontal synchronizing signal of the signal present field of the immediately preceding video signal reproducing apparatus that includes a means for initiating a read operation of the written video signal in the storage element.
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1024345A JP2505272B2 (en) | 1989-02-01 | 1989-02-01 | Video signal playback device |
US07/459,307 US5179477A (en) | 1989-01-21 | 1989-12-29 | Video tape recorder |
DE4001533A DE4001533A1 (en) | 1989-01-21 | 1990-01-19 | VIDEO RECORDER |
GB9001410A GB2228645B (en) | 1989-01-21 | 1990-01-22 | Video tape recorder. |
GB9314710A GB2267011B (en) | 1989-01-21 | 1993-07-14 | Video tape recorder |
US08/209,491 US5486955A (en) | 1989-01-21 | 1994-03-14 | Video tape recorder in which a video signal to be displayed is produced by utilizing a single main magnetic head |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1024345A JP2505272B2 (en) | 1989-02-01 | 1989-02-01 | Video signal playback device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH02203686A JPH02203686A (en) | 1990-08-13 |
JP2505272B2 true JP2505272B2 (en) | 1996-06-05 |
Family
ID=12135602
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1024345A Expired - Lifetime JP2505272B2 (en) | 1989-01-21 | 1989-02-01 | Video signal playback device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2505272B2 (en) |
-
1989
- 1989-02-01 JP JP1024345A patent/JP2505272B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH02203686A (en) | 1990-08-13 |
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