JP2501789B2 - Control circuit for electrical equipment - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a control circuit of an electric device using a MOS field effect transistor (FET) as a switching element such as a speed control circuit of a motor or a switching regulator.

(Prior Art) Conventionally, a MOS type field effect transistor is provided in a control circuit that controls switching of electric devices and the like.
Such a conventional control circuit is shown in FIG. In FIG. 6, the FET control circuit 81 applies a control signal to the gate of the MOS field effect transistor Q1 to cause the transistor Q1 to perform a switching operation, and when the transistor Q1 is on, the output of the power supply V1 is applied to the load L. ing. The diode Df is a directional diode formed on the chip of the transistor Q1.

When such a field effect transistor is used as a switching element, the temperature of the transistor rises due to the output loss of the transistor. When such a temperature rise occurs, the allowable output of the field effect transistor is reduced. Therefore, if a large current flows where the temperature of the field effect transistor is increased, there is a risk that the output loss may be exceeded and the transistor may be destroyed.

In order to prevent such transistor breakdown, conventionally, a thermoswitch or the like is used to interrupt the current flowing through the field effect transistor when the temperature rises excessively.

However, in this case, since the thermoswitch can detect only the ambient temperature of the field effect transistor, there is a difference between the chip temperature of the transistor and the ambient temperature, and it is impossible to accurately detect the chip temperature of the transistor. Have difficulty. Therefore, in such a thermoswitch, it is difficult to surely prevent the breakdown of the transistor.

(Object of the Invention) The present invention has been made in view of the above conventional problems, and accurately detects a temperature rise of a chip of a MOS field effect transistor, and allows the transistor to be released before the transistor is destroyed due to over allowable output loss. Cut off the current flowing through
It is an object of the present invention to provide a control circuit for an electric device that can prevent a transistor from being destroyed.

(Structure of the Invention) The present invention relates to an electric device in which a MOS field effect transistor is periodically turned on and off as a switching element and an output is given to a load via the MOS field effect transistor during the on period. In the control circuit, the MOS
Detecting means for detecting a voltage change of an element having a predetermined temperature-voltage characteristic formed in a chip of the MOS field effect transistor, and a reverse bias to the MOS field effect transistor during an off period of the MOS field effect transistor. A bias means for applying a forward bias to the element having the predetermined temperature-voltage characteristic by applying a voltage, and when the output of the voltage detecting means exceeds a set value during the off period,
And a cutoff circuit for controlling the cutoff of the MOS field effect transistor.

With this configuration, the MOS field effect transistor gives an output to the load during the ON period of switching and gradually heats up. Therefore, the voltage detecting means generates the MOS type field effect transistor while the MOS field effect transistor is OFF. By the forward bias applied to the element having a predetermined temperature-voltage characteristic formed in the chip of the field effect transistor, the change in the voltage generated in the element having the predetermined temperature characteristic is detected, and the cutoff circuit is Since the MOS field effect transistor is cut off when the detected voltage output exceeds the set value, the MOS field effect transistor cuts off the current before the allowable output loss is exceeded.

In addition, the present invention provides the MOS field effect transistor in order to prevent electrostatic breakdown between the gate and the source of the MOS field effect transistor.
Detecting means for detecting a voltage change of a Zener diode having a predetermined temperature-voltage characteristic formed on a chip of a field effect transistor, and a bias for applying a forward bias to the Zener diode during an off period of the MOS field effect transistor. And a shutoff circuit for shutting off the MOS field effect transistor when the output of the voltage detection means exceeds a set value during the off period. According to this configuration, the Zener diode allows the MO
It is possible to prevent electrostatic breakdown between the gate and the source of the S-type field effect transistor, and to prevent the occurrence of the allowable output loss of the transistor due to the temperature rise.

(Embodiment) FIG. 1 is an electric circuit diagram showing the configuration of the first embodiment of the present invention, and FIGS. 2 (a), (b) and (c) are the structure of a MOS type field effect transistor, an equivalent circuit and It is a figure which shows the voltage dependence of internal capacity.

First, referring to FIGS. 2 (a), (b), and (c), the MOS field effect transistor will be described.
Is a gate, S is a source, Cds is an internal capacitance between the drain D and the source S, Cgd is an internal capacitance between the gate G and the drain D, Cgs is an internal capacitance between the gate G and the source S, Rd is a drain resistance, and Rg is It is a gate resistance. 21 is an n ⁺ layer, 22 is an n ^- epitaxial layer, 23 is a p ⁺ layer, 26 is an n ⁺ layer, 24 is an aluminum (Al) electrode, 25 is a silicon oxide film (SiO ₂ ), and a p ⁺ layer
A Pn junction is formed between 23 and the n ⁻ epitaxial layer 22 to form a diode Df having a drain D, an anode, and a source S as a cathode.

In FIG. 2 (c), the horizontal axis represents the drain-source voltage Vds, and the vertical axis represents the capacitances.

In FIG. 1, the voltage detecting means 1 has a MOS type field effect transistor (hereinafter simply referred to as a transistor) Q ₂ and a diode Dr for passing a load current. The drain of the transistor Q ₂ is the cathode of the diode Dr and the MOS type. It is connected to the connection point with the drain of a field effect transistor (hereinafter simply referred to as transistor) Q ₁ . The gate of the transistor Q ₂ is connected to the output terminal of the inverter 2, and the source thereof is connected to the negative electrode of the power supply V ₂ .

The drain of the transistor Q ₁ is connected to the cathode of the diode Df and the drain of the transistor Q ₂ as described above, and the source thereof is connected to the positive electrode of the power source V ₂ . FET
A power supply V ₁ is applied to the control circuit 3 and its FET control circuit 3
Switches the transistor Q ₁ to power the load L.
Control for giving V ₁ output and voltage detection means 1
The transistor Q ₂ is controlled by the inverter 2.

The detection circuit 4 receives the output of the voltage detection means 1 and detects the forward voltage of the diode Df formed between the drain and source of the transistor Q ₁ , and detects when the forward voltage exceeds a set value. It outputs a signal. The cutoff circuit 5 receives the detection signal and cuts off the transistor Q ₁ .

Next, the operation of the first embodiment will be described. The voltage of the power supply V ₁ is set smaller than the voltage of the power supply V ₂ .

When the power supply V ₁ is turned on, the FET control circuit 3 gives a high-level first ON control signal to the gate of the transistor Q ₁ ,
Switching transistor Q ₁ is operated. Transistor
When Q ₁ turns on, the output from the power supply V ₁ is given to the load L. At this time, the gate of the transistor Q ₂ is supplied with the low-level second off control signal from the inverter 2 whose level is inverted from the level of the first on control signal supplied to the gate of the transistor Q ₁ , and the transistor Q ₂ is Turned off.

Next, the first off control signal of low level for turning off the transistor Q ₁ from the FET control circuit 3 Given to the gate, the transistor Q ₁ is turned off. At this time,
On the one hand, the FET control circuit 3 is
The OFF control signal given second ON control signal of a high level which is level inverted to the gate of the transistor Q _2, turn on the transistor Q _2.

By turning on the transistor Q ₂ in this manner, the voltage of the power supply V ₂ is applied as a reverse bias between the drain and the source of the transistor Q ₁ . At this time, power
Power from V ₂ flows through the diode Df. The detection circuit 4 detects the drain-source voltage of the transistor Q ₁ when it is reverse-biased, that is, the forward voltage of the diode Df, and the voltage exceeds a set value (for example, below the set value). Is output).

Here, the forward voltage characteristic with respect to the temperature of the diode Df has a temperature characteristic of, for example, about −2 mV / ° C. as shown in FIG. 3, and therefore, when the temperature of the transistor Q ₁ rises, the voltage between its drain and source is increased. Vf decreases. When the voltage Vf becomes equal to or lower than the set value, the detection circuit 4 gives a detection signal to the cutoff circuit 5, and the cutoff circuit 5 gives an off signal to the gate of the transistor Q ₁ . As a result, the transistor Q ₁ is forcibly turned off and prevented from being destroyed due to the output loss being exceeded.

FIG. 4 is an electric circuit diagram showing the configuration of the second embodiment of the present invention. In FIG. 4, components corresponding to those shown in FIG. 1 are designated by the same reference numerals.

In FIG. 4, the voltage detecting means 1A is a transistor Q ₂ ,
It has a diode Dr, a zener diode Dz, and an inverter 2. The drain of transistor Q ₂ is a diode
It is connected to the connection point between Dr and the Zener diode Dz, and its gate is connected to the output terminal of the inverter 2. Further, the negative electrode of the power source V ₂ is connected to the source of the transistor Q ₂ . Zener diode Dz is a transistor to prevent electrostatic damage between the gate and source of transistor Q _1.
It is formed on the chip of Q ₁ , and the anode of the power supply V _{1 and} the positive electrode of the power supply V ₂ are connected to its anode, not to the external component. Further, the cathode of the Zener diode Dz is supplied with the first control signal from the FET control circuit 3 via the diode Dr.

The power source V ₁ is connected to the drain of the transistor Q ₁ via the load L.
Is given to the gate of which the first from the FET control circuit 3
A control signal is given. The negative electrode of the power source V _{1 and} the positive electrode of the power source V ₂ are connected to the source of the transistor Q ₁ .
The detection circuit 4 and the cutoff circuit 5 have the same configuration as in FIG.

Next, the operation of the second embodiment will be described. It is assumed that the voltage of the power source V ₁ is smaller than the voltage of the power source V ₂ .

When the power V ₁ is being turned, FET control circuit 3, providing a first control signal at a high level to the gate of the transistor Q _1, to turn on the transistor Q _1. When the transistor Q ₁ is turned on, the output of the power supply V ₁ is given to the load L. On the other hand, this time in the gate of the transistor Q ₂ is, transistor Q ₁
Since the first control signal applied to the gate and the second control signal of a low level from the inverter 2 that level inversion is applied, the transistor Q ₂ is turned off.

Next, the first control signal from the FET control circuit 3 at a low level when applied to the gate of the transistor Q _1, the transistor Q ₁ is turned off. On the other hand, at this time, the transistor Q ₂ is turned on by the high level second control signal from the inverter _2, and the current from the power source V ₂ flows in the forward direction through the Zener diode Dz. Therefore, the forward voltage Vf is generated in the Zener diode Dz, and this voltage Vf is detected by the detection circuit 4.

By the way, since the Zener diode Dz has a temperature characteristic that the forward voltage Vf is about −2 mV / ° C. as shown in FIG. 5, when the temperature of the transistor Q ₁ rises, the forward voltage Vf decreases. . When the forward voltage Vf falls below the set value due to the temperature rise of the transistor Q ₁ , the detection circuit 4
Gives a detection signal to the cutoff circuit 5, whereby the cutoff circuit 5
Forces a low-level off signal to the gate of the transistor Q ₁ . Therefore, the transistor Q ₁ is turned off and the destruction of the transistor Q ₁ is prevented.

(Effects of the Invention) As described above, according to the present invention, a voltage detection means for detecting a voltage change of an element having a predetermined temperature-voltage characteristic formed in a chip of a MOS field effect transistor, and the MO
Bias means for applying a forward bias to the element having the predetermined temperature-voltage characteristic during the off period of the S-type field effect transistor, and the MOS type when the output of the voltage detection means exceeds a set value during the off period. Since it is configured with a cutoff circuit that cuts off the field effect transistor, it is possible to directly detect the rise of the chip temperature of the MOS type field effect transistor, and thereby to accurately detect the rapid temperature rise of the MOS type field effect transistor. This can be detected, and the breakdown of the MOS field effect transistor due to excess loss can be reliably prevented.

In order to prevent electrostatic breakdown between the gate and the source of the MOS field effect transistor, a Zener diode having a predetermined temperature-voltage characteristic is formed on the chip of the MOS field effect transistor, and the voltage change of this Zener diode is prevented. By performing the detection, it is possible to prevent the electrostatic breakdown between the gate and the source of the MOS field effect transistor and prevent the occurrence of the allowable output loss of the transistor due to the temperature rise.

[Brief description of drawings]

FIG. 1 is an electric circuit diagram of a first embodiment according to the control circuit of the present invention, FIG. 2 (a) is a chip configuration diagram of a MOS type field effect transistor, and FIG. 2 (b) is the MOS type field effect transistor. 2C is a graph showing the relationship between the drain-source voltage and the internal capacitance of the MOS field effect transistor, and FIG. 3 is the chip temperature of the MOS field effect transistor and the diode Df. A graph showing the relationship with the forward voltage, FIG. 4 is an electric circuit diagram of the second embodiment of the present invention, and FIG. 5 is a graph showing the relationship between the chip temperature of the MOS field effect transistor and the forward voltage of the Zener diode Dz. The graph shown in FIG. 6 is an electric circuit diagram of a conventional control circuit. 1,1A, 1B …… Voltage detection means, 2 …… Inverter, 3 …… F
ET control circuit, 4 ... Detection circuit, 5 ... Shutoff circuit, Q1 ...
MOS field effect transistor, Df ... Diode, Dz ...
… Zener diode

Claims (3)

(57) [Claims] 1. A control circuit for an electric device, wherein a MOS field effect transistor is periodically turned on and off as a switching element, and an output is given to a load via the MOS field effect transistor during the on period. The MOS
Detecting means for detecting a voltage change of an element having a predetermined temperature-voltage characteristic formed in a chip of the MOS field effect transistor, and a reverse bias to the MOS field effect transistor during an off period of the MOS field effect transistor. A bias means for applying a forward bias to the element having the predetermined temperature-voltage characteristic by applying a voltage, and when the output of the voltage detecting means exceeds a set value during the off period,
A control circuit for an electric device, comprising: a circuit for controlling a MOS field effect transistor. 2. The voltage detecting means is configured to detect the forward voltage of a drain diode between the drain and the source of the MOS field effect transistor. Control circuit for electrical equipment. 3. A control circuit for an electric device, wherein a MOS type field effect transistor is periodically turned on and off as a switching element, and an output is applied to a load via the MOS type field effect transistor during the on period. The MOS
Detecting means for detecting a voltage change of a Zener diode having a predetermined temperature-voltage characteristic formed on a chip of the MOS field effect transistor in order to prevent electrostatic breakdown between the gate and the source of the field effect transistor, MO
Bias means for applying a forward bias to the Zener diode during the off period of the S-type field effect transistor, and cutoff control of the MOS field effect transistor when the output of the voltage detection means exceeds a set value during the off period. A control circuit for an electric device, comprising: a cutoff circuit.