JP2025501976A - 絶縁を有する半導体デバイスパッケージを製造するための方法 - Google Patents
絶縁を有する半導体デバイスパッケージを製造するための方法 Download PDFInfo
- Publication number
- JP2025501976A JP2025501976A JP2024539809A JP2024539809A JP2025501976A JP 2025501976 A JP2025501976 A JP 2025501976A JP 2024539809 A JP2024539809 A JP 2024539809A JP 2024539809 A JP2024539809 A JP 2024539809A JP 2025501976 A JP2025501976 A JP 2025501976A
- Authority
- JP
- Japan
- Prior art keywords
- conductive
- plunger
- slug
- semiconductor device
- high voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R15/00—Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
- G01R15/14—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
- G01R15/20—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices, i.e. measuring a magnetic field via the interaction between a current and a magnetic field, e.g. magneto resistive or Hall effect devices
- G01R15/207—Constructional details independent of the type of device used
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R15/00—Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
- G01R15/14—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
- G01R15/20—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices, i.e. measuring a magnetic field via the interaction between a current and a magnetic field, e.g. magneto resistive or Hall effect devices
- G01R15/202—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices, i.e. measuring a magnetic field via the interaction between a current and a magnetic field, e.g. magneto resistive or Hall effect devices using Hall-effect devices
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/12—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
- G01R31/1227—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
- G01R31/2829—Testing of circuits in sensor or actuator systems
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2896—Testing of IC packages; Test features related to IC packages
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electromagnetism (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Hall/Mr Elements (AREA)
- Semiconductor Integrated Circuits (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Measuring Magnetic Variables (AREA)
- Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US17/566,607 | 2021-12-30 | ||
| US17/566,607 US11614482B1 (en) | 2021-12-30 | 2021-12-30 | Method for manufacturing semiconductor device package with isolation |
| PCT/US2022/053337 WO2023129411A1 (en) | 2021-12-30 | 2022-12-19 | Method for manufacturing semiconductor device package with isolation |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2025501976A true JP2025501976A (ja) | 2025-01-24 |
| JP2025501976A5 JP2025501976A5 (enExample) | 2025-12-22 |
Family
ID=85722586
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024539809A Pending JP2025501976A (ja) | 2021-12-30 | 2022-12-19 | 絶縁を有する半導体デバイスパッケージを製造するための方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US11614482B1 (enExample) |
| EP (1) | EP4457527B1 (enExample) |
| JP (1) | JP2025501976A (enExample) |
| CN (1) | CN118302681A (enExample) |
| WO (1) | WO2023129411A1 (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102702092B1 (ko) * | 2019-11-26 | 2024-09-04 | 삼성전자주식회사 | 반도체 테스트 장치 및 그 테스트 방법 |
| US11621215B1 (en) * | 2021-11-30 | 2023-04-04 | Texas Instruments Incorporated | Semiconductor device package with isolated semiconductor die and electric field curtailment |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5807763A (en) * | 1997-05-05 | 1998-09-15 | International Business Machines Corporation | Electric field test of integrated circuit component |
| US7847392B1 (en) * | 2008-09-30 | 2010-12-07 | Amkor Technology, Inc. | Semiconductor device including leadframe with increased I/O |
| AT511226B1 (de) * | 2011-03-17 | 2013-03-15 | Rainer Dr Gaggl | Vorrichtung zum hochspannungsprüfen von halbleiterbauelementen |
| US8969985B2 (en) * | 2011-08-30 | 2015-03-03 | Infineon Technologies Ag | Semiconductor chip package and method |
| US9035422B2 (en) * | 2013-09-12 | 2015-05-19 | Texas Instruments Incorporated | Multilayer high voltage isolation barrier in an integrated circuit |
| US11101209B2 (en) * | 2017-09-29 | 2021-08-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Redistribution structures in semiconductor packages and methods of forming same |
| US11201065B2 (en) * | 2019-10-31 | 2021-12-14 | Texas Instruments Incorporated | Testing semiconductor components |
| US20210231729A1 (en) | 2020-01-27 | 2021-07-29 | Texas Instruments Incorporated | High voltage integrated circuit testing interface assembly |
| US11322433B2 (en) * | 2020-04-07 | 2022-05-03 | Texas Instruments Incorporated | Hall sensor packages |
| US11552013B2 (en) * | 2021-03-31 | 2023-01-10 | Texas Instruments Incorporated | Fuses for packaged semiconductor devices |
| US11594474B2 (en) * | 2021-04-30 | 2023-02-28 | Texas Instruments Incorporated | Bondwire protrusions on conductive members |
-
2021
- 2021-12-30 US US17/566,607 patent/US11614482B1/en active Active
-
2022
- 2022-12-19 EP EP22917209.3A patent/EP4457527B1/en active Active
- 2022-12-19 CN CN202280077738.0A patent/CN118302681A/zh active Pending
- 2022-12-19 JP JP2024539809A patent/JP2025501976A/ja active Pending
- 2022-12-19 WO PCT/US2022/053337 patent/WO2023129411A1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| EP4457527B1 (en) | 2026-02-25 |
| CN118302681A (zh) | 2024-07-05 |
| WO2023129411A1 (en) | 2023-07-06 |
| EP4457527A1 (en) | 2024-11-06 |
| EP4457527A4 (en) | 2025-04-23 |
| US11614482B1 (en) | 2023-03-28 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20251212 |
|
| A625 | Written request for application examination (by other person) |
Free format text: JAPANESE INTERMEDIATE CODE: A625 Effective date: 20251212 |