JP2024072552A - Thin film circuit boards, packages for mounting electronic components, and electronic modules - Google Patents

Abstract

[Problem] To provide a thin-film circuit board capable of reducing signal power loss in signal transmission. [Solution] The thin-film circuit board includes a base, a first ground conductor located in a first region on an upper surface of the base, a second ground conductor located in a second region on the upper surface of the base, a lower ground conductor located on a lower surface of the base, and a first signal conductor. The base has a lower surface, a side surface having a first side surface, and a first through hole. The first through hole is located in the first region. The first signal conductor is located between the first ground conductor and the second ground conductor. The first signal conductor has a first electrode portion, a second electrode portion located away from the first electrode portion, a first line portion connected to the first electrode portion, and a second line portion connected to the second electrode portion. The base has a first opening portion located between the first electrode portion and the second electrode portion. The first ground conductor has a first via conductor. The first via conductor is located in the first through hole. In a side view, the first via conductor is positioned so as to overlap the first opening. [Selected Figure]

Description

This disclosure relates to thin-film circuit boards, packages for mounting electronic components, and electronic modules.

A conventional high-frequency substrate is described, for example, in Patent Document 1.

International Publication No. 2009/119443

In one embodiment (1), the thin-film circuit board includes a base, a first ground conductor, a second ground conductor, a bottom surface ground conductor, and a first signal conductor. The base has an upper surface, a bottom surface opposite to the upper surface, a side surface connecting the upper surface and the bottom surface, and a first through hole. The upper surface has a first region and a second region located away from the first region. The first through hole is located in the first region and penetrates the base from the upper surface to the bottom surface. The first ground conductor is located in the first region. The second ground conductor is located in the second region. The bottom surface ground conductor is located on the bottom surface. The first signal conductor is located between the first ground conductor and the second ground conductor on the upper surface. The side surface has a first side surface. The first signal conductor has a first electrode portion, a second electrode portion, a first line portion, and a second line portion. The second electrode portion is located away from the first electrode portion. The first line portion is connected to the first electrode portion and extends away from the first side surface. The second line portion is connected to the second electrode portion and extends toward the first side surface. The base portion further has a first opening located between the first electrode portion and the second electrode portion. The first ground conductor has a first via conductor. The first via conductor is located in the first through hole and electrically connects the first ground conductor and the bottom surface ground conductor. When the direction in which the first line portion extends is defined as a first direction and the direction intersecting the first direction is defined as a second direction, the first via conductor is positioned to overlap the first opening in a side view from the second direction.

(2) In the thin-film circuit board described in (1) above, the base further has a second through hole. The second through hole is located in the second region and penetrates the base from the top surface to the bottom surface. The second ground conductor has a second via conductor. The second via conductor is located within the second through hole and electrically connects the second ground conductor and the lower surface ground conductor. In a side view from the second direction, the second via conductor is located overlapping the first opening.

(3) In the thin-film circuit board described in (1) or (2) above, the base has one or more third through holes. The one or more third through holes are located in the first region and penetrate the base from the top surface to the bottom surface. The first ground conductor has a third via conductor. The third via conductor is located within the third through hole and electrically connects the first ground conductor and the lower surface ground conductor. The third through hole is spaced from the first line portion and is located alongside the first line portion. The area of the first through hole in a plan view is larger than the area of the third through hole in a plan view.

(4) In the thin-film circuit board according to (2) or (3), the base further has one or more fourth through holes. The one or more fourth through holes are located in the second region and penetrate the base from the upper surface to the lower surface. The second ground conductor has a fourth via conductor. The fourth via conductor is located in the fourth through hole and electrically connects the second ground conductor and the lower surface ground conductor. The fourth through hole is located next to the first line portion with a gap therebetween. The fourth through hole is located on the opposite side of the third through hole across the first line portion in the second direction. The area of the second through hole in a plan view is larger than the area of the fourth through hole in a plan view.

(5) The thin-film circuit board described in (1) to (4) above further includes a second signal conductor located on the upper surface. The second signal conductor is located between the first ground conductor and the second ground conductor and is spaced from the first signal conductor. The second signal conductor has a third electrode portion, a fourth electrode portion, a third line portion, and a fourth line portion. The fourth electrode portion is located away from the third electrode portion. The third line portion is connected to the third electrode portion and extends away from the first side surface. The fourth line portion is connected to the fourth electrode portion and extends toward the first side surface. The base further includes a second opening located between the third electrode portion and the fourth electrode portion.

(6) The thin-film circuit board described in (1) to (4) above further includes a third ground conductor and a second signal conductor located on the upper surface. The upper surface has a third region. The third region is located on the opposite side of the second region across the first region in the second direction. The third ground conductor is located in the third region. The second signal conductor is located between the first ground conductor and the third ground conductor on the upper surface. The second signal conductor also has a third electrode portion, a fourth electrode portion, a third line portion, and a fourth line portion. The fourth electrode portion is located away from the third electrode portion. The third line portion is connected to the third electrode portion and extends away from the first side surface. The fourth line portion is connected to the fourth electrode portion and extends toward the first side surface. The base further has a second opening and one or more fifth through holes. The second opening is located between the third electrode portion and the fourth electrode portion. One or more fifth through holes are located in the first region and penetrate the base from the top surface to the bottom surface. The first ground conductor has a fifth via conductor located in the fifth through hole and electrically connecting the third ground conductor and the lower surface ground conductor. The fifth through hole is located next to the first through hole in the first direction and spaced from the first through hole. The first through hole is located between the first opening and the second opening in the second direction. The thin film circuit board of claim 1, wherein the area of the first through hole in a plan view is larger than the area of the fifth through hole in a plan view.

(7) The thin-film circuit board described in (3) or (4) above further includes a third ground conductor and a second signal conductor located on the upper surface. The upper surface has a third region located on the opposite side of the second region across the first region in the second direction. The third ground conductor is located in the third region. The second signal conductor is located between the first ground conductor and the third ground conductor on the upper surface. The second signal conductor also has a third electrode portion, a fourth electrode portion, a third line portion, and a fourth line portion. The fourth electrode portion is located away from the third electrode portion. The third line portion is connected to the third electrode portion and extends away from the first side surface. The fourth line portion is connected to the fourth electrode portion and extends toward the first side surface. The base further has a second opening and one or more fifth through holes. The second opening is located between the third electrode portion and the fourth electrode portion. One or more fifth through holes are located in the first region and penetrate the base from the top surface to the bottom surface. The first ground conductor has a fifth via conductor. The fifth via conductor is located in the fifth through hole and electrically connects the third ground conductor and the lower surface ground conductor. The fifth through hole is located next to the first through hole in the first direction and spaced from the first through hole. The first through hole is located between the first opening and the second opening in the second direction. The area of the first through hole in a plan view is larger than the area of the fifth through hole in a plan view. Also, the area of the fifth through hole in a plan view is larger than the area of the third through hole in a plan view.

(8) In the thin-film circuit board described in (1) to (7) above, in a cross-sectional view perpendicular to the upper surface, the first opening has a curved portion that protrudes toward the lower surface.

(9) In the thin-film circuit board described in (1) to (7) above, the first opening penetrates from the top surface to the bottom surface.

(10) In the thin-film circuit board described in (1) to (9) above, the lower surface ground conductor is positioned with a gap between it and the first opening in a plan view.

(11) The thin-film circuit board described in (1) to (10) above further includes a first insulating coating layer located on the first ground conductor. In a plan view, the first insulating coating layer is located surrounding the first through hole and is in contact with the first via conductor.

(12) The thin-film circuit board described in (1) to (11) above further includes a fourth ground conductor. The fourth ground conductor is located on the upper surface along the first side surface. The fourth ground conductor also electrically connects the first ground conductor and the second ground conductor. The second line portion is connected to the fourth ground conductor. The second line portion also has a first resistor.

(13) The thin-film circuit board described in (12) above further includes a first side ground conductor. The first side ground conductor electrically connects the fourth ground conductor and the lower surface ground conductor. The base has a first cutout portion. The first cutout portion is located on the first side surface and is cut from the upper surface to the lower surface. The first side ground conductor is located on the wall surface of the first cutout portion.

(14) In one embodiment, a package for mounting electronic components includes a box body and the thin-film circuit board described in (1) to (13) above. The box body has a housing portion. The thin-film circuit board is housed in the housing portion.

(15) In one embodiment, an electronic module includes the electronic component mounting package described in (14) above, an electronic component, and a lid. The electronic component is accommodated in the accommodation section. The lid is located on the box and covers the inside of the electronic component mounting package. The electronic component is electrically connected to the thin-film circuit board.

1 is a perspective view of a thin-film circuit board according to an embodiment; FIG. 2 is an enlarged view of a main part A shown in FIG. FIG. 1 is a plan view of a thin-film circuit board according to an embodiment. FIG. 4 is an enlarged view of a main part B shown in FIG. 5 is a cross-sectional view taken along the line VV of the thin-film circuit board shown in FIG. 5 is a cross-sectional view taken along line VV of the thin-film circuit board shown in FIG. 4 according to another embodiment. 1 is a perspective view of a thin-film circuit board according to an embodiment, seen from below. FIG. 2 is a perspective view of a base of a thin-film circuit board according to an embodiment. FIG. 2 is an exploded perspective view showing a ground conductor of the thin film circuit board according to the embodiment; FIG. 2 is a perspective view of a thin-film circuit board according to an embodiment in which a capacitor is mounted on the thin-film circuit board. FIG. 11 is a perspective view of a thin-film circuit board according to another embodiment, as viewed from below. FIG. 13 is a perspective view of a thin-film circuit board according to still another embodiment. FIG. 13 is a perspective view showing a modified example of the thin film circuit board shown in FIG. 12 . 1 is a cross-sectional view of an electronic component mounting package and an electronic module including a thin-film circuit board according to an embodiment.

In the technology disclosed in Patent Document 1, a signal line for transmitting a signal is provided on a dielectric substrate. A capacitor is mounted on a separated portion of the signal line, and a high-frequency substrate is described in which the separated ends of the signal line are electrically connected.

However, because capacitors are mounted on the surface of a dielectric substrate, as capacitors become smaller and thinner, when the capacitors are joined with a conductive joining material such as solder, the joining material may straddle the separated ends of the signal lines. When the joining material is connected across the separated ends of the signal lines, the separated parts of the distant signal lines may become electrically connected to each other, causing a short circuit.

In addition, the impedance value at the separated end of the signal line may be low, resulting in large losses in the transmission of high-frequency signals. Even if the bonding material is not connected across the separated end of the signal line, the bonding material may flow out to unnecessary locations, causing the impedance value to fluctuate.

<Configuration of Thin Film Circuit Board>
Hereinafter, some exemplary embodiments will be described with reference to the drawings. Although any direction of the thin film circuit board may be considered as up or down, for convenience, a Cartesian coordinate system xyz is defined, and the positive side of the z direction is considered as up. In this disclosure, the first direction refers to, for example, the x direction in the drawings. The second direction refers to, for example, the y direction in the drawings. The third direction refers to, for example, the z direction in the drawings. In addition, in this disclosure, the plan view is a concept that includes a planar perspective view. In addition, in this disclosure, the side view is a concept that includes a side perspective view.

As shown in FIG. 1, the thin-film circuit board 100 includes a base 1, a first ground conductor G1, a second ground conductor G2, a bottom surface ground conductor G5, and a first signal conductor S1.

8, the base 1 has an upper surface 1a, a lower surface 1b located opposite the upper surface 1a, a side surface connecting the upper surface 1a and the lower surface 1b, and a first through hole 111. As the material of the base 1, for example, ceramic materials such as aluminum oxide sintered body, mullite sintered body, silicon carbide sintered body, aluminum nitride sintered body, or silicon nitride sintered body, or dielectric materials such as glass ceramic materials can be used.

The base 1 may be configured with multiple dielectric layers stacked together. For example, the base 1 is rectangular in plan view, with dimensions of 4 mm x 4 mm to 50 mm x 50 mm and a thickness of 0.5 mm to 10 mm.

As shown in FIG. 8, the upper surface 1a has a first region 11 and a second region 12 located away from the first region 11. The lower surface 1b is located on the opposite side of the upper surface 1a. The region in which the first ground conductor G1 is located can be referred to as the first region 11. The region in which the second ground conductor G2 is located can be referred to as the second region 12.

As shown in FIG. 8, the first through hole 111 is located in the first region 11 and penetrates the base 1 from the upper surface 1a to the lower surface 1b. The first through hole 111 can be created by subjecting the base 1 to, for example, at least one of blast processing, laser processing, and drilling.

As shown in Figures 1, 3, and 8, the side surface has a first side surface 1c. Here, the first side surface 1c can be said to be a surface located in the direction in which the second line portion S12L extends (e.g., the negative direction of the x-axis).

As shown in Figures 1 to 4 and 8, the first ground conductor G1 is located in the first region 11. Examples of materials for the first ground conductor G1 include metal materials such as gold, silver, copper, nickel, tungsten, molybdenum, and manganese. The first ground conductor G1 may be formed by sintering a metal paste on the upper surface 1a, or may be formed using a thin film formation technique such as a vapor deposition method or a sputtering method. For example, a first insulating coating layer 21 (described later) may be located on a part of the first ground conductor G1.

The second ground conductor G2 is located in the second region 12. The material of the second ground conductor G2 may be the same as or different from the material of the first ground conductor G1, and may be, for example, the same material as the material of the first ground conductor G1 described above. The second ground conductor G2 may also be formed by the same method as the first ground conductor G1.

As shown in Figures 5 and 7, the lower ground conductor G5 is located on the lower surface 1b. The material of the lower ground conductor G5 may be the same as or different from the material of the first ground conductor G1, and may be, for example, the same material as the material of the first ground conductor G1 described above. The lower ground conductor G5 may also be formed by a method similar to that of the first ground conductor G1. In one embodiment, the lower ground conductor G5 is located on the entire surface of the lower surface 1b of the base 1, but the lower ground conductor G5 does not necessarily have to be located on the entire surface of the lower surface 1b of the base 1, and may be located, for example, spaced from at least a portion of the side surface of the base 1 in a plan view.

As shown in Figures 1 to 4, the first signal conductor S1 is located on the upper surface 1a between the first ground conductor G1 and the second ground conductor G2. This configuration allows the thin-film circuit board 100 to have a coplanar structure.

As shown in Figs. 1 to 4, the first signal conductor S1 has a first electrode portion S11, a second electrode portion S12, a first line portion S11L, and a second line portion S12L. The second electrode portion S12 is located away from the first electrode portion S11. The first line portion S11L is connected to the first electrode portion S11 and extends away from the first side surface 1c. The second line portion S12L is connected to the second electrode portion S12 and extends toward the first side surface 1c. In this disclosure, extending away from the first side surface 1c can be rephrased as, for example, extending in the positive direction in the x-axis direction. In this disclosure, extending toward the first side surface 1c can be rephrased as, for example, extending in the negative direction in the x-axis direction.

The material of the first signal conductor S1 may be the same as or different from the material of the first ground conductor G1, and may be, for example, the same material as the material of the first ground conductor G1 described above. The first signal conductor S1 may also be formed by the same method as the first ground conductor G1.

The first electrode portion S11 and the second electrode portion S12 can be connected to electronic components such as a capacitor, an inductor, and a resistor. In one embodiment, as shown in FIG. 10, the first capacitor 31 can be electrically connected. More specifically, the first capacitor 31 has a first electrode 31a and a second electrode 31b. In this case, the first electrode 31a of the first capacitor 31 is electrically connected to the first electrode portion S11, and the second electrode 31b of the first capacitor 31 is electrically connected to the second electrode portion S12.

The first capacitor 31 is, for example, rectangular in plan view, with dimensions of 0.1 mm x 0.1 mm to 2 mm x 4 mm, and a height of 0.1 mm to 3 mm. The first capacitor 31 contains, for example, forsterite, aluminum oxide, barium magnesium niobate, and barium neodymium titanate. More specifically, the first capacitor 31 may be a multi-layer ceramic capacitor (MLCC) or a silicon capacitor.

The first electrode 31a can be connected to the first electrode portion S11 by a bonding material. The second electrode 31b can be connected to the second electrode portion S12 by a bonding material. As the bonding material, for example, well-known solders such as Sn-Ag-Cu solder, Sn-Zn-Bi solder, and Sn-Cu solder can be used.

As shown in Figures 1 to 4, in one embodiment, the first line portion S11L and the second line portion S12L are linear, but at least one of the first line portion S11L or the second line portion S12L may be curved in the middle. As for the third line portion S23L and the fourth line portion S24L described later, at least one of the third line portion S23L or the fourth line portion S24L may be curved in the middle.

As shown in Figs. 1 to 5 and 8, the base 1 further has a first opening O1 located between the first electrode portion S11 and the second electrode portion S12. More specifically, the first opening O1 has a shape having an opening on the upper surface 1a. The first opening O1 can be created by, for example, using at least one of blast processing, laser processing, and drill processing on the base 1. In one embodiment, the first opening O1 has a rectangular shape with rounded corners in a plan view, but the first opening O1 may have a square shape or a circular shape including an elliptical shape. Also, as shown in Fig. 4, in one embodiment, the dimension L1y of the first opening O1 in the y direction is smaller than the dimension L11 of the first electrode portion S11 in the y direction, but the dimension L1y of the first opening O1 in the y direction may be larger than or the same as the dimension L11 of the first electrode portion S11 in the y direction. The dimension L1y of the first opening O1 in the y direction can be changed depending on the strength required for the base 1.

As shown in FIG. 4, the first opening O1 may be positioned with a space between the first electrode portion S11 and the second electrode portion S12. This configuration reduces the possibility of damaging the first electrode portion S11 and/or the second electrode portion S12 when the first opening O1 is created by the processing method described above. Note that the first opening O1 may be in contact with at least one of the first electrode portion S11 or the second electrode portion S12 in a plan view.

As shown in FIG. 10, when the first capacitor 31 is mounted on the thin-film circuit board 100, the first opening O1 is positioned so as to overlap at least a portion of the first capacitor 31 in a plan view. In other words, the first opening O1 is positioned below the first capacitor 31. The first opening O1 is filled with at least one dielectric material such as air, a resin material, or a glass material, and has a lower dielectric constant than the base 1. Therefore, in the first signal conductor S1, the characteristic impedance when transmitting a high-frequency signal can be adjusted to a desired value, and the loss of signal power occurring in the first signal conductor S1 can be reduced.

In addition, because the first opening O1 is located under the first capacitor 31, even if at least one of the amount of bonding material connecting the first electrode 31a and the first electrode portion S11 and the amount of bonding material connecting the second electrode 31b and the second electrode portion S12 is increased, the excess bonding material can be contained within the first opening O1, reducing the possibility of the bonding materials coming into contact with each other and causing an electrical short circuit. Furthermore, this makes it possible to reduce the distance between the first electrode portion S11 and the second electrode portion S12. Therefore, even when the first capacitor 31 is miniaturized together with the thin-film circuit board 100, the first capacitor 31 can be stably mounted on the first electrode portion S11 and the second electrode portion S12.

As shown in Fig. 2 and Fig. 9, the first ground conductor G1 has a first via conductor G11. The first via conductor G11 is located in the first through hole 111 and electrically connects the first ground conductor G1 and the bottom surface ground conductor G5. With this configuration, the thin film circuit board 100 can have a grounded coplanar structure. Therefore, the first signal conductor S1 can stably transmit a high frequency signal. As shown in Fig. 2, in one embodiment, the first via conductor G11 is located on the wall surface of the first through hole 111 and is a so-called through hole via. The through hole via can be called a through via.

When the direction in which the first line portion S11L extends is the first direction (in other words, the x direction) and the direction intersecting the x direction is the second direction (in other words, the y direction), as shown in FIG. 5, the first via conductor G11 is positioned to overlap the first opening O1 in a side view from the y direction. With this configuration, the ground potential can be strengthened around the first opening O1 and around the first electrode portion S11 and the second electrode S12. Therefore, the possibility of resonance occurring in the first signal conductor S1 can be reduced. Even if the bonding material for mounting the first capacitor 31 flows into the first opening O1, the possibility of the characteristic impedance of the first signal conductor S1 fluctuating can be reduced. In FIG. 5, the first through hole 111 and the first via conductor G11 are shown in a dotted line in a transparent manner. The first via conductor G11 can be created, for example, by applying and/or embedding a material identical to or similar to the first ground conductor G1 into the first through hole 111.

As shown in FIG. 5, the first opening O1 may be rectangular in a cross section perpendicular to the upper surface 1a (for example, in a cross section in the xz plane). In a cross section perpendicular to the upper surface 1a, the first opening O1 may be trapezoidal or stepped, with the dimensions in the x and y directions decreasing toward the lower surface 1b. In addition, when the first opening O1 does not penetrate from the upper surface 1a to the lower surface 1b as shown in FIG. 11 described later, the first opening O1 may have a bottom surface O1b. The surface roughness of the bottom surface O1b of the first opening O1 may be greater than the surface roughness of the upper surface 1a. The surface roughness is expressed, for example, by the arithmetic mean roughness Ra. The surface roughness expressed by the arithmetic mean roughness Ra is, for example, in accordance with JIS B
0601 (2001). Specifically, it can be obtained by applying a laser type surface roughness measuring instrument or the like to the surface of the measurement object.

The first through holes 111 do not necessarily need to be positioned so as to overlap the center point of the first opening O1 in the x direction, and as in one embodiment shown in FIG. 5, the first through holes 111 may be positioned so as to be offset from the center point of the first opening O1 in the x direction. In one embodiment, as shown in FIG. 5, all of the first through holes 111 are positioned so as to overlap the first opening O1 in a side view from the y direction, but this is not necessarily required, and for example, it is sufficient that at least a portion of the first through holes 111 is positioned so as to overlap the first opening O1 in a side view from the y direction.

Also, as shown in FIG. 4, the area of the first opening O1 in a plan view may be larger than the area of the first through hole 111 in a plan view. With this configuration, the strength of the base 1 is maintained, while the first opening O1 can be effectively formed in a location where adjustment of the impedance value is required.

As shown in FIG. 8, the base 1 may further include a second through hole 122. The second through hole 122 is located in the second region 12 and penetrates the base 1 from the upper surface 1a to the lower surface 1b. The second through hole 122 may be formed, for example, by a method similar to that for the first through hole 111.

As shown in FIG. 1, FIG. 3, FIG. 4, and FIG. 9, the second ground conductor G2 may have a second via conductor G22. The second via conductor G22 is located in the second through hole 122 and electrically connects the second ground conductor G2 and the lower surface ground conductor G5. In a side view from the y direction, the second via conductor G22 is located overlapping the first opening O1. With this configuration, the ground potential around the first opening O1 can be further strengthened. In other words, the first opening O1 is located between the first via conductor G11 and the second via conductor G22. More specifically, at least a part of the first opening O1 is located on a straight line connecting the first via conductor G11 and the second via conductor G22 in the y direction. Therefore, the possibility of resonance occurring in the first signal conductor S1 can be reduced.

The second via conductor G22 may be formed, for example, by a method similar to that of the first via conductor G11. In one embodiment, the second via conductor G22 is located on the wall surface of the second through hole 122 and is a so-called through-hole via.

As shown in Figures 7 and 8, the base 1 may have one or more third through holes 113. The one or more third through holes 113 are located in the first region 11 and penetrate the base 1 from the upper surface 1a to the lower surface 1b. The third through holes 113 may be formed, for example, by a method similar to that for the first through holes 111.

As shown in Figures 1 to 4 and Figure 9, the first ground conductor G1 may have a third via conductor G13. The third via conductor G13 is located in the third through hole 113 and electrically connects the first ground conductor G1 and the bottom surface ground conductor G5. The third via conductor G13 may be formed, for example, by a method similar to that of the first via conductor G11. As shown in Figure 2, in one embodiment, the third via conductor G13 is located on the wall surface of the third through hole 113 and is a so-called through-hole via. By having the base 1 have the third through hole 113, the grounding condition is improved and the possibility of resonance occurring in the first signal conductor S1 can be reduced.

As shown in FIG. 3, the third through hole 113 and the third via conductor G13 are spaced apart from the first line portion S11L and are positioned next to the first line portion S11L.

The area of the first through hole 111 in a plan view is larger than the area of the third through hole 113 in a plan view. In this case, it can be said that the area of the first through hole 111 close to the first opening O1 in a plan view is larger than the area of the third through hole 113 in a plan view. With this configuration, the first via conductor G11 can be brought closer to the first opening O1, the first electrode portion S11, and the second electrode portion S12. This reduces the possibility of resonance occurring in the first signal conductor S1.

As shown in FIG. 8, the base 1 may further have one or more fourth through holes 124. The one or more fourth through holes 124 are located in the second region 12 and penetrate the base 1 from the upper surface 1a to the lower surface 1b. The fourth through holes 124 may be formed, for example, by a method similar to that for the first through holes 111.

As shown in Figures 1, 3, 4, and 9, the second ground conductor G2 may have a fourth via conductor G24. The fourth via conductor G24 is located in the fourth through hole 124 and electrically connects the second ground conductor G2 and the lower surface ground conductor G5. The fourth via conductor G24 may be formed, for example, by a method similar to that of the first via conductor G11. In one embodiment, the fourth via conductor G24 is located on the wall surface of the fourth through hole 124 and is a so-called through-hole via. By having the fourth through hole 124 and the fourth via conductor G24 in the base 1, the ground potential is strengthened, and the possibility of resonance occurring in the first signal conductor S1 can be reduced.

As shown in Fig. 3 and Fig. 4, the fourth through hole 124 may be located next to the first line portion S11L with a gap therebetween. The fourth through hole 124 may be located on the opposite side of the third through hole 113 across the first line portion S11L in the y direction. The area of the second through hole 122 in a plan view is larger than the area of the fourth through hole 124 in a plan view. In this case, it can be said that the area of the second through hole 122 in a plan view close to the first opening O1 is larger than the area of the fourth through hole 124 in a plan view. With this configuration, the second via conductor G22 can be brought closer to the first opening O1, the first electrode portion S11, and the second electrode portion S12. Therefore, the possibility of resonance occurring in the first signal conductor S1 can be reduced.

As shown in Figures 1 and 3, the thin-film circuit substrate 100 may further include a third ground conductor G3 and a second signal conductor S2 located on the upper surface 1a.

As shown in FIG. 8, the upper surface 1a may have a third region 13. The third region 13 may be located on the opposite side of the first region 11 from the second region 12 in the y direction.

As shown in Figures 1, 3, and 8, the third ground conductor G3 is located in the third region 13.

As shown in FIG. 3, the second signal conductor S2 is located between the first ground conductor G1 and the third ground conductor G3 on the upper surface 1a. The second signal conductor S2 also has a third electrode portion S23, a fourth electrode portion S24, a third line portion S23L, and a fourth line portion S24L. The fourth electrode portion S24 is located away from the third electrode portion S23. The third line portion S23L is connected to the third electrode portion S23 and extends away from the first side surface 1c. The fourth line portion S24L is connected to the fourth electrode portion S24 and extends toward the first side surface 1c. The second signal conductor S2 may form a pair of differential signal lines together with the first signal conductor S1. In such a case, signals are transmitted in opposite phases in the pair of differential signal lines, improving resistance to external noise, and making it possible to reduce the influence of EMI noise and to transmit high-frequency signals more smoothly.

The material of the second signal conductor S2 may be the same as or different from the material of the first ground conductor G1, and may be, for example, the same material as the material of the first ground conductor G1 described above. The second signal conductor S2 may also be formed by the same method as the first ground conductor G1.

As shown in FIG. 10, the second capacitor 32 can be electrically connected to the third electrode portion S23 and the fourth electrode portion S24. More specifically, the second capacitor 32 has a third electrode 32a and a fourth electrode 32b. In this case, the third electrode 32a of the second capacitor 32 is electrically connected to the third electrode portion S23, and the fourth electrode 32b of the second capacitor 32 is electrically connected to the fourth electrode portion S24. The second capacitor 32 may be made of the same material as the first capacitor 31, or may be made of a different material. More specifically, the second capacitor 32 may be a multilayer ceramic capacitor or a silicon capacitor.

The third electrode 32a can be connected to the third electrode portion S23 by a bonding material. The fourth electrode 32b can be connected to the fourth electrode portion S24 by a bonding material.

As shown in FIG. 1 and FIG. 3, the base 1 may further have a second opening O2. In this case, the second opening O2 is located between the third electrode portion S23 and the fourth electrode portion S24. More specifically, the second opening O2 has a shape having an opening on the upper surface 1a. The second opening O2 can be created by processing the base 1 in the same manner as the first opening O1. In one embodiment, the second opening O2 has a rectangular shape with rounded corners in a plan view, but the second opening O2 may have a square shape or a circular shape including an elliptical shape. In addition, the second opening O2 may have the same shape as the first opening O1 in a plan view, or may have a different shape.

As shown in Figures 1 to 3, the second opening O2 may be located with a gap between the third electrode portion S23 and the fourth electrode portion S24. Note that the second opening O2 may be in contact with at least one of the third electrode portion S23 or the fourth electrode portion S24 in a plan view.

As shown in FIG. 10, when the second capacitor 32 is mounted on the thin-film circuit board 100, the second opening O2 is positioned so as to overlap at least a portion of the second capacitor 32 in a plan view. In other words, the second opening O2 is positioned below the second capacitor 32. The second opening O2 is filled with at least one dielectric material such as air, a resin material, or a glass material, and has a lower dielectric constant than the base 1. Therefore, in the second signal conductor S2, the characteristic impedance when transmitting a high-frequency signal can be adjusted to a desired value, and the loss of signal power occurring in the second signal conductor S2 can be reduced.

In addition, because the second opening O2 is located below the second capacitor 32, even if at least one of the amount of bonding material connecting the third electrode 32a and the third electrode portion S23 and the amount of bonding material connecting the fourth electrode 32b and the fourth electrode portion S24 is increased, the bonding material can be kept within the second opening O2, reducing the possibility of the bonding materials coming into contact with each other and causing an electrical short circuit. Furthermore, this makes it possible to reduce the distance between the third electrode portion S23 and the fourth electrode portion S24, and the second capacitor 32 can be stably mounted even when the second capacitor 32 is miniaturized together with the thin-film circuit board 100.

As shown in Figures 1, 3, and 8, the base 1 may further have one or more fifth through holes 115. The one or more fifth through holes 115 are located in the first region 11 and penetrate the base 1 from the upper surface 1a to the lower surface 1b. The fifth through holes 115 may be formed, for example, by a method similar to that for the first through holes 111.

As shown in Figures 1 to 4 and Figure 9, the first ground conductor G1 may have a fifth via conductor G15. The fifth via conductor G15 is located in the fifth through hole 115 and electrically connects the third ground conductor G3 and the bottom surface ground conductor G5. Note that there may be multiple fifth through holes 115 and multiple fifth via conductors G15.

As shown in Figures 4 and 8, the fifth through hole 115 is positioned next to the first through hole 111 in the x direction with a gap between them. In one embodiment, the first through hole 111 and the first via conductor G11 are positioned between the two fifth through holes 115 and the fifth via conductor G15 in the x direction.

As shown in FIG. 3, the first through hole 111 may be located between the first opening O1 and the second opening O2 in the y direction. In other words, the first through hole 111 is located between the first opening O1 and the second opening O2 in the y direction.

The area of the first through hole 111 in plan view is larger than the area of the fifth through hole 115 in plan view. In other words, the distance between the first opening O1 and the second opening O2 and the first through hole 111 in the y direction is smaller than the distance between the first opening O1 and the second opening O2 and the fifth through hole 115 in the y direction. Note that the distance here refers to, for example, the distance between the outer edge of the first opening O1 and the outer edge of the first through hole 111. With this configuration, the first via conductor G11 can be formed closer to any of the first opening O1 and the second opening O2, the first electrode portion S11, the second electrode portion S12, the third electrode portion S23, and the fourth electrode portion S24 in the y direction, compared to the fifth via conductor G15. This reduces the possibility of resonance occurring in the first signal conductor S1 and the second signal conductor S2 near the first opening O1 and the second opening O2 (in other words, near where the first capacitor 31 and the second capacitor 32 are mounted on the thin-film circuit board 100).

4, the area of the first through hole 111 in a plan view may be larger than the area of the fifth through hole 115 in a plan view, and the area of the fifth through hole 115 in a plan view may be larger than the area of the third through hole 113 in a plan view. More specifically, the area of the first through hole 111 in a plan view may be the largest compared to other through holes (the through holes referred to here refer to through holes having conductors formed on the wall surfaces and serving as vias, such as the second through hole 122, the third through hole 113, the fourth through hole 124, and the fifth through hole 115). With this configuration, the possibility of resonance occurring in the first signal conductor S1 and the second signal conductor S2 near the first opening O1 and the second opening O2 (in other words, near where the first capacitor 31 and the second capacitor 32 are mounted on the thin film circuit board 100) can be reduced. In addition, by placing the first through hole 111 with the largest area in a location where resonance is most likely to occur, the areas of the through holes other than the first through hole 111 can be kept small, reducing the possibility of a decrease in the strength of the base 1.

Figure 6 is a diagram showing a cross section of the first opening O1 in another embodiment. As shown in Figure 6, in a cross section perpendicular to the upper surface 1a (for example, in a cross section in the xz plane), the first opening O1 may have a curved portion O11 protruding in a direction toward the lower surface 1b (for example, in the negative direction of the z axis). In other words, in a cross section perpendicular to the upper surface 1a (for example, in a cross section in the xz plane), the first opening O1 may have a semicircular shape. With this configuration, the stress applied to the base 1 can be reduced compared to when the first opening O1 is rectangular in a cross section perpendicular to the upper surface 1a. Therefore, the possibility of the base 1 being damaged can be reduced. In the above case, the first opening O1 may also have a curved portion O11 protruding toward the lower surface 1b in a cross section in the yz plane.

Furthermore, when the base 1 has a second opening O2, the second opening O2 may have the same shape as the first opening O1 in a cross-sectional view perpendicular to the top surface 1a, or may have a different shape. When the shape of the second opening O2 in a cross-sectional view perpendicular to the top surface 1a is the same as the shape of the first opening O1 in a cross-sectional view perpendicular to the top surface 1a, the first opening O1 and the second opening O2 can be formed by the same method (e.g., blasting), which facilitates the manufacture of the thin-film circuit substrate 100.

2, 4, and 5, the thin-film circuit board 100 may further include a first insulating coating layer 21A located on the first ground conductor G1. In a plan view, the first insulating coating layer 21A is located surrounding the first through hole 111 and contacts the first via conductor G11. With this configuration, for example, when the thin-film circuit board 100 is mounted on the first pedestal portion 102A described later using a bonding material, the bonding material can be reduced in possibility of creeping up the first through hole 111, spouting out to the upper surface 1a side, and contacting the first signal conductor S1 and/or the second signal conductor S2 to cause an electrical short circuit. 2 and 4, the thin-film circuit board 100 may also include a first insulating coating layer 21B surrounding other through holes (the through holes referred to here refer to through holes having conductors formed on the wall surfaces thereof, serving as vias, such as the second through hole 122, the third through hole 113, the fourth through hole 124, and the fifth through hole 115). With this configuration, it is possible to achieve the same effect as the above-mentioned first insulating coating layer 21A. For example, chromium can be used as the material for the first insulating coating layers 21A to 21B. The first insulating coating layers 21A to 21B may be formed by vapor-depositing chromium on the first ground conductor G1.

2, 3, 5, and 6, the thin-film circuit board 100 may have electrode insulating coating layers 24A to 24D located on at least one of the first signal conductor S1 and the second signal conductor S2. The electrode insulating coating layer 24A is located in a U-shape on the first electrode portion S11 and the first line portion S11L. The electrode insulating coating layer 24B is located in a U-shape on the second electrode portion S12. The electrode insulating coating layer 24C is located in a U-shape on the third electrode portion S23 and the third line portion S23L. The electrode insulating coating layer 24D is located in a U-shape on the fourth electrode portion S24. With this configuration, when the first capacitor 31 and/or the second capacitor 32 described above are mounted on the thin-film circuit board 100, the possibility of the bonding material spreading to unnecessary locations and causing a short circuit can be reduced. In addition, since the spread of the bonding material can be controlled, the possibility of the spread of the bonding material causing a change in impedance in the first signal conductor S1 and/or the second signal conductor S2 can be reduced. The bonding material referred to here refers to, for example, the bonding material that bonds the first electrode 31a and the first electrode portion S11, the bonding material that bonds the second electrode 31b and the second electrode portion S12, the bonding material that bonds the third electrode 32a and the third electrode portion S23, and the bonding material that bonds the fourth electrode 32b and the fourth electrode portion S24.

As shown in Figures 1 to 4, the thin-film circuit board 100 may further include a fourth ground conductor G4. The fourth ground conductor G4 is located on the upper surface 1a along the first side surface 1c. The fourth ground conductor G4 also electrically connects the first ground conductor G1 and the second ground conductor G2.

As shown in Figures 1 to 4, when the thin-film circuit board 100 includes a fourth ground conductor G4, the second line portion S12L may be connected to the fourth ground conductor G4. The second line portion S12L may have a first resistor. With this configuration, the thin-film circuit board 100 can be used as a termination circuit board. Unwanted electrical signals generated between the first signal conductors S1 can be converted into thermal energy. This reduces the possibility that the unwanted electrical signals are reflected to the first signal conductor S1. This allows the thin-film circuit board 100 to be used as a termination circuit board capable of obtaining good reflection characteristics. In one embodiment, the second line portion S12L itself serves as the first resistor.

The fourth line portion S24L may also be connected to a fourth ground conductor G4. The fourth line portion S24L may also have a second resistor.

The first resistor and the second resistor are formed of a material having a higher resistivity than the second electrode portion S12 and the fourth electrode portion S24. Examples of materials for the first resistor and the second resistor include tantalum nitride (TaN or Ta2N), ruthenium oxide (RuO2), nickel-chromium alloy (Ni-Cr), copper-nickel alloy (Cu-Ni), and copper-manganese alloy (Cu-Mn). If the first resistor and/or the second resistor is made of Ta2N, for example, it can be formed on the upper surface 1a by a thin film formation technique. The first resistor and the second resistor are not limited to those made of a conductor layer as described above, but may be independent components (such as so-called chip resistors) or may be formed by combining a plurality of such components.

As shown in Figures 1 to 4, the thin-film circuit board 100 may further include a first side ground conductor G6. The first side ground conductor G6 electrically connects the fourth ground conductor G4 and the bottom ground conductor G5. The base 1 may have a first cutout portion K1. The first cutout portion K
The first side ground conductor G6 is located on the first side surface 1c and is cut out from the upper surface 1a to the lower surface 1b. The first side ground conductor G6 is located on the wall surface of the first cutout portion K1. More specifically, the first cutout portion K1 and the first side ground conductor G6 are located at a position facing the second line portion S12L in the x-direction. With this configuration, the ground potential can be strengthened.

As shown in Figures 1 to 4, the thin-film circuit board 100 may also include a second side ground conductor G7. The second side ground conductor G7 electrically connects the fourth ground conductor G4 and the lower surface ground conductor G5. The base 1 may have a second cutout portion K2. The second cutout portion K2 is located on the first side surface 1c and is cut from the upper surface 1a to the lower surface 1b. The second side ground conductor G7 is located on the wall surface of the first cutout portion K1. More specifically, the second cutout portion K2 and the second side ground conductor G7 are located at a position facing the fourth line portion S24L in the x-direction.

Figure 11 is a perspective view of a thin-film circuit board 100 according to another embodiment. In the following, only those configurations of the other embodiment that differ from the configuration of the previously described embodiment will be described, and other configurations will be given the same reference numerals as those of the previously described embodiment and will not be described.

As shown in FIG. 11, the first opening O1 may penetrate from the upper surface 1a to the lower surface 1b. This configuration makes it possible to easily manufacture the thin-film circuit substrate 100, since there is no need to adjust the dimension (or depth) of the first opening O1 in the z direction. Note that the second opening O2 may also penetrate from the upper surface 1a to the lower surface 1b.

Also, as shown in FIG. 11, when the first opening O1 penetrates from the upper surface 1a to the lower surface 1b, the lower surface ground conductor G5 may be located with a gap between it and the first opening O1 in a plan view. In other words, in a plan view, the lower surface ground conductor G5 is not located in the portion surrounding the first opening O1, and the lower surface 1b is exposed. With this configuration, when the first opening O1 penetrates from the upper surface 1a to the lower surface 1b, the possibility of peeling off or damaging the lower surface ground conductor G5 by laser processing, drilling, or the like can be reduced.

Figure 12 is a perspective view of a thin-film circuit board 100 according to yet another embodiment. In the following, only those configurations of the other embodiment that differ from the configuration of the previously described embodiment will be described, and other configurations will be given the same reference numerals as those of the previously described embodiment and will not be described.

As shown in FIG. 12, the thin-film circuit board 100 further includes a second signal conductor S2 located on the upper surface 1a. In one embodiment, the second signal conductor S2 is different from the above-mentioned embodiment in that it is located between the first ground conductor G1 and the second ground conductor G2 and is spaced from the first signal conductor S1. The base 1 further includes a second opening O2 located between the third electrode portion S23 and the fourth electrode portion S24. More specifically, in one embodiment, no ground conductor is located between the first signal conductor S1 and the second signal conductor S2. With this configuration, it is not necessary to form a ground conductor between the first signal conductor S1 and the second signal conductor S2, so that the thin-film circuit board 100 can be made smaller.

Fig. 13 is a perspective view showing a modified example of the first opening O1 and the second opening O2 in the embodiment of the thin-film circuit substrate 100 shown in Fig. 12. In Fig. 12, the first opening O1 and the second opening O2 are located separately, but as shown in Fig. 13, the first opening O1 and the second opening O2 may be integrated. With such a configuration, the first opening O1 and the second opening O2 can be formed together in the base 1, making it easy to manufacture the thin-film circuit substrate 100. Note that in Fig. 13, at least a part of the first opening O1 and the second opening O2 may be located so as to extend partially in the x-direction.

<Configuration of electronic component mounting package>
Next, an electronic component mounting package 10a according to one embodiment will be described with reference to Fig. 14. The electronic component mounting package 10a includes a box body 101 and a thin-film circuit board 100. The box body 101 has a housing portion 101c. The thin-film circuit board 100 is housed in the housing portion 101c.

The box body 101 may also have a frame body 101a and a base body 101b. The frame body 101a is joined onto the base body 101b.

The base 101b is, for example, rectangular in plan view, with a size of 10 mm x 10 mm to 50 mm x 50 mm and a thickness of 0.5 mm to 20 mm. Examples of the material of the base 101b include metal materials such as copper, iron, tungsten, molybdenum, nickel, and cobalt, or alloys containing these metal materials. In this case, the base 101b may be a single metal plate or a laminate of multiple metal plates. In addition, when the material of the base 101b is the above-mentioned metal material, a plating layer of nickel, gold, or the like may be formed on the surface of the base 101b by electroplating or electroless plating in order to reduce oxidation corrosion. In addition, the material of the base 101b may be an insulating material, such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, a silicon nitride sintered body, or a ceramic material such as glass ceramics.

As shown in FIG. 14, the base 101b may have a first seat 102A and a second seat 102B for mounting an electronic component 103. The thin-film circuit board 100 may be directly bonded onto the base 101b, or may be bonded onto the first seat 102A provided on the base 101b, as shown in FIG. 14.

The material of the frame 101a may be, for example, a metal material such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or an alloy containing these metal materials. The material of the frame 101a may also be an insulating material, such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, a silicon nitride sintered body, or a ceramic material such as glass ceramics.

As shown in FIG. 14, the box body 101 may have an input/output terminal 101d. When the box body 101 has the input/output terminal 101d, the input/output terminal 101d may be located on the surface or inside the frame body 101a. The material of the frame body 101a may be, for example, a ceramic material such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, or a silicon nitride sintered body, or a dielectric material such as a glass ceramic material. The frame body 101a may also be configured with a plurality of insulating layers stacked. The frame body 101a may also be configured with a member made of a metal and a member made of a dielectric material such as a ceramic material.

The input/output terminal 101d is a wiring capable of conducting electrical current between the inside and outside of the box body 101. When the input/output terminal 101d is formed on the frame body 101a, the wiring that becomes the input/output terminal 101d may be formed on a green sheet that forms the outer shape of the frame body 101a using a metal material such as gold, silver, copper, nickel, tungsten, molybdenum, or manganese. The input/output terminal 101d may be formed by sintering a metal paste, or may be formed using a thin film formation technique such as a vapor deposition method or a sputtering method. An insulating film such as a ceramic (e.g., an alumina coat) or a resin may be located on a part of the wiring.

The input/output terminal 101d may be electrically connected to at least one of a bonding wire, a lead terminal, a flexible printed circuit (FPC), and a printed circuit board (PCB).

The frame 101a can be joined to the base 101b via a brazing material or the like. The brazing material may be, for example, silver, copper, gold, aluminum, or magnesium, and may contain additives such as nickel, cadmium, or phosphorus.

The electronic component mounting package 10a formed as described above can be used, for example, as a wireless communication semiconductor package or an optical semiconductor package.

<Electronic module configuration>
Next, an electronic module 10 according to an embodiment will be described with reference to Fig. 14. The electronic module 10 includes an electronic component mounting package 10a, an electronic component 103, and a lid 104. The electronic component 103 is accommodated in an accommodating portion 101c. The lid 104 is located on the box 101, and covers the inside of the electronic component mounting package 10a. The electronic component 103 is electrically connected to the thin-film circuit board 100.

The electronic component 103 may be a component that performs signal processing, such as converting a radio signal or an optical signal into an electrical signal, or converting an electrical signal into a radio signal or an optical signal. The electronic component 103 may be directly bonded to the base 101b, or may be bonded onto the second pedestal portion 102B described above.

The electronic component 103 may be, for example, an optical semiconductor element such as a semiconductor laser (Laser Diode; LD) or a photodiode (Photodiode; PD), a semiconductor integrated circuit element such as a field effect transistor (FET), or a sensor element such as an optical sensor. The electronic component 103 may be formed from a semiconductor material such as gallium arsenide or gallium nitride.

The electronic component 103 may be electrically connected to the input/output terminal 101d by one or more first wires 106A. When the thin-film circuit board 100 is used as a termination circuit board, the electronic component 103 may be electrically connected to the thin-film circuit board 100 by one or more second wires 106B. The thin-film circuit board 100 may be directly bonded onto the input/output terminal 101d, or may be electrically connected to the input/output terminal 101d by using a bonding wire or the like.

The lid 104 is positioned on the box 101, covering the inside of the electronic component mounting package 10a, and protects the electronic component 103 together with the box 101. The lid 104 is, for example, rectangular in plan view, with dimensions of 10 mm x 10 mm to 50 mm x 50 mm and a thickness of 0.5 mm to 2 mm. Examples of materials for the lid 104 include metal materials such as iron, copper, nickel, chromium, cobalt, molybdenum, or tungsten, or alloys that combine multiple of these metal materials.

The seal ring 105 has a function of joining the lid 104 and the box 101. The seal ring 105 is located on the box 101. Examples of materials for the seal ring 105 include metal materials such as iron, copper, silver, nickel, chromium, cobalt, molybdenum, and tungsten, and alloys made by combining a plurality of these metal materials.
When the seal ring 105 is not provided on the cover 1, the cover 104 may be bonded via a bonding material such as solder, brazing material, glass or resin adhesive.

The various combinations of the features in each embodiment are not limited to the examples of the above-mentioned embodiments. In addition, combinations of the various embodiments are also possible.

1 Base 1a Upper surface 1b Lower surface 1c First side surface 11 First region 111 First through hole 113 Third through hole 115 Fifth through hole 12 Second region 122 Second through hole 124 Fourth through hole 13 Third region O1 First opening O1b Bottom surface O11 Curved portion O2 Second opening K1 First notch portion K2 Second notch portion G1 First ground conductor G11 First via conductor G13 Third via conductor G15 Fifth via conductor G2 Second ground conductor G22 Second via conductor G24 Fourth via conductor G3 Third ground conductor G4 Fourth ground conductor G5 Bottom surface ground conductor G6 First side surface ground conductor G7 Second side surface ground conductor S1 First signal conductor S11 First electrode portion S11L First line portion S12 Second electrode portion S12L Second line portion S2 Second signal conductor S23 Third electrode portion S23L Third line portion S24 Fourth electrode portion S24L Fourth line portion 21A-21B First insulating coating layer 22 Second insulating coating layer 23 Third insulating coating layer 24A-24D Electrode insulating coating layer 31 First capacitor 31a First electrode 31b Second electrode 32 Second capacitor 32a Third electrode 32b Fourth electrode 10 Electronic module 10a Package for mounting electronic components 100 Thin film circuit board 101 Box body 101a Frame body 101b Base body 101c Storage section 101d Input/output terminal 102A First seat portion 102B Second seat portion 103 Electronic component 104 Lid body 105 Seal ring 106A First wire 106B Second wire

Claims (15)

a base having an upper surface having a first region and a second region located away from the first region, a lower surface located opposite the upper surface, a side surface connecting the upper surface and the lower surface, and a first through hole located in the first region and penetrating from the upper surface to the lower surface;
a first ground conductor located in the first region;
a second ground conductor located in the second region;
A bottom ground conductor located on the bottom surface;
a first signal conductor located on the top surface between the first ground conductor and the second ground conductor;
The side has a first side,
the first signal conductor has a first electrode portion, a second electrode portion located away from the first electrode portion, a first line portion connected to the first electrode portion and extending away from the first side surface, and a second line portion connected to the second electrode portion and extending toward the first side surface,
the base portion further includes a first opening located between the first electrode portion and the second electrode portion,
the first ground conductor has a first via conductor located in the first through hole and electrically connecting the first ground conductor and the bottom surface ground conductor;
When a direction in which the first line portion extends is defined as a first direction and a direction intersecting the first direction is defined as a second direction,
When viewed from a side in the second direction, the first via conductor is positioned so as to overlap the first opening. the base portion further includes a second through-hole located in the second region and penetrating from the upper surface to the lower surface,
the second ground conductor has a second via conductor located in the second through hole and electrically connecting the second ground conductor and the bottom surface ground conductor;
The thin-film circuit board according to claim 1 , wherein the second via conductor is positioned so as to overlap the first opening when viewed from a side in the second direction. the base portion further includes one or more third through holes located in the first region and penetrating from the upper surface to the lower surface,
the first ground conductor has a third via conductor located in the third through hole and electrically connecting the first ground conductor and the bottom surface ground conductor;
the third through hole is spaced from the first line portion and is positioned next to the first line portion,
The thin-film circuit board according to claim 2 , wherein an area of the first through hole in a plan view is larger than an area of the third through hole in a plan view. the base portion further includes one or more fourth through holes located in the second region and penetrating from the upper surface to the lower surface,
the second ground conductor has a fourth via conductor located in the fourth through hole and electrically connecting the second ground conductor and the bottom surface ground conductor;
the fourth through hole is positioned adjacent to the first line portion with a gap therebetween, and is positioned on an opposite side of the third through hole with the first line portion interposed therebetween in the second direction,
The thin-film circuit board according to claim 3 , wherein an area of the second through hole in a plan view is larger than an area of the fourth through hole in a plan view. a second signal conductor located on the upper surface, between the first ground conductor and the second ground conductor, and spaced from the first signal conductor;
The second signal conductor is
A third electrode portion;
a fourth electrode portion located apart from the third electrode portion;
a third line portion connected to the third electrode portion and extending away from the first side surface;
a fourth line portion connected to the fourth electrode portion and extending toward the first side surface,
The thin-film circuit board according to claim 1 , wherein the base portion further includes a second opening located between the third electrode portion and the fourth electrode portion. a third ground conductor and a second signal conductor located on the top surface;
the upper surface has a third region located on the opposite side of the second region with respect to the first region in the second direction,
the third ground conductor is located in the third region;
The second signal conductor is
On the upper surface, the first ground conductor and the third ground conductor are located between the first ground conductor and the third ground conductor,
a third electrode portion, a fourth electrode portion located away from the third electrode portion, a third line portion connected to the third electrode portion and extending away from the third electrode portion, and a fourth line portion connected to the fourth electrode portion and extending in a direction opposite to a direction in which the third line portion extends,
the base portion further includes a second opening portion located between the third electrode portion and the fourth electrode portion, and one or more fifth through holes located in the first region and penetrating from the upper surface to the lower surface,
the first ground conductor has a fifth via conductor located in the fifth through hole and electrically connecting the third ground conductor and the bottom surface ground conductor;
the fifth through hole is positioned adjacent to the first through hole with a gap therebetween in the first direction,
the first through hole is located between the first opening and the second opening in the second direction,
The thin-film circuit board according to claim 1 , wherein an area of the first through hole in a plan view is larger than an area of the fifth through hole in a plan view. a third ground conductor and a second signal conductor located on the top surface;
the upper surface has a third region located on the opposite side of the second region with respect to the first region in the second direction,
the third ground conductor is located in the third region;
The second signal conductor is
On the upper surface, the first ground conductor and the third ground conductor are located between the first ground conductor and the third ground conductor,
a third electrode portion, a fourth electrode portion located away from the third electrode portion, a third line portion connected to the third electrode portion and extending away from the first side surface, and a fourth line portion connected to the fourth electrode portion and extending toward the first side surface,
the base portion further includes a second opening portion located between the third electrode portion and the fourth electrode portion, and one or more fifth through holes located in the first region and penetrating from the upper surface to the lower surface,
the first ground conductor has a fifth via conductor located in the fifth through hole and electrically connecting the third ground conductor and the bottom surface ground conductor;
the fifth through hole is positioned adjacent to the first through hole with a gap therebetween in the first direction,
the first through hole is located between the first opening and the second opening in the second direction,
an area of the first through hole in a plan view is larger than an area of the fifth through hole in a plan view;
The thin-film circuit board according to claim 3 , wherein an area of the fifth through hole in a plan view is larger than an area of the third through hole in a plan view. The thin-film circuit board according to claim 1, wherein, in a cross-sectional view perpendicular to the upper surface, the first opening has a curved portion that protrudes toward the lower surface. The thin-film circuit board according to claim 1, wherein the first opening penetrates from the upper surface to the lower surface. The thin-film circuit board according to claim 1, wherein, in a plan view, the lower surface ground conductor is positioned with a gap between it and the first opening. a first insulating coating layer located on the first ground conductor;
The thin-film circuit board according to claim 1 , wherein, in a plan view, the first insulating coating layer is positioned to surround the first through hole and is in contact with the first via conductor. a fourth ground conductor on the upper surface along the first side surface and electrically connecting the first ground conductor and the second ground conductor;
The thin-film circuit board according to claim 1 , wherein the second line portion is connected to the fourth ground conductor and has a first resistor. a first side ground conductor electrically connecting the fourth ground conductor and the bottom surface ground conductor;
the base portion has a first notch portion located on the first side surface and cut from the upper surface to the lower surface,
The thin-film circuit board according to claim 12 , wherein the first side ground conductor is located on a wall surface of the first cutout portion. A box having a storage section;
A package for mounting electronic components, comprising: the thin-film circuit board according to any one of claims 1 to 13 housed in the housing portion. The electronic component mounting package according to claim 14 ;
An electronic component accommodated in the accommodation portion;
a lid body positioned on the box body and covering an inside of the electronic component mounting package,
The electronic component is electrically connected to the thin-film circuit board.

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