JP2024054640A - Solid State Relays - Google Patents

Abstract

A semiconductor relay is provided that can achieve high output and suppress fluctuations in output current in response to fluctuations in a drive signal.
[Solution] A semiconductor relay 1 includes first and second input terminals 14, 15, first and second output terminals 16, 17, a drive circuit 2, a first FET 12, and a Zener diode 11. The first FET 12 is made of a compound semiconductor. The first FET 12 is connected to the first and second output terminals 16, 17, respectively, and is turned on and off by a drive signal from the drive circuit 2. A first output terminal 3 of the drive circuit 2 is connected to a gate electrode 12a of the first FET 12, and a second output terminal 4 is connected to a source electrode 12b, respectively. An anode electrode 11a of the Zener diode 11 is connected to a source electrode 12b of the first FET 12, and a cathode electrode 11b is connected to the gate electrode 12a, respectively.
[Selected Figure] Figure 1

Description

This disclosure relates to semiconductor relays.

Semiconductor relays have long been known as a means of transmitting signals. Semiconductor relays use MOS field effect transistors (Metal Oxide Semiconductor Field Effect Transistors; hereafter referred to as MOSFETs) as output elements, and are also called photo MOS relays.

In recent years, semiconductor relays have been required to have lower on-resistance, lower capacitance, and higher voltage resistance. In order to meet these demands, studies are being conducted on replacing conventionally used MOSFETs using semiconductor silicon (Si; hereafter simply referred to as silicon) with MOSFETs using compound semiconductors that have a higher voltage resistance than silicon (see, for example, Patent Document 1).

JP 2012-182188 A

When using a MOSFET as the output element of a semiconductor relay, in order to stabilize the output, it is required to use it in an operating region where the change in on-resistance is small relative to changes in the gate (G)-source (S) voltage.

However, in general, in MOSFETs using compound semiconductors with high breakdown voltage characteristics, such as silicon carbide (SiC) or gallium nitride (GaN), the region in which the change in on-resistance relative to the change in gate (G)-source (S) voltage is small is narrower than in the case of using silicon. If the change in on-resistance becomes large, there is a risk that the fluctuation in the output current of the MOSFET, and therefore the output current of the semiconductor relay, will increase accordingly.

This embodiment was made in consideration of these points, and its purpose is to provide a semiconductor relay that can achieve high output and suppress fluctuations in the output current in response to fluctuations in the drive signal.

To achieve the above object, the semiconductor relay according to the present disclosure includes a first input terminal, a second input terminal, a drive circuit connected to the first input terminal and the second input terminal and outputting a drive signal in response to an input signal applied between the first input terminal and the second input terminal, a first FET that is turned on and off by the drive signal output from the drive circuit, a first output terminal connected to the first FET, a second output terminal connected to the first FET, and a Zener diode connected to the drive circuit, the first output terminal of the drive circuit being connected to the gate of the first FET, the second output terminal of the drive circuit being connected to the source of the first FET, the anode of the Zener diode being connected to the source of the first FET, and the cathode of the Zener diode being connected to the gate of the first FET, and the first FET being made of a compound semiconductor.

This disclosure makes it possible to increase the output of semiconductor relays. It also makes it possible to suppress fluctuations in the output current in response to fluctuations in the drive signal.

FIG. 2 is an equivalent circuit diagram of the semiconductor relay according to the first embodiment. FIG. 2 is an equivalent circuit diagram of a drive circuit. FIG. 2 is a top view of a main part of the semiconductor relay according to the first embodiment. 11 is a diagram showing the temperature dependence of the output voltage of a photodiode array and the Zener voltage of a Zener diode. FIG. FIG. 11 is an equivalent circuit diagram of a semiconductor relay according to a second embodiment. FIG. 11 is a top view of a main part of a semiconductor relay according to a second embodiment. FIG. 11 is an equivalent circuit diagram of a semiconductor relay according to a third embodiment. FIG. 11 is a top view of a main part of a semiconductor relay according to a third embodiment. FIG. 11 is an equivalent circuit diagram of a semiconductor relay according to a fourth embodiment. FIG. 13 is a top view of a main part of a semiconductor relay according to a fourth embodiment. FIG. 13 is an equivalent circuit diagram of a semiconductor relay according to a fifth embodiment. FIG. 13 is a top view of a main part of a semiconductor relay according to a fifth embodiment. FIG. 13 is an equivalent circuit diagram of a semiconductor relay according to a sixth embodiment. FIG. 13 is a top view of a main part of a semiconductor relay according to a sixth embodiment. FIG. 13 is a top view of a main part of another semiconductor relay corresponding to the first embodiment. FIG. 13 is a top view of a main part of another semiconductor relay corresponding to the fourth embodiment.

Embodiments of the present disclosure will be described below with reference to the drawings. Note that the following description of the preferred embodiments is merely illustrative in nature and is not intended to limit the present disclosure, its applications, or its uses.

(Embodiment 1)
[Configuration of solid-state relay]
Fig. 1 shows an equivalent circuit diagram of a semiconductor relay according to the first embodiment, Fig. 2 shows an equivalent circuit diagram of a drive circuit, and Fig. 3 shows a top view of a main part of the semiconductor relay according to the first embodiment.

In the following description, the arrangement direction of the first input terminal 14 and the second input terminal 15 may be referred to as the X direction. Furthermore, the arrangement direction of the first input terminal 14 and the second output terminal 17 may be referred to as the Y direction. The direction perpendicular to each of the X direction and the Y direction may be referred to as the Z direction. Furthermore, in the Z direction, the side on which the LEDs 5 are arranged may be referred to as the top or upper side, and the side on which the light-driving IC 6 is arranged may be referred to as the bottom or lower side.

In this specification, "orthogonal" or "parallel" means that they are orthogonal or parallel, including the processing tolerances and manufacturing tolerances of each component that constitutes the semiconductor relay 1, and the assembly tolerances between the components. "The same" means that the processing tolerances and manufacturing tolerances of each component that constitutes the semiconductor relay 1, the assembly tolerances between the components, or the variations in electrical characteristics between the components are the same. This does not mean that the objects being compared are orthogonal, parallel, or the same in the strict sense.

For ease of explanation, in FIG. 3 and the following FIGS. 6, 8, 10, 12, and 14, the LED 5 and the light driving IC 6 are shown spaced apart in the Y direction, but this is different from the actual situation.

In reality, the LED 5 and the light-driving IC 6 are spaced apart in the Y direction, and are arranged so that the LED 5 and the photodiode array 7 formed on the light-driving IC 6 face each other when viewed from above. Therefore, the internal arrangement portion 15a of the second input terminal 15 and the second substrate 19 on which the light-driving IC 6 is arranged are spaced apart in the Y direction, and are arranged so that a portion of each overlaps with the other when viewed from above.

In addition, in FIG. 3 and the following FIGS. 6, 8, 10, 12, and 14, the shapes of the first input terminal 14, the second input terminal 15, the first output terminal 16, and the second output terminal 17 are different from the actual shapes.

As shown in Figures 1 and 3, the semiconductor relay 1 includes a first input terminal 14, a second input terminal 15, a first output terminal 16, a second output terminal 17, a second substrate 19, a drive circuit 2, a Zener diode 11, and a first MOSFET 12.

As shown in FIG. 1, the first input terminal 14 and the second input terminal 15 are connected to the drive circuit 2. In addition, the Zener diode 11 is connected between the first output terminal 3 and the second output terminal 4 of the drive circuit 2. Specifically, the cathode electrode 11b of the Zener diode 11 is connected to the first output terminal 3 of the drive circuit 2, and the anode electrode 11a of the Zener diode 11 is connected to the second output terminal 4 of the drive circuit 2.

The anode electrode 11a of the Zener diode 11 is connected to the source electrode 12b of the first MOSFET 12, and the cathode electrode 11b of the Zener diode 11 is connected to the gate electrode 12a of the first MOSFET 12. The drain electrode 12c of the first MOSFET 12 is connected to the first output terminal 16, and the source electrode 12b of the first MOSFET 12 is connected to the second output terminal 17. The connection relationship between each terminal and each electrode will be described in detail later.

In this specification, the term "connected" simply means that multiple components are electrically connected. In this case, multiple components may be electrically connected not only through a conductive member such as metal wire 23, but also through a conductive member other than metal wire 23, an inductor, a resistor, etc.

"Directly connected" refers to a state in which two components are electrically connected and are also physically attached or fixed to each other. In this embodiment, when two components are directly connected, the two components are attached to each other via a conductive adhesive such as silver paste or cream solder.

In addition, in the first MOSFET 12 and the second MOSFET 13 described later, the gate, source, and drain in the equivalent circuit are sometimes referred to as the gate (G), source (S), and drain (D), respectively.

As shown in FIG. 3, in the semiconductor relay 1, the first input terminal 14, the second input terminal 15, the first output terminal 16, and the second output terminal 17 each have a portion exposed to the outside of the housing 22 and a portion that is continuous with the exposed portion and is housed inside the housing 22.

In the following description, the portions of the first input terminal 14, the second input terminal 15, the first output terminal 16, and the second output terminal 17 housed within the housing 22 may be referred to as the internally disposed portions 14a, 15a, 16a, and 17a, respectively. The upper and lower surfaces of the internally disposed portions 14a, 15a, 16a, and 17a are formed so that their respective normals are parallel to the Z direction.

Furthermore, the internal placement portion 14a of the first input terminal 14 and the internal placement portion 15a of the second input terminal 15 are located at the same height, using the bottom surface of the housing 22 as a reference. The internal placement portion 16a of the second board 19, the first output terminal 16, and the internal placement portion 17a of the second output terminal 17, which will be described later, are located lower than the internal placement portion 15a of the second input terminal 15. In this embodiment, the internal placement portion 16a of the first output terminal 16 and the internal placement portion 17a of the second output terminal 17 are located at the same height, using the bottom surface of the housing 22 as a reference. However, they may be located at different heights, using the bottom surface of the housing 22 as a reference.

The internal arrangement portion 16a of the first output terminal 16 is sometimes referred to as the first board 18, and the internal arrangement portion 17a of the second output terminal 17 is sometimes referred to as the third board 20.

Although not shown, each of the parts exposed to the outside protrudes from the side of the housing 22 in parallel with the bottom surface of the housing 22. Each of the parts exposed to the outside is located below the bottom surface of the housing 22. In other words, the semiconductor relay 1 is a surface-mount type semiconductor relay 1.

As shown in FIG. 2, the driving circuit 2 includes an LED 5 (light-emitting element 5) and an optical driving IC 6. The optical driving IC 6 is an integrated circuit made of silicon, and includes a photodiode array 7 (light-receiving element 7) and a gate charge/discharge circuit 8.

The photodiode array 7 is a light receiving element consisting of multiple photodiodes connected in series. Adjacent photodiodes are connected at the cathode of one end and the anode of the other end. Thus, one end of the photodiode array 7 is an anode, and the other end is a cathode. In the following explanation, the anode located at one end of the photodiode is sometimes referred to as the anode of the photodiode array 7, and the cathode located at the other end is sometimes referred to as the cathode of the photodiode array 7.

The gate charge/discharge circuit 8 is composed of a MOSFET 9 connected in parallel to the photodiode array 7, and a resistor 10 connecting the gate and source of the MOSFET 9. The MOSFET 9 is a depletion-type MOSFET. The configuration of the gate charge/discharge circuit 8 is not particularly limited to that shown in FIG. 2. It is sufficient that the gate charge/discharge circuit 8 is configured to be able to charge or discharge the gate (G)-source (S) capacitance of the first MOSFET 12 and the second MOSFET 13 (described later) according to the output current or output voltage of the photodiode array 7.

As shown in FIG. 2, the Zener diodes 11 are connected in parallel to the photodiode array 7 via the gate charge/discharge circuit 8. The anode of the photodiode array 7 is connected to the first output terminal 3 of the light driving IC 6, that is, the first output terminal 3 of the driving circuit 2. The cathode of the photodiode array 7 is connected to the second output terminal 4 of the light driving IC 6, that is, the second output terminal 4 of the driving circuit 2. The Zener diodes 11 in this embodiment are made of silicon (Si).

The anode of the photodiode array 7 is connected to the cathode electrode 11b of the Zener diode 11 via the first output terminal 3 of the drive circuit 2. The cathode of the photodiode array 7 is connected to the anode electrode 11a of the Zener diode 11 via the second output terminal 4 of the drive circuit 2. In other words, when a voltage is generated in the photodiode array 7, the Zener diode 11 is reverse-biased by the output voltage.

As shown in FIG. 3, the first input terminal 14 is a conductive member made of a metal conductor such as copper. The second input terminal 15, the first output terminal 16, the second output terminal 17, and the second substrate 19 are also conductive members made of the same material as the first input terminal 14. Usually, these members made of the same material are obtained by punching a single lead frame and then bending it, etc.

The internal portion 14a of the first input terminal 14 is connected to the anode electrode (not shown) of the LED 5 by a metal wire 23 (hereinafter simply referred to as wire 23).

The LED 5 is mounted on the underside of the internal placement portion 15a of the second input terminal 15. Specifically, the cathode electrode (not shown) of the LED 5 is directly connected to the internal placement portion 15a via the conductive adhesive (not shown) described above. Therefore, when a signal having a predetermined voltage value is input between the first input terminal 14 and the second input terminal 15, the LED 5 outputs light of a predetermined wavelength, in this case near-infrared light.

The first output terminal 16 is arranged opposite the second input terminal 15 at a predetermined distance in the Y direction. The first MOSFET 12 is arranged in the internal arrangement portion 16a of the first output terminal 16. The first output terminal 16 is also connected to the drain electrode 12c of the first MOSFET 12 via a wire 23.

In this embodiment, the first MOSFET 12 is directly connected to the internal portion 16a of the first output terminal 16 by the conductive adhesive material described above. However, if the first MOSFET 12 is configured so that the source potential is the same as the substrate potential, the first MOSFET 12 may be fixed to the internal portion 16a of the first output terminal 16 via an insulating adhesive material.

The second substrate 19 is disposed between the first output terminal 16 and the second output terminal 17 and at a distance from each other. The light-driving IC 6 and the Zener diode 11 are disposed on the second substrate 19. The light-driving IC 6 is directly connected to the second substrate 19 by the conductive adhesive material described above. However, the light-driving IC 6 may also be fixed to the second substrate 19 via an insulating adhesive material.

The cathode electrode 11b (see FIG. 2) of the Zener diode 11 is directly connected to the second substrate 19 by the conductive adhesive material described above. The first output terminal 3 of the drive circuit 2 is connected to the second substrate 19 via a wire 23. The gate electrode 12a of the first MOSFET 12 is connected to the second substrate 19 via a wire 23. In other words, the cathode electrode 11b of the Zener diode 11 and the first output terminal 3 of the drive circuit 2 are connected to the gate electrode 12a of the first MOSFET 12 via the second substrate 19 and the wire 23.

The second output terminal 17 is disposed opposite the first input terminal 14 at a predetermined interval in the Y direction. The anode electrode 11a of the Zener diode 11 is connected to the second output terminal 17 via a wire 23. The second output terminal 4 of the drive circuit 2 is connected to the second output terminal 17 via a wire 23. The source electrode 12b of the first MOSFET 12 is connected to the second substrate 19 via a wire 23. In other words, the anode electrode 11a of the Zener diode 11 and the second output terminal 4 of the drive circuit 2 are connected to the source electrode 12b of the first MOSFET 12 via the wire 23.

As shown in FIG. 3, the first MOSFET 12 is a known lateral MOSFET and is made of silicon carbide (hereinafter referred to as SiC). The first MOSFET 12 may be a known vertical MOSFET, in which case a drain electrode 12c is formed on the underside of the first MOSFET 12, and the drain electrode 12c is directly connected to the first output terminal 16. When the first MOSFET 12 is a lateral MOSFET, the drain and source regions are formed so as to be symmetrical with respect to the gate electrode 12a. However, the area of the drain region may be larger than the area of the source region when viewed from above.

The housing 22 is provided to seal each component of the semiconductor relay 1, fix the position of each component, and mechanically protect each component except for the part exposed to the outside of the housing 22. The housing 22 is made of light-shielding resin except for the space between the LED 5 and the photodiode array 7. In other words, the housing 22 in this embodiment is a resin molded body obtained by resin-molding each component of the semiconductor relay 1. However, the space between the light-emitting surface of the LED 5 and the light-receiving surface of the photodiode array 7 is filled with a translucent resin (not shown) that transmits the output light of the LED 5. Therefore, the output light of the LED 5 is received by the photodiode array 7 only through the arrangement space of the translucent resin. This makes it possible to prevent malfunctions caused by the output light of the LED 5 in other components, such as the gate charge/discharge circuit 8 and the first MOSFET 12.

In addition, both the light-shielding resin and the light-transmitting resin are insulating resins. By configuring the housing 22 in this way, insulation between the components housed inside the housing 22 is ensured, and unintended operation of the semiconductor relay 1 can be prevented.

The housing 22 may be a hollow package as long as insulation between the components is ensured. In this case, however, it is necessary to optically separate the space between the light-emitting surface of the LED 5 and the light-receiving surface of the photodiode array 7 from the rest of the space using a light-shielding material (not shown) or the like.

[Semiconductor relay operation]
A predetermined signal is applied between the first output terminal 16 and the second output terminal 17 so that the first output terminal 16 has a higher potential than the second output terminal 17 .

When a signal with a voltage value exceeding the threshold voltage of LED5 is input between the first input terminal 14 and the second input terminal 15, LED5 outputs near-infrared light as described above. The light generated by LED5 propagates inside the translucent resin (not shown) and is received by the photodiode array 7.

In each photodiode included in the photodiode array 7, a current is generated by photoelectric conversion, and the voltage across the photodiode increases. As described above, the photodiodes in the photodiode array 7 are connected in series. Therefore, the voltage across the photodiode array 7, that is, the output voltage of the photodiode array 7, is the sum of the output voltages of the individual photodiodes.

The current flowing through the photodiode array 7 also flows through resistor 10 of the gate charge/discharge circuit 8. This causes the gate of MOSFET 9 to be negatively biased with respect to the source, turning MOSFET 9 off. As a result, the current flowing through the photodiode array 7 charges between the gate (G) and source (S) of the first MOSFET 12. Note that by turning MOSFET 9 off, the voltage between the first output terminal 3 and the second output terminal 4 of the drive circuit 2, in other words the drive signal output from the drive circuit 2, becomes the same as the output voltage of the photodiode array 7.

The first output terminal 3 and the second output terminal 4 of the drive circuit 2 are connected to the gate electrode 12a and the source electrode 12b of the first MOSFET 12, respectively. Therefore, the gate (G)-source (S) voltage of the first MOSFET 12 is also the same as the output voltage of the photodiode array 7. When the output voltage exceeds the threshold voltage of the first MOSFET 12, the source (S)-drain (D) of the first MOSFET 12 is turned on, and the first output terminal 16 and the second output terminal 17 are in a conductive state. In other words, the output signal flowing between the first output terminal 16 and the second output terminal 17 is turned on.

When the input of the signal between the first input terminal 14 and the second input terminal 15 stops, the LED 5 also stops emitting light. In response, no current is generated in the photodiode array 7, and the voltage across the resistor 10 in the gate charge/discharge circuit 8 drops. When the voltage drop across the resistor 10 becomes small, the MOSFET 9 transitions from the off state to the on state. The gate (G)-source (S) of the first MOSFET 12 is shorted by the MOSFET 9, and the charge accumulated between the gate (G)-source (S) is discharged.

As a result, the voltage drops between the gate (G) and source (S) of the first MOSFET 12. When this voltage falls below the threshold voltage of the first MOSFET 12, the source (S) and drain (D) of the first MOSFET 12 are turned off, and the first output terminal 16 and the second output terminal 17 are turned off. In other words, the output signal flowing between the first output terminal 16 and the second output terminal 17 is turned off.

In this embodiment, when the output light from the LED 5 is received, a current flows through the photodiode array 7, and the drive circuit 2 is operating, the output voltage of the photodiode array 7 is designed to be sufficiently higher than the threshold voltage of the first MOSFET 12. Meanwhile, the Zener diode 11 is connected in parallel with the photodiode array 7, and is reverse biased while the drive circuit 2 is operating. Therefore, even if the output voltage of the photodiode array 7 increases significantly, the gate (G)-source (S) voltage of the first MOSFET 12 is clamped by the Zener voltage of the Zener diode 11, and does not increase above the Zener voltage.

[Effects, etc.]
As described above, the semiconductor relay 1 according to this embodiment at least includes the first input terminal 14, the second input terminal 15, the first output terminal 16, the second output terminal 17, the drive circuit 2, and the first MOSFET 12.

The drive circuit 2 is connected to the first input terminal 14 and the second input terminal 15, and outputs a drive signal in response to an input signal applied between the first input terminal 14 and the second input terminal 15. More specifically, the drive circuit 2 has an LED 5 (light-emitting element 5) and a photodiode array 7 (light-receiving element 7) that faces the LED 5 in the Y direction and receives the light emitted from the LED 5.

The drive circuit 2 is also connected to a Zener diode 11. More specifically, the Zener diode 11 is connected in parallel to the photodiode array 7 of the drive circuit 2. The anode of the photodiode array 7 is connected to the cathode electrode 11b of the Zener diode 11, and the cathode of the photodiode array 7 is connected to the anode electrode 11a of the Zener diode 11.

The first MOSFET 12 is turned on and off by a drive signal output from the drive circuit 2. The first MOSFET 12 is also connected to a first output terminal 16 and a second output terminal 17. The first MOSFET 12 is made of SiC, which is a compound semiconductor.

The anode of the photodiode array 7, which has the same potential as the first output terminal 3 of the drive circuit 2, is connected to the gate electrode 12a of the first MOSFET 12. The cathode of the photodiode array 7, which has the same potential as the second output terminal 4 of the drive circuit 2, is connected to the source electrode 12b of the first MOSFET 12.

The anode electrode 11a of the Zener diode 11 is connected to the source electrode 12b of the first MOSFET 12, and the cathode electrode 11b of the Zener diode 11 is connected to the gate electrode 12a of the first MOSFET 12.

According to this embodiment, by constructing the first MOSFET 12 from SiC, which has a higher withstand voltage than silicon, the semiconductor relay 1 can have a higher withstand voltage than when a MOSFET made of silicon is used. Furthermore, compared to a MOSFET made of silicon with the same withstand voltage, the resistance of the epitaxial layer in which the MOSFET is formed can be significantly reduced, and the on-resistance can be reduced by about two orders of magnitude accordingly. Furthermore, to obtain a MOSFET with the same withstand voltage, the area of the MOSFET can be made smaller than that of silicon. This allows the semiconductor relay 1 to have a lower capacitance. As a result, the semiconductor relay 1 can have a higher output.

In addition, according to this embodiment, a Zener diode 11 is connected in parallel between the gate (G) and source (S) of the first MOSFET 12.

As mentioned above, in a MOSFET using SiC, the fluctuation range of the gate (G)-source (S) voltage, over which the change in on-resistance is small, is narrower than in the case of using silicon. For example, in the example shown in this embodiment, the target value of the gate (G)-source (S) voltage is set to 20 V. This target value is a value that allows the first MOSFET 12 to operate with a sufficiently low on-resistance while keeping the gate (G)-source (S) voltage within the rated range. Meanwhile, in this case, a range of about the target value ±2 V is a usable operating region with small fluctuations in on-resistance.

On the other hand, in a silicon MOSFET, the usable range of gate (G)-source (S) voltage is 5V to 20V, which is wider than the above case.

The light emission efficiency of the LED 5 changes according to the ambient temperature of the semiconductor relay 1, and the output voltage of the photodiode array 7, which corresponds to the drive signal, fluctuates accordingly. The ambient temperature of the semiconductor relay 1 collectively refers to the temperature inside the semiconductor relay 1 and the temperature of the external environment of the semiconductor relay 1. When the temperature of each element housed inside the housing 22 rises during operation of the semiconductor relay 1, the ambient temperature also rises.

For example, when the ambient temperature drops, the amount of light output from LED 5 increases, and the output voltage from photodiode array 7 rises. On the other hand, when the ambient temperature rises, the amount of light output from LED 5 decreases, and the output voltage from photodiode array 7 drops.

In this way, the output voltage of the photodiode array 7, that is, the voltage applied between the gate (G) and source (S) of the first MOSFET 12, fluctuates. If the fluctuation range exceeds the aforementioned range, it will fall outside the appropriate operating range of the first MOSFET 12 in the semiconductor relay 1.

On the other hand, as shown in this embodiment, by connecting a Zener diode 11 in parallel between the gate (G) and source (S) of the first MOSFET 12, the gate (G)-source (S) voltage is clamped to the Zener voltage of the Zener diode 11.

The Zener diode 11 is connected in parallel to the photodiode array 7. The anode of the photodiode array 7 is connected to the cathode electrode 11b of the Zener diode 11, and the cathode of the photodiode array 7 is connected to the anode electrode 11a of the Zener diode 11.
In this way, for example, by using a Zener diode 11 with a Zener voltage of 20 V, even if the output voltage of the photodiode array 7 corresponding to the drive signal fluctuates, the gate (G)-source (S) voltage of the first MOSFET 12 can be stabilized in the usable region. In other words, fluctuations in the output current of the first MOSFET 12 can be suppressed. In addition, the on-resistance of the first MOSFET 12 can be reduced, and the output current can be increased.

In addition, according to this embodiment, the gate (G)-source (S) voltage of the first MOSFET 12 can be stabilized within the usable range even when the ambient temperature of the semiconductor relay 1 changes significantly, and the semiconductor relay 1 can be made to have a high output. This will be further explained with reference to FIG. 4.

Figure 4 shows the temperature dependence of the output voltage of the photodiode array and the Zener voltage of the Zener diode.

In order to increase the output current of the first MOSFET 12, it is possible to increase the gate (G)-source (S) voltage of the first MOSFET 12 as much as possible within the usable region.

However, as the output current of the first MOSFET 12 increases, the amount of heat generated by the first MOSFET 12 also increases, causing the internal temperature of the semiconductor relay 1 to rise. Apart from this, the temperature of the external environment in which the semiconductor relay 1 is placed may also rise. In the following explanation, the temperature inside the semiconductor relay 1 and the temperature of the external environment of the semiconductor relay 1 are collectively referred to as the ambient temperature of the semiconductor relay 1.

In general, the output voltage of a photodiode has a negative temperature dependency, so as the ambient temperature of the semiconductor relay 1 increases, the output voltage of the photodiode array 7 also decreases. This causes the gate (G)-source (S) voltage of the first MOSFET 12, and therefore the output current of the semiconductor relay 1, to decrease.

On the other hand, in this embodiment, the gate (G)-source (S) voltage of the first MOSFET 12 is clamped to the Zener voltage, so the aforementioned decrease in the output current of the semiconductor relay 1 does not appear to occur.

However, if the Zener voltage of the Zener diode 11 has a negative temperature dependency, like the output voltage of the photodiode array 7, then as the ambient temperature rises, both the output voltage of the photodiode array 7 and the Zener voltage will decrease. In this case, as the Zener voltage decreases, the gate (G)-source (S) voltage of the first MOSFET 12 is not clamped to the desired value, and the output current of the semiconductor relay 1 may fall below the desired range.

On the other hand, the Zener voltage of the Zener diode 11 generally has different temperature dependencies depending on its value. When the Zener voltage is 5V or less, the Zener voltage decreases as the ambient temperature increases, with the Zener voltage being 5V as the boundary. In other words, the Zener voltage in this case has a negative temperature dependency. On the other hand, when the Zener voltage exceeds 5V, the Zener voltage increases as the ambient temperature increases. In other words, the Zener voltage in this case has a positive temperature dependency.

In consideration of this, in this embodiment, a Zener diode 11 whose Zener voltage has a positive temperature dependency is applied to the semiconductor relay 1. As a result, as shown by the rectangular frame in FIG. 4, when the ambient temperature is in the range of -40°C to +100°C, the Zener voltage varies in the range of 18V to 23V. In other words, when the ambient temperature is in the range of -40°C to +100°C, the output voltage of the photodiode array 7 is clamped in the range of 18V to 23V. This makes it possible to prevent the output current of the semiconductor relay 1 from falling outside the desired range.

In the example shown in FIG. 4, a photodiode array 7 is used in which 29 photodiodes are connected in series, and the temperature dependency of the output voltage is -0.068 V/°C (-2.34 mV/°C per photodiode). However, the number of photodiodes included in the photodiode array 7 is not particularly limited to this. Also, even if the number of photodiodes is the same, if the amount of light output by the LED 5 increases, the output voltage of the photodiode array 7 will increase.

The Zener voltage of the Zener diode 11 can be changed as appropriate according to the target value of the gate (G)-source (S) voltage of the first MOSFET 12. In addition, in the range in which the temperature dependency of the Zener voltage is positive, the temperature coefficient of the voltage increase increases as the Zener voltage increases. In the example shown in FIG. 4, the temperature coefficient of the Zener voltage is +16 mV/°C, but if a Zener diode 11 with a different Zener voltage is used, the temperature coefficient also changes. Therefore, in order to operate the first MOSFET 12 stably against changes in the ambient temperature, it is necessary to appropriately select the number of photodiodes included in the photodiode array 7, the amount of light output by the LED 5, and further the Zener voltage of the Zener diode 11.

In addition, in this embodiment, the internal arrangement portion 16a (first substrate 18) of the first output terminal 16 is directly connected to the first MOSFET 12. This allows heat generated during operation of the first MOSFET 12 to be discharged to the outside via the first output terminal 16, thereby improving the operational stability of the first MOSFET 12.

(Embodiment 2)
Fig. 5 shows an equivalent circuit diagram of the semiconductor relay according to the second embodiment, and Fig. 6 shows a top view of the main part of the semiconductor relay according to the second embodiment. For ease of explanation, in Figs. 5 and 6 and the subsequent drawings, the same reference numerals are used for the same parts as those in the first embodiment, and detailed explanations thereof will be omitted.

The semiconductor relay 1 of this embodiment shown in Figures 5 and 6 differs from the semiconductor relay 1 of embodiment 1 shown in Figures 1 and 3 in the following ways.

First, the semiconductor relay 1 further includes a second MOSFET 13 as an output element. Like the first MOSFET 12, the second MOSFET 13 is made of SiC. The input/output characteristics of the second MOSFET 13 are configured to be the same as those of the first MOSFET 12. For example, the threshold voltage of the second MOSFET 13 is the same as the threshold voltage of the first MOSFET 12.

Secondly, the first output terminal 3 of the drive circuit 2, in other words, the anode of the photodiode array 7, is also connected to the gate electrode 13a of the second MOSFET 13 via the wire 23 and the second substrate 19. In addition, the cathode electrode 11b of the Zener diode 11 is directly connected to the second substrate 19. Therefore, the cathode electrode 11b of the Zener diode 11 is also connected to the gate electrode 13a of the second MOSFET 13.

Thirdly, the second output terminal 4 of the drive circuit 2, in other words, the cathode of the photodiode array 7, is also connected to the source electrode 13b of the second MOSFET 13 via the wire 23 and the anode electrode 11a of the Zener diode 11. In other words, the anode electrode 11a of the Zener diode 11 is also connected to the source electrode 13b of the second MOSFET 13.

The semiconductor relay 1 in this embodiment operates as follows:

It is assumed that a predetermined signal is applied between the first output terminal 16 and the second output terminal 17 so that the first output terminal 16 has a different potential relative to the second output terminal 17.

When an input signal is applied between the first input terminal 14 and the second input terminal 15, as described above, the voltage between the first output terminal 3 and the second output terminal 4 of the drive circuit 2, in other words, the drive signal output from the drive circuit 2, becomes the same as the output voltage of the photodiode array 7.

The first output terminal 3 of the drive circuit 2 is connected to the gate electrodes 12a, 13a of the first MOSFET 12 and the second MOSFET 13. The second output terminal 4 of the drive circuit 2 is connected to the source electrodes 12b, 13b of the first MOSFET 12 and the second MOSFET 13. When the output voltage of the photodiode array 7 rises above the threshold voltages of the first MOSFET 12 and the second MOSFET 13, the source (S)-drain (D) of the first MOSFET 12 and the second MOSFET 13 are turned on. As a result, the first output terminal 16 and the second output terminal 17 are turned on. In other words, the output signal is turned on between the first output terminal 16 and the second output terminal 17 based on the input signal applied between the first input terminal 14 and the second input terminal 15.

When the input of the signal between the first input terminal 14 and the second input terminal 15 stops, the light emission from the LED 5 also stops. In response, the current stops flowing in the photodiode array 7, and as a result, the drive circuit 2 stops.

As a result, the voltage drops between the gate (G) and source (S) of the first MOSFET 12 and the second MOSFET 13. When this voltage falls below the threshold voltage of the first MOSFET 12 and the second MOSFET 13, the source (S) and drain (D) of the first MOSFET 12 and the second MOSFET 13 are each turned off, and a non-conductive state is established between the first output terminal 16 and the second output terminal 17. As a result, the output signal between the first output terminal 16 and the second output terminal 17 is turned off.

Also, as in the first embodiment, even if the output voltage of the photodiode array 7 increases significantly, the gate (G)-source (S) voltages of the first MOSFET 12 and the second MOSFET 13 are clamped to the Zener voltage of the Zener diode 11, and do not increase above the Zener voltage.

As described above, this embodiment can achieve the same effects as the configuration shown in embodiment 1. In other words, the semiconductor relay 1 can have a high withstand voltage, low on-resistance, and low capacitance. As a result, the output current of the semiconductor relay 1 can be increased.

In addition, even if the output voltage of the photodiode array 7, which corresponds to the drive signal, fluctuates, the gate (G)-source (S) voltages of the first MOSFET 12 and the second MOSFET 13 can be stabilized in their respective usable ranges. Furthermore, even if the ambient temperature of the semiconductor relay 1 changes significantly, the gate (G)-source (S) voltages of the first MOSFET 12 and the second MOSFET 13 can be stabilized in their respective usable ranges. As a result, the output current of the semiconductor relay 1 can be increased.

In addition, unlike the configuration shown in embodiment 1, according to this embodiment, a signal can be transmitted from the first output terminal 16 to the second output terminal 17, and also from the second output terminal 17 to the first output terminal 16. In other words, a signal can be transmitted in both directions between the first output terminal 16 and the second output terminal 17.

In this embodiment, not only is the internal portion 16a (first substrate 18) of the first output terminal 16 directly connected to the first MOSFET 12, but the internal portion 17a (third substrate 20) of the second output terminal 17 is directly connected to the second MOSFET 13. This allows heat generated during operation of the first MOSFET 12 to be discharged to the outside via the first output terminal 16, improving the operational stability of the first MOSFET 12. At the same time, heat generated during operation of the second MOSFET 13 can be discharged to the outside via the second output terminal 17, improving the operational stability of the second MOSFET 13.

(Embodiment 3)
FIG. 7 shows an equivalent circuit diagram of a semiconductor relay according to the third embodiment, and FIG. 8 shows a top view of a main part of the semiconductor relay according to the third embodiment.

The semiconductor relay 1 of this embodiment shown in Figures 7 and 8 differs from the semiconductor relay 1 of embodiment 2 shown in Figures 5 and 6 in the following ways.

As shown in FIG. 8, the first MOSFET 12 and the second MOSFET 13 are formed on the same chip. In addition, the first MOSFET 12 and the second MOSFET 13 share the same gate (G) and source (S).

Specifically, the drain (D) of the first MOSFET 12 and the drain (D) of the second MOSFET 13 are formed on the same chip, spaced apart from each other. A common gate (G) is formed to surround the outer edge of each drain (D). In addition, a common source (S) is formed at a position facing the drain (D) across the gate (G).

The first MOSFET 12 and the second MOSFET 13 formed on the same chip are directly connected to the fourth substrate 21. The fourth substrate 21 is housed inside the housing 22 and is a conductive member made of the same material as the first input terminal 14, the second input terminal 15, the first input terminal 14, the second input terminal 15, and the second substrate 19. The fourth substrate 21 is physically separated from the first output terminal 16, the second output terminal 17, and the second substrate 19.

The common gate electrode 12a (13a) of the first MOSFET 12 and the second MOSFET 13 is connected to the second substrate 19 by a wire 23. The source electrode 12b of the first MOSFET 12 is connected to the second output terminal 4 of the drive circuit 2 by a wire 23. The source electrode 13b of the second MOSFET 13 is connected to the anode electrode 11a of the Zener diode 11, which has the same potential as the second output terminal 4 of the drive circuit 2, by a wire 23. The drain electrode 12c of the first MOSFET 12 is connected to the first output terminal 16, and the drain electrode 13c of the second MOSFET 13 is connected to the second output terminal 17 by a wire 23.

According to this embodiment, it is possible to achieve the same effects as the configuration shown in embodiment 2. In other words, it is possible to achieve a high voltage resistance, low on-resistance, and low capacitance of the semiconductor relay 1. As a result, it is possible to achieve a high output of the semiconductor relay 1.

In addition, even if there is a fluctuation in the output voltage of the photodiode array 7, which corresponds to the drive signal, or a large change in the ambient temperature of the semiconductor relay 1, the gate (G)-source (S) voltages of the first MOSFET 12 and the second MOSFET 13 can be stabilized within their respective usable ranges. As a result, the output current of the semiconductor relay 1 can be increased.

Furthermore, according to this embodiment, a signal can be transmitted from the first output terminal 16 to the second output terminal 17, and also from the second output terminal 17 to the first output terminal 16. In other words, a signal can be transmitted in both directions between the first output terminal 16 and the second output terminal 17.

In addition, according to this embodiment, the first MOSFET 12 and the second MOSFET 13 are formed on the same chip, and each has a common gate (G) and source (S). In this way, the total area of the first MOSFET 12 and the second MOSFET 13 can be made smaller than that of the example shown in embodiment 2. This allows the semiconductor relay 1 to be made smaller.

In addition, the number of wires 23 connecting the first MOSFET 12 and the second MOSFET 13 to other components and members can be reduced compared to the example shown in embodiment 2. This simplifies the wire bonding process, and reduces the manufacturing time and manufacturing costs of the semiconductor relay 1. Furthermore, by reducing the number of wires 23, the high-frequency characteristics of the transmission signal in the semiconductor relay 1 can be improved.

(Embodiment 4)
FIG. 9 shows an equivalent circuit diagram of the semiconductor relay according to the fourth embodiment, and FIG. 10 shows a top view of a main part of the semiconductor relay according to the fourth embodiment.

The semiconductor relay 1 of this embodiment shown in Figures 9 and 10 differs from the semiconductor relay 1 of embodiment 1 shown in Figures 1 and 3 in that the Zener diode 11 is built into the light-driven IC 6, in other words, the Zener diode 11 is arranged on the same chip as the drive circuit 2. In other words, inside the light-driven IC 6, the cathode electrode 11b of the Zener diode 11 is connected to the first output terminal 3 of the drive circuit 2, and the anode electrode 11a is connected to the second output terminal 4 of the drive circuit 2.

According to this embodiment, it is possible to achieve the same effects as the configuration shown in the first embodiment. In other words, it is possible to achieve a high voltage resistance, low on-resistance, and low capacitance of the semiconductor relay 1. As a result, it is possible to achieve a high output of the semiconductor relay 1.

In addition, even if there is a fluctuation in the output voltage of the photodiode array 7, which corresponds to the drive signal, or a large change in the ambient temperature of the semiconductor relay 1, the gate (G)-source (S) voltages of the first MOSFET 12 and the second MOSFET 13 can be stabilized within their respective usable ranges. As a result, the output current of the semiconductor relay 1 can be increased.

In addition, the number of wires 23 connecting the first MOSFET 12 and the second MOSFET 13 to other components and members can be reduced compared to the example shown in embodiment 1. Furthermore, the number of wires 23 can be reduced by incorporating the Zener diode 11 in the drive circuit 2. As a result, the wire bonding process can be simplified, and the manufacturing time and manufacturing costs of the semiconductor relay 1 can be reduced. Furthermore, by reducing the number of wires 23, the high-frequency characteristics of the transmission signal in the semiconductor relay 1 can be improved.

(Embodiment 5)
FIG. 11 is an equivalent circuit diagram of a semiconductor relay according to the fifth embodiment, and FIG. 12 is a top view of a main part of the semiconductor relay according to the fifth embodiment.

The semiconductor relay 1 of this embodiment shown in Figures 11 and 12 differs from the semiconductor relay 1 of embodiment 2 shown in Figures 5 and 6 in that the Zener diode 11 is built into the light-driven IC 6, in other words, the Zener diode 11 is arranged on the same chip as the drive circuit 2. As in embodiment 4, inside the light-driven IC 6, the cathode electrode 11b of the Zener diode 11 is connected to the first output terminal 3 of the drive circuit 2, and the anode electrode 11a is connected to the second output terminal 4 of the drive circuit 2.

In this embodiment, the drive circuit 2 has two first output terminals 3, which are electrically connected inside the light drive IC 6. One of the first output terminals 3 is connected to the gate electrode 12a of the first MOSFET 12 by a wire 23. The other first output terminal 3 is connected to the gate electrode 13a of the second MOSFET 13 by a wire 23.

According to this embodiment, it is possible to achieve the same effects as the configuration shown in embodiment 2. In other words, it is possible to achieve a high voltage resistance, low on-resistance, and low capacitance of the semiconductor relay 1. As a result, it is possible to achieve a high output of the semiconductor relay 1.

In addition, even if there is a fluctuation in the output voltage of the photodiode array 7, which corresponds to the drive signal, or a large change in the ambient temperature of the semiconductor relay 1, the gate (G)-source (S) voltages of the first MOSFET 12 and the second MOSFET 13 can be stabilized within their respective usable ranges. As a result, the output current of the semiconductor relay 1 can be increased.

In addition, signals can be transmitted in both directions between the first output terminal 16 and the second output terminal 17.

In addition, the number of wires 23 connecting the first MOSFET 12 and the second MOSFET 13 to other components and members can be reduced compared to the example shown in embodiment 2. Furthermore, the number of wires 23 can be reduced by incorporating the Zener diode 11 in the drive circuit 2. As a result, the wire bonding process can be simplified, and the manufacturing time and manufacturing costs of the semiconductor relay 1 can be reduced. Furthermore, by reducing the number of wires 23, the high-frequency characteristics of the transmission signal in the semiconductor relay 1 can be improved.

(Embodiment 6)
FIG. 13 is an equivalent circuit diagram of a semiconductor relay according to the sixth embodiment, and FIG. 14 is a top view of a main part of the semiconductor relay according to the sixth embodiment.

The semiconductor relay 1 of this embodiment shown in Figures 13 and 14 differs from the semiconductor relay 1 of embodiment 3 shown in Figures 7 and 8 in that the Zener diode 11 is built into the light-driven IC 6, in other words, the Zener diode 11 is arranged on the same chip as the drive circuit 2. As in embodiment 4, inside the light-driven IC 6, the cathode electrode 11b of the Zener diode 11 is connected to the first output terminal 3 of the drive circuit 2, and the anode electrode 11a is connected to the second output terminal 4 of the drive circuit 2.

In this embodiment, the common gate electrode 12a (13a) of the first MOSFET 12 and the second MOSFET 13 is connected by a wire 23 to the first output terminal 3 of the drive circuit 2, which is at the same potential as the cathode electrode 11b of the Zener diode 11. The source electrode 13b of the second MOSFET 13, which is at the same potential as the source electrode 12b of the first MOSFET 12, is connected by a wire 23 to the second substrate 19, which is at the same potential as the anode electrode 11a of the Zener diode 11. The drain electrode 12c of the first MOSFET 12 is connected to the first output terminal 16, and the drain electrode 13c of the second MOSFET 13 is connected to the second output terminal 17, by wires 23.

According to this embodiment, it is possible to achieve the same effect as the configuration shown in the third embodiment. In other words, it is possible to achieve a high withstand voltage, a low on-resistance, and a low capacitance of the semiconductor relay 1. As a result, it is possible to increase the output current of the semiconductor relay 1.

In addition, even if there is a fluctuation in the output voltage of the photodiode array 7, which corresponds to the drive signal, or a large change in the ambient temperature of the semiconductor relay 1, the gate (G)-source (S) voltages of the first MOSFET 12 and the second MOSFET 13 can be stabilized within their respective usable ranges. As a result, the output current of the semiconductor relay 1 can be increased.

In addition, signals can be transmitted in both directions between the first output terminal 16 and the second output terminal 17.

In addition, the number of wires 23 connecting the first MOSFET 12 and the second MOSFET 13 to other components and members can be reduced compared to the example shown in embodiment 3. Furthermore, the number of wires 23 can be reduced by incorporating the Zener diode 11 in the drive circuit 2. As a result, the wire bonding process can be simplified, and the manufacturing time and manufacturing costs of the semiconductor relay 1 can be reduced. Furthermore, by reducing the number of wires 23, the high-frequency characteristics of the transmission signal in the semiconductor relay 1 can be improved.

Other Embodiments
In this specification, both the first output terminal 16 and the second output terminal 17 have internal portions 16a, 17a accommodated inside the housing 22, but the internal portions 16a, 17a may be physically separated from the first output terminal 16 and the second output terminal 17, respectively.

For example, in the semiconductor relay 1 shown in the first and fourth embodiments, the first board 18 on which the first MOSFET 12 is arranged may be housed inside the housing 22 and physically separated from the first output terminal 16. However, even in this case, the first board 18 and the first output terminal 16 are electrically connected by one or more wires 23. Similarly, in the semiconductor relay 1 shown in the second and fifth embodiments, the third board 20 on which the second MOSFET 13 is arranged may be housed inside the housing 22 and physically separated from the second output terminal 17. However, even in this case, the third board 20 and the second output terminal 17 are electrically connected by one or more wires 23.

The material forming the first MOSFET 12 and the second MOSFET 13 may be another compound semiconductor having a higher breakdown voltage than silicon, such as gallium nitride (hereinafter referred to as GaN) or gallium oxide (hereinafter referred to as Ga ₂ O ₃ ).

In addition, when using GaN, it does not have to be a MOSFET, but a field effect transistor (FET) of a different structure, such as a junction field effect transistor (J-FET) or a high electron mobility transistor (HEMT), may be used.

Therefore, the first MOSFET 12 and the second MOSFET 13 in this specification can be read as the first FET 12 and the second FET 13, respectively.

In addition, when the first FET 12 and the second FET 13 made of GaN are used as the output elements of the semiconductor relay 1, the Zener voltage of the Zener diode 11 may have a negative temperature dependency. In a horizontal J-FET made of GaN, the threshold voltage is often smaller than 5V. Therefore, the Zener voltage is set to about 5V or less. In this case, the temperature dependency of the Zener voltage of the Zener diode 11 made of silicon is negative, but the temperature coefficient itself becomes smaller according to the Zener voltage. Therefore, even if the ambient temperature of the semiconductor relay 1 changes significantly, the fluctuation range of the Zener voltage is kept small. Therefore, the usable temperature range of the first FET 12 and the second FET 13 is not significantly narrowed.

In addition, in the present specification, an example has been shown in which the LEDs 5 and the light driving IC 6 in the drive circuit 2 are arranged on separate members, but this is not particularly limited. The drive circuit 2 may have a structure in which the LEDs 5 and the light driving IC 6 are housed inside the same package (not shown), and this drive circuit 2 may be arranged on the second substrate 19.

In this case, a first input terminal 24 and a second input terminal 25 are provided in the drive circuit 2 as power supply terminals for the LED 5. For example, as shown in FIG. 15 and FIG. 16, the first input terminal 24 of the drive circuit 2 is connected to the first input terminal 14 of the semiconductor relay 1 by a wire 23, and the second input terminal 25 of the drive circuit 2 is connected to the second input terminal 15 of the semiconductor relay 1 by a wire 23.

In addition, in the present specification, an example has been shown in which the drive circuit 2 is a so-called optically coupled circuit composed of an LED 5 and an optically driven IC 6, but this is not particularly limited. For example, the drive circuit 2 may be a capacitively coupled circuit or a magnetically coupled circuit.

The semiconductor relay disclosed herein is useful because it can achieve high output and suppress fluctuations in the output current in response to fluctuations in the drive signal.

1 Semiconductor relay 2 Drive circuit 3 First output terminal of drive circuit 4 Second output terminal of drive circuit 5 LED (light emitting element)
6 Light driving IC
7 Photodiode array (light receiving element)
8 Gate charge/discharge circuit 9 MOSFET
10 Resistor 11 Zener diode 11a Anode electrode 11b Cathode electrode 12 First MOSFET (first FET)
12a: gate electrode 12b: source electrode 12c: drain electrode 13: second MOSFET (second FET)
13a Gate electrode 13b Source electrode 13c Drain electrode 14 First input terminal 14a Internally disposed portion 15 Second input terminal 15a Internally disposed portion 16 First output terminal 16a Internally disposed portion 17 Second output terminal 17a Internally disposed portion 18 First substrate 19 Second substrate 20 Third substrate 21 Fourth substrate 22 Housing 23 Wire

Claims (13)

A first input terminal;
A second input terminal;
a drive circuit connected to the first input terminal and the second input terminal, and configured to output a drive signal in response to an input signal applied between the first input terminal and the second input terminal;
a first FET that is turned on and off by the drive signal output from the drive circuit;
a first output terminal connected to the first FET;
a second output terminal connected to the first FET;
a Zener diode connected to the drive circuit;
Equipped with
a first output terminal of the drive circuit is connected to a gate of the first FET;
a second output terminal of the drive circuit connected to a source of the first FET;
the anode of the Zener diode is connected to the source of the first FET;
the cathode of the Zener diode is connected to the gate of the first FET;
The first FET is made of a compound semiconductor.
Solid state relay. The compound semiconductor is silicon carbide (SiC) or gallium nitride (GaN);
2. The semiconductor relay according to claim 1. the first output terminal is directly connected to the first FET;
3. The semiconductor relay according to claim 1 or 2. Further comprising a second FET;
the first output terminal of the drive circuit is further connected to the gate of the second FET;
the second output terminal of the drive circuit is further connected to the source of the second FET;
the anode of the Zener diode is further connected to the source of the second FET;
The cathode of the Zener diode is further connected to the gate of the second FET.
The semiconductor relay according to any one of claims 1 to 3. the second output terminal is directly connected to the second FET;
5. The semiconductor relay according to claim 4. the first FET and the second FET are formed on the same chip;
the gate of the first FET and the gate of the second FET are common to each other;
the source of the first FET and the source of the second FET are common to each other;
6. The semiconductor relay according to claim 4 or 5. a first substrate on which the first FET is disposed;
a second substrate on which the drive circuit and the Zener diode are disposed;
Further equipped with
The semiconductor relay according to any one of claims 1 to 6. the first output terminal is connected to the first substrate;
8. The semiconductor relay according to claim 7. Further comprising a third substrate on which the second FET is disposed;
the second output terminal is connected to the third substrate;
The semiconductor relay according to any one of claims 1 to 8. The Zener diode is disposed on the same chip as the drive circuit.
The semiconductor relay according to any one of claims 1 to 9. The drive circuit includes:
A light-emitting element;
a light receiving element facing the light emitting element and receiving light emitted from the light emitting element;
having
The semiconductor relay according to any one of claims 1 to 10. the light receiving element is a photodiode array in which photodiodes are connected in series;
the Zener diode is connected in parallel with the photodiode array, and the anode of the photodiode array is connected to the cathode of the Zener diode;
the cathode of the photodiode array is connected to the anode of the Zener diode;
The solid state relay according to claim 11. The output voltage of the photodiode array has a negative temperature dependency that decreases as the temperature increases, while
The Zener voltage of the Zener diode has a positive temperature dependency that increases as the temperature increases.
The solid state relay according to claim 12.